1 /***************************************************************************//** 2 * \file cyip_hsiom.h 3 * 4 * \brief 5 * HSIOM IP definitions 6 * 7 ******************************************************************************** 8 * \copyright 9 * (c) (2016-2024), Cypress Semiconductor Corporation (an Infineon company) or 10 * an affiliate of Cypress Semiconductor Corporation. 11 * 12 * SPDX-License-Identifier: Apache-2.0 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 *******************************************************************************/ 26 27 #ifndef _CYIP_HSIOM_H_ 28 #define _CYIP_HSIOM_H_ 29 30 #include "cyip_headers.h" 31 32 /******************************************************************************* 33 * HSIOM 34 *******************************************************************************/ 35 36 #define HSIOM_PRT_SECTION_SIZE 0x00000010UL 37 #define HSIOM_SECURE_PRT_SECTION_SIZE 0x00000010UL 38 #define HSIOM_SECTION_SIZE 0x00004000UL 39 40 /** 41 * \brief HSIOM port registers (HSIOM_PRT) 42 */ 43 typedef struct { 44 __IOM uint32_t PORT_SEL0; /*!< 0x00000000 Port selection 0 */ 45 __IOM uint32_t PORT_SEL1; /*!< 0x00000004 Port selection 1 */ 46 __IM uint32_t RESERVED[2]; 47 } HSIOM_PRT_Type; /*!< Size = 16 (0x10) */ 48 49 /** 50 * \brief HSIOM secure attribute port registers (HSIOM_SECURE_PRT) 51 */ 52 typedef struct { 53 __IOM uint32_t NONSECURE_MASK; /*!< 0x00000000 Non-Secure Mask */ 54 __IM uint32_t RESERVED[3]; 55 } HSIOM_SECURE_PRT_Type; /*!< Size = 16 (0x10) */ 56 57 /** 58 * \brief IO Matrix (IOM) (HSIOM) 59 */ 60 typedef struct { 61 HSIOM_PRT_Type PRT[128]; /*!< 0x00000000 HSIOM port registers */ 62 __IM uint32_t RESERVED[512]; 63 HSIOM_SECURE_PRT_Type SECURE_PRT[128]; /*!< 0x00001000 HSIOM secure attribute port registers */ 64 __IM uint32_t RESERVED1[512]; 65 __IOM uint32_t AMUX_SPLIT_CTL[64]; /*!< 0x00002000 AMUX splitter cell control */ 66 __IM uint32_t RESERVED2[64]; 67 __IOM uint32_t MONITOR_CTL_0; /*!< 0x00002200 Power/Ground Monitor cell control 0 */ 68 __IOM uint32_t MONITOR_CTL_1; /*!< 0x00002204 Power/Ground Monitor cell control 1 */ 69 __IOM uint32_t MONITOR_CTL_2; /*!< 0x00002208 Power/Ground Monitor cell control 2 */ 70 __IOM uint32_t MONITOR_CTL_3; /*!< 0x0000220C Power/Ground Monitor cell control 3 */ 71 } HSIOM_Type; /*!< Size = 8720 (0x2210) */ 72 73 74 /* HSIOM_PRT.PORT_SEL0 */ 75 #define HSIOM_PRT_PORT_SEL0_IO0_SEL_Pos 0UL 76 #define HSIOM_PRT_PORT_SEL0_IO0_SEL_Msk 0x1FUL 77 #define HSIOM_PRT_PORT_SEL0_IO1_SEL_Pos 8UL 78 #define HSIOM_PRT_PORT_SEL0_IO1_SEL_Msk 0x1F00UL 79 #define HSIOM_PRT_PORT_SEL0_IO2_SEL_Pos 16UL 80 #define HSIOM_PRT_PORT_SEL0_IO2_SEL_Msk 0x1F0000UL 81 #define HSIOM_PRT_PORT_SEL0_IO3_SEL_Pos 24UL 82 #define HSIOM_PRT_PORT_SEL0_IO3_SEL_Msk 0x1F000000UL 83 /* HSIOM_PRT.PORT_SEL1 */ 84 #define HSIOM_PRT_PORT_SEL1_IO4_SEL_Pos 0UL 85 #define HSIOM_PRT_PORT_SEL1_IO4_SEL_Msk 0x1FUL 86 #define HSIOM_PRT_PORT_SEL1_IO5_SEL_Pos 8UL 87 #define HSIOM_PRT_PORT_SEL1_IO5_SEL_Msk 0x1F00UL 88 #define HSIOM_PRT_PORT_SEL1_IO6_SEL_Pos 16UL 89 #define HSIOM_PRT_PORT_SEL1_IO6_SEL_Msk 0x1F0000UL 90 #define HSIOM_PRT_PORT_SEL1_IO7_SEL_Pos 24UL 91 #define HSIOM_PRT_PORT_SEL1_IO7_SEL_Msk 0x1F000000UL 92 93 94 /* HSIOM_SECURE_PRT.NONSECURE_MASK */ 95 #define HSIOM_SECURE_PRT_NONSECURE_MASK_NONSECURE0_Pos 0UL 96 #define HSIOM_SECURE_PRT_NONSECURE_MASK_NONSECURE0_Msk 0x1UL 97 #define HSIOM_SECURE_PRT_NONSECURE_MASK_NONSECURE1_Pos 1UL 98 #define HSIOM_SECURE_PRT_NONSECURE_MASK_NONSECURE1_Msk 0x2UL 99 #define HSIOM_SECURE_PRT_NONSECURE_MASK_NONSECURE2_Pos 2UL 100 #define HSIOM_SECURE_PRT_NONSECURE_MASK_NONSECURE2_Msk 0x4UL 101 #define HSIOM_SECURE_PRT_NONSECURE_MASK_NONSECURE3_Pos 3UL 102 #define HSIOM_SECURE_PRT_NONSECURE_MASK_NONSECURE3_Msk 0x8UL 103 #define HSIOM_SECURE_PRT_NONSECURE_MASK_NONSECURE4_Pos 4UL 104 #define HSIOM_SECURE_PRT_NONSECURE_MASK_NONSECURE4_Msk 0x10UL 105 #define HSIOM_SECURE_PRT_NONSECURE_MASK_NONSECURE5_Pos 5UL 106 #define HSIOM_SECURE_PRT_NONSECURE_MASK_NONSECURE5_Msk 0x20UL 107 #define HSIOM_SECURE_PRT_NONSECURE_MASK_NONSECURE6_Pos 6UL 108 #define HSIOM_SECURE_PRT_NONSECURE_MASK_NONSECURE6_Msk 0x40UL 109 #define HSIOM_SECURE_PRT_NONSECURE_MASK_NONSECURE7_Pos 7UL 110 #define HSIOM_SECURE_PRT_NONSECURE_MASK_NONSECURE7_Msk 0x80UL 111 112 113 /* HSIOM.AMUX_SPLIT_CTL */ 114 #define HSIOM_AMUX_SPLIT_CTL_SWITCH_AA_SL_Pos 0UL 115 #define HSIOM_AMUX_SPLIT_CTL_SWITCH_AA_SL_Msk 0x1UL 116 #define HSIOM_AMUX_SPLIT_CTL_SWITCH_AA_SR_Pos 1UL 117 #define HSIOM_AMUX_SPLIT_CTL_SWITCH_AA_SR_Msk 0x2UL 118 #define HSIOM_AMUX_SPLIT_CTL_SWITCH_AA_S0_Pos 2UL 119 #define HSIOM_AMUX_SPLIT_CTL_SWITCH_AA_S0_Msk 0x4UL 120 #define HSIOM_AMUX_SPLIT_CTL_SWITCH_BB_SL_Pos 4UL 121 #define HSIOM_AMUX_SPLIT_CTL_SWITCH_BB_SL_Msk 0x10UL 122 #define HSIOM_AMUX_SPLIT_CTL_SWITCH_BB_SR_Pos 5UL 123 #define HSIOM_AMUX_SPLIT_CTL_SWITCH_BB_SR_Msk 0x20UL 124 #define HSIOM_AMUX_SPLIT_CTL_SWITCH_BB_S0_Pos 6UL 125 #define HSIOM_AMUX_SPLIT_CTL_SWITCH_BB_S0_Msk 0x40UL 126 /* HSIOM.MONITOR_CTL_0 */ 127 #define HSIOM_MONITOR_CTL_0_MONITOR_EN_Pos 0UL 128 #define HSIOM_MONITOR_CTL_0_MONITOR_EN_Msk 0xFFFFFFFFUL 129 /* HSIOM.MONITOR_CTL_1 */ 130 #define HSIOM_MONITOR_CTL_1_MONITOR_EN_Pos 0UL 131 #define HSIOM_MONITOR_CTL_1_MONITOR_EN_Msk 0xFFFFFFFFUL 132 /* HSIOM.MONITOR_CTL_2 */ 133 #define HSIOM_MONITOR_CTL_2_MONITOR_EN_Pos 0UL 134 #define HSIOM_MONITOR_CTL_2_MONITOR_EN_Msk 0xFFFFFFFFUL 135 /* HSIOM.MONITOR_CTL_3 */ 136 #define HSIOM_MONITOR_CTL_3_MONITOR_EN_Pos 0UL 137 #define HSIOM_MONITOR_CTL_3_MONITOR_EN_Msk 0xFFFFFFFFUL 138 139 140 #endif /* _CYIP_HSIOM_H_ */ 141 142 143 /* [] END OF FILE */ 144
