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Searched defs:SCR (Results 1 – 15 of 15) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/saml21/cmsis/
Dcore_cm0.h340 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
Dcore_cm0plus.h355 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
Dcore_sc000.h346 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
Dcore_cm3.h354 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
Dcore_sc300.h354 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
Dcore_cm4.h401 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
Dcore_cm7.h416 …__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register … member
/loramac-node-3.4.0/src/boards/mcu/stm32/cmsis/
Dcore_cm0.h395 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
Dcore_cm0plus.h413 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
Dcore_sc000.h401 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
Dcore_cm3.h423 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
Dcore_sc300.h423 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
Dcore_cm4.h491 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
Dcore_cm7.h506 __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ member
/loramac-node-3.4.0/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h655 __IO uint32_t SCR; /*!< PWR power status reset register, Address offset: 0x18 */ member