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Searched defs:SCG_VCCR_DIVSLOW_MASK (Results 1 – 25 of 28) sorted by relevance

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/hal_nxp-3.7.0/s32/drivers/s32k1/BaseNXP/header/
DS32K116_SCG.h191 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
DS32K118_SCG.h191 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
DS32K142W_SCG.h195 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
DS32K144W_SCG.h195 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
DS32K146_SCG.h195 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
DS32K144_SCG.h195 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
DS32K148_SCG.h195 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
DS32K142_SCG.h195 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h9796 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h9798 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h12323 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h10635 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h12227 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h12326 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h12329 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE17Z9/
DMKE17Z9.h12231 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE13Z9/
DMKE13Z9.h12229 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h12576 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h12579 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h15546 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h16552 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h16546 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h14089 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h14089 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm0plus.h15401 #define SCG_VCCR_DIVSLOW_MASK (0xFU) macro

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