Searched defs:SCG_SIRCCSR_SIRCEN_MASK (Results 1 – 2 of 2) sorted by relevance
| /hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/ | ||
| D | RV32M1_ri5cy.h | 16785 #define SCG_SIRCCSR_SIRCEN_MASK (0x1U) macro |
| D | RV32M1_zero_riscy.h | 17613 #define SCG_SIRCCSR_SIRCEN_MASK (0x1U) macro |