1 /* 2 * Copyright (c) 2018-2019 Arm Limited. All rights reserved. 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 #ifndef __MUSCA_B1_SCC_DRV_H__ 17 #define __MUSCA_B1_SCC_DRV_H__ 18 19 #include <stdint.h> 20 #include <stddef.h> 21 #include <stdbool.h> 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /** 38 pins can be controlled in total - including the reserved ones */ 28 #define GPIO_ALTFUNC_MAX_PINS 38U 29 30 /** Allowed error codes. */ 31 enum musca_b1_scc_error_t { 32 SCC_ERR_NONE = 0U, 33 SCC_INVALID_ARG 34 }; 35 36 /** 37 * Enum to store alternate function values. 38 * They are used as shift operand, must be unsigned. 39 */ 40 enum gpio_altfunc_t { 41 GPIO_MAIN_FUNC = 0UL, 42 GPIO_ALTFUNC_1, 43 GPIO_ALTFUNC_2, 44 GPIO_ALTFUNC_3, 45 GPIO_ALTFUNC_MAX 46 }; 47 48 #define GPIO_ALTFUNC_ALL_MASK ((1U << GPIO_ALTFUNC_MAX) - 1) 49 50 /** Enum to store alternate function mask values.*/ 51 enum gpio_altfunc_mask_t { 52 GPIO_ALTFUNC_NONE = 0, 53 GPIO_MAIN_FUNC_MASK = (1UL << GPIO_MAIN_FUNC), 54 GPIO_ALTFUNC_1_MASK = (1UL << GPIO_ALTFUNC_1), 55 GPIO_ALTFUNC_2_MASK = (1UL << GPIO_ALTFUNC_2), 56 GPIO_ALTFUNC_3_MASK = (1UL << GPIO_ALTFUNC_3), 57 GPIO_MAIN_FUNC_NEG_MASK = (~GPIO_MAIN_FUNC_MASK & GPIO_ALTFUNC_ALL_MASK), 58 GPIO_ALTFUNC_1_NEG_MASK = (~GPIO_ALTFUNC_1_MASK & GPIO_ALTFUNC_ALL_MASK), 59 GPIO_ALTFUNC_2_NEG_MASK = (~GPIO_ALTFUNC_2_MASK & GPIO_ALTFUNC_ALL_MASK), 60 GPIO_ALTFUNC_3_NEG_MASK = (~GPIO_ALTFUNC_3_MASK & GPIO_ALTFUNC_ALL_MASK) 61 }; 62 63 /** Supported pin modes */ 64 enum pinmode_select_t { 65 PINMODE_NONE = 0U, 66 PINMODE_PULL_DOWN, 67 PINMODE_PULL_UP, 68 PINMODE_MAX 69 }; 70 71 /** Musca SCC device configuration structure */ 72 struct musca_b1_scc_dev_cfg_t { 73 const uint32_t base; /*!< SCC base address */ 74 }; 75 76 /** Musca SCC device structure */ 77 struct musca_b1_scc_dev_t { 78 const struct musca_b1_scc_dev_cfg_t* const cfg; /*!< SCC configuration */ 79 }; 80 81 /** 82 * \brief Sets selected alternate functions for selected pins 83 * 84 * \param[in] dev SCC device pointer \ref musca_b1_scc_dev_t 85 * \param[in] altfunc Alternate function to set \ref gpio_altfunc_t 86 * \param[in] pin_mask Pin mask for the alternate functions 87 * 88 * \return Returns error code. \ref musca_b1_scc_error_t 89 * 90 * \note This function doesn't check if scc dev is NULL. 91 * \note If no alternate function is selected then this API won't do anything 92 */ 93 enum musca_b1_scc_error_t 94 musca_b1_scc_set_alt_func(struct musca_b1_scc_dev_t* dev, 95 enum gpio_altfunc_t altfunc, uint64_t pin_mask); 96 97 /** 98 * \brief Sets pinmode for the given pins 99 * 100 * \param[in] dev SCC device pointer \ref musca_b1_scc_dev_t 101 * \param[in] pin_mask Pin mask for the alternate functions 102 * \param[in] mode Pin mode to set \ref pinmode_select_t 103 * 104 * \return Returns error code. \ref musca_b1_scc_error_t 105 * 106 * \note This function doesn't check if scc dev is NULL. 107 */ 108 enum musca_b1_scc_error_t 109 musca_b1_scc_set_pinmode(struct musca_b1_scc_dev_t* dev, uint64_t pin_mask, 110 enum pinmode_select_t mode); 111 112 /** 113 * \brief Sets default input values for the selected pins 114 * 115 * \param[in] dev SCC device pointer \ref musca_b1_scc_dev_t 116 * \param[in] altfunc The selected alternate function that is set the 117 * specified default in value \ref gpio_altfunc_t 118 * \param[in] pin_num Pin number 119 * \param[in] default_in_value True if the in value needs to be set to 1, 120 * false if it needs to be 0 121 * 122 * \return Returns error code. \ref musca_b1_scc_error_t 123 * 124 * \note This function doesn't check if scc_base is NULL. 125 * \note If no alternate function is selected, the function won't do anything 126 */ 127 enum musca_b1_scc_error_t 128 musca_b1_scc_set_default_in(struct musca_b1_scc_dev_t* dev, 129 enum gpio_altfunc_t altfunc, 130 uint32_t pin_num, 131 bool default_in_value); 132 133 /** 134 * \brief Sets the AZ_CPU_VTOR register of SCC 135 * 136 * \param[in] dev SCC device pointer \ref musca_b1_scc_dev_t 137 * \param[in] az_sys_remap Remap vector for System address space 138 * \param[in] az_code_remap Remap vector for Code address space 139 * \param[in] az_rom_remap Remap vector for ROM address space 140 * 141 * \return Returns error code. \ref musca_b1_scc_error_t 142 * 143 * \note This function doesn't check if scc_base is NULL. 144 */ 145 enum musca_b1_scc_error_t 146 musca_b1_scc_set_az_cpu_vtor(struct musca_b1_scc_dev_t* dev, 147 uint8_t az_sys_remap, uint8_t az_code_remap, 148 uint8_t az_rom_remap); 149 150 /** 151 * \brief Sets ROM address remap for AZ CPU 152 * 153 * \param[in] dev SCC device pointer \ref musca_b1_scc_dev_t 154 * \param[in] offset ROM address offset 155 * \param[in] mask Address mask for remap 156 * 157 * \return Returns error code. \ref musca_b1_scc_error_t 158 * 159 * \note This function doesn't check if scc_base is NULL. 160 */ 161 enum musca_b1_scc_error_t 162 musca_b1_scc_set_az_rom_remap(struct musca_b1_scc_dev_t* dev, 163 uint32_t offset, uint32_t mask); 164 165 /** 166 * \brief Sets Code address remap for AZ CPU 167 * 168 * \param[in] dev SCC device pointer \ref musca_b1_scc_dev_t 169 * \param[in] offset Code address offset 170 * \param[in] mask Address mask for remap 171 * 172 * \return Returns error code. \ref musca_b1_scc_error_t 173 * 174 * \note This function doesn't check if scc_base is NULL. 175 */ 176 enum musca_b1_scc_error_t 177 musca_b1_scc_set_az_code_remap(struct musca_b1_scc_dev_t* dev, 178 uint32_t offset, uint32_t mask); 179 180 /** 181 * \brief Sets System address remap for AZ CPU 182 * 183 * \param[in] dev SCC device pointer \ref musca_b1_scc_dev_t 184 * \param[in] offset System address offset 185 * \param[in] mask Address mask for remap 186 * 187 * \return Returns error code. \ref musca_b1_scc_error_t 188 * 189 * \note This function doesn't check if scc_base is NULL. 190 */ 191 enum musca_b1_scc_error_t 192 musca_b1_scc_set_az_sys_remap(struct musca_b1_scc_dev_t* dev, 193 uint32_t offset, uint32_t mask); 194 195 /** 196 * \brief Enables address remap for AZ CPU at boot. 197 * 198 * \param[in] dev SCC device pointer \ref musca_b1_scc_dev_t 199 * 200 * \return Returns error code. \ref musca_b1_scc_error_t 201 * 202 * \note This function doesn't check if scc_base is NULL. 203 */ 204 enum musca_b1_scc_error_t 205 musca_b1_scc_enable_az_boot_remap(struct musca_b1_scc_dev_t* dev); 206 207 /** 208 * \brief Disables address remap for AZ CPU at boot. 209 * 210 * \param[in] dev SCC device pointer \ref musca_b1_scc_dev_t 211 * 212 * \return Returns error code. \ref musca_b1_scc_error_t 213 * 214 * \note This function doesn't check if scc_base is NULL. 215 */ 216 enum musca_b1_scc_error_t 217 musca_b1_scc_disable_az_boot_remap(struct musca_b1_scc_dev_t* dev); 218 219 /** 220 * \brief Releases AZ CPU from reset. 221 * 222 * \param[in] dev SCC device pointer \ref musca_b1_scc_dev_t 223 * 224 * \return Returns error code. \ref musca_b1_scc_error_t 225 * 226 * \note This function doesn't check if scc_base is NULL. 227 */ 228 enum musca_b1_scc_error_t 229 musca_b1_scc_az_release_from_reset(struct musca_b1_scc_dev_t* dev); 230 231 #ifdef __cplusplus 232 } 233 #endif 234 235 #endif /* __MUSCA_B1_SCC_DRV_H__ */ 236
