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Searched defs:RegValue (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32k3/Fls/include/
DQspi_Ip_HwAccess.h91 uint32 RegValue = (uint32)BaseAddr->MCR; in Qspi_Ip_GetClrTxStatus() local
113 uint32 RegValue = (uint32)BaseAddr->SPTRCLR; in Qspi_Ip_GetClrAhbStatus() local
247 uint32 RegValue = (uint32)BaseAddr->MCR; in Qspi_Ip_SetIdleLineValuesA() local
278 uint32 RegValue = (uint32)BaseAddr->DLLCRA; in Qspi_Ip_DLLSlaveEnA() local
292 uint32 RegValue = (uint32)BaseAddr->DLLCRA; in Qspi_Ip_DLLSlaveUpdateA() local
307 uint32 RegValue = (uint32)BaseAddr->DLLCRA; in Qspi_Ip_DLLEnableA() local
322 uint32 RegValue = (uint32)BaseAddr->DLLCRA; in Qspi_Ip_DLLSlaveBypassA() local
338 uint32 RegValue = (uint32)BaseAddr->DLLCRA; in Qspi_Ip_DLLSlaveAutoUpdateA() local
353 uint32 RegValue = (uint32)BaseAddr->DLLCRA; in Qspi_Ip_DLLFreqEnA() local
367 uint32 RegValue = (uint32)BaseAddr->DLLCRA; in Qspi_Ip_DLLSetCoarseDelayA() local
[all …]
/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/
DPower_Ip_MC_RGM.c225 static void Power_Ip_MC_RGM_ClearFesResetFlags(uint32 RegValue) in Power_Ip_MC_RGM_ClearFesResetFlags()
266 static void Power_Ip_MC_RGM_ClearDesResetFlags(uint32 RegValue) in Power_Ip_MC_RGM_ClearDesResetFlags()
516 uint32 RegValue = 0U; in Power_Ip_MC_RGM_GetResetReason() local
578 uint32 RegValue; in Power_Ip_MC_RGM_GetResetRawValue() local
706 uint32 RegValue; in Power_Ip_MC_RGM_ResetDuringStandby() local
DClock_Ip_Selector.c182 uint32 RegValue; in Clock_Ip_SetCgmXCscCssClkswSwip() local
314 uint32 RegValue; in Clock_Ip_SetCgmXCscCssClkswRampupRampdownSwip() local
421 uint32 RegValue; in Clock_Ip_ResetCgmXCscCssCsGrip() local
486 uint32 RegValue; in Clock_Ip_SetCgmXCscCssCsGrip() local
579 uint32 RegValue; in Clock_Ip_SetRtcRtccClksel_TrustedCall() local
DClock_Ip_Divider.c145 uint32 RegValue; in Clock_Ip_SetCgmXDeDivStatWithoutPhase() local
234 uint32 RegValue; in Clock_Ip_SetPllPll0divDeDivOutput() local
266 uint32 RegValue; in Clock_Ip_SetPllPlldvOdiv2Output() local
DClock_Ip_IntOsc.c208 uint32 RegValue; in Clock_Ip_SetFircDivSelHSEb() local
DPower_Ip_PMC.c437 uint32 RegValue; in Power_Ip_PMC_VoltageErrorIsr() local
DClock_Ip_Specific.c375 uint32 RegValue; in Clock_Ip_CodeInRamSetFlashWaitStates() local
/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Selector.c172 uint32 RegValue; in Clock_Ip_SetCgmXCscCssClkswSwip() local
253 uint32 RegValue; in Clock_Ip_ResetCgmXCscCssCsGrip() local
290 uint32 RegValue; in Clock_Ip_SetCgmXCscCssCsGrip() local
357 uint32 RegValue; in Clock_Ip_SetGprXClkoutSelMuxsel() local
DClock_Ip_Divider.c143 uint32 RegValue; in Clock_Ip_SetCgmXDeDivStatWithoutPhase() local
214 uint32 RegValue; in Clock_Ip_SetCgmXDeDivStatWithoutPhaseWithTrigger() local
270 uint32 RegValue; in Clock_Ip_SetPlldigPll0divDeDivOutput() local
/hal_nxp-3.5.0/s32/drivers/s32ze/EthSwt_NETC/src/
DNetc_EthSwt_Ip.c2739 uint32 RegValue; in Netc_EthSwt_Ip_ConfigPortTimeGateScheduling() local