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Searched defs:R_SPI0_SPSR_PERF_Msk (Results 1 – 20 of 20) sorted by relevance

/hal_renesas-latest/drivers/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
DR7FA2L1AB.h16944 …#define R_SPI0_SPSR_PERF_Msk (0x8UL) /*!< PERF (Bitfield-Mask: 0x01) … macro
DR7FA4E10D.h17959 …#define R_SPI0_SPSR_PERF_Msk (0x8UL) /*!< PERF (Bitfield-Mask: 0x01) … macro
DR7FA2A1AB.h18260 …#define R_SPI0_SPSR_PERF_Msk (0x8UL) /*!< PERF (Bitfield-Mask: 0x01) … macro
DR7FA4W1AD.h18265 …#define R_SPI0_SPSR_PERF_Msk (0x8UL) /*!< PERF (Bitfield-Mask: 0x01) … macro
DR7FA6E10F.h19979 …#define R_SPI0_SPSR_PERF_Msk (0x8UL) /*!< PERF (Bitfield-Mask: 0x01) … macro
DR7FA4M1AB.h18416 …#define R_SPI0_SPSR_PERF_Msk (0x8UL) /*!< PERF (Bitfield-Mask: 0x01) … macro
DR7FA4M2AD.h19345 …#define R_SPI0_SPSR_PERF_Msk (0x8UL) /*!< PERF (Bitfield-Mask: 0x01) … macro
DR7FA4M3AF.h19450 …#define R_SPI0_SPSR_PERF_Msk (0x8UL) /*!< PERF (Bitfield-Mask: 0x01) … macro
DR7FA4E2B9.h21101 …#define R_SPI0_SPSR_PERF_Msk (0x8UL) /*!< PERF (Bitfield-Mask: 0x01) … macro
DR7FA6E2BB.h21389 …#define R_SPI0_SPSR_PERF_Msk (0x8UL) /*!< PERF (Bitfield-Mask: 0x01) … macro
DR7FA6M1AD.h20163 …#define R_SPI0_SPSR_PERF_Msk (0x8UL) /*!< PERF (Bitfield-Mask: 0x01) … macro
DR7FA6M4AF.h21840 …#define R_SPI0_SPSR_PERF_Msk (0x8UL) /*!< PERF (Bitfield-Mask: 0x01) … macro
DR7FA4L1BD.h23970 …#define R_SPI0_SPSR_PERF_Msk (0x8UL) /*!< PERF (Bitfield-Mask: 0x01) … macro
DR7FA6M2AF.h23147 …#define R_SPI0_SPSR_PERF_Msk (0x8UL) /*!< PERF (Bitfield-Mask: 0x01) … macro
DR7FA6M3AH.h26782 …#define R_SPI0_SPSR_PERF_Msk (0x8UL) /*!< PERF (Bitfield-Mask: 0x01) … macro
DR7FA6M5BH.h25650 …#define R_SPI0_SPSR_PERF_Msk (0x8UL) /*!< PERF (Bitfield-Mask: 0x01) … macro
DR7FA8T1AH.h26217 …#define R_SPI0_SPSR_PERF_Msk (0x8UL) /*!< PERF (Bitfield-Mask: 0x01) … macro
DR7FA8M1AH.h28205 …#define R_SPI0_SPSR_PERF_Msk (0x8UL) /*!< PERF (Bitfield-Mask: 0x01) … macro
DR7FA8D1BH.h36759 …#define R_SPI0_SPSR_PERF_Msk (0x8UL) /*!< PERF (Bitfield-Mask: 0x01) … macro
/hal_renesas-latest/drivers/rz/fsp/src/rzn/bsp/cmsis/Device/RENESAS/Include/
DR9A07G084.h33282 …#define R_SPI0_SPSR_PERF_Msk (0x800UL) /*!< PERF (Bitfield-Mask: 0x01) … macro