1 /* 2 * Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 /********************************************************************************************************************** 8 * File Name : dmac_b_iobitmask.h 9 * Version : 1.00 10 * Description : IO bit mask file for dmac. 11 *********************************************************************************************************************/ 12 13 #ifndef DMAC_B_IOBITMASK_H 14 #define DMAC_B_IOBITMASK_H 15 16 #define R_DMAC_B0_GRP_CH_CHSTAT_EN_Msk (0x00000001UL) 17 #define R_DMAC_B0_GRP_CH_CHSTAT_EN_Pos (0UL) 18 #define R_DMAC_B0_GRP_CH_CHSTAT_RQST_Msk (0x00000002UL) 19 #define R_DMAC_B0_GRP_CH_CHSTAT_RQST_Pos (1UL) 20 #define R_DMAC_B0_GRP_CH_CHSTAT_TACT_Msk (0x00000004UL) 21 #define R_DMAC_B0_GRP_CH_CHSTAT_TACT_Pos (2UL) 22 #define R_DMAC_B0_GRP_CH_CHSTAT_SUS_Msk (0x00000008UL) 23 #define R_DMAC_B0_GRP_CH_CHSTAT_SUS_Pos (3UL) 24 #define R_DMAC_B0_GRP_CH_CHSTAT_ER_Msk (0x00000010UL) 25 #define R_DMAC_B0_GRP_CH_CHSTAT_ER_Pos (4UL) 26 #define R_DMAC_B0_GRP_CH_CHSTAT_END_Msk (0x00000020UL) 27 #define R_DMAC_B0_GRP_CH_CHSTAT_END_Pos (5UL) 28 #define R_DMAC_B0_GRP_CH_CHSTAT_TC_Msk (0x00000040UL) 29 #define R_DMAC_B0_GRP_CH_CHSTAT_TC_Pos (6UL) 30 #define R_DMAC_B0_GRP_CH_CHSTAT_SR_Msk (0x00000080UL) 31 #define R_DMAC_B0_GRP_CH_CHSTAT_SR_Pos (7UL) 32 #define R_DMAC_B0_GRP_CH_CHSTAT_DL_Msk (0x00000100UL) 33 #define R_DMAC_B0_GRP_CH_CHSTAT_DL_Pos (8UL) 34 #define R_DMAC_B0_GRP_CH_CHSTAT_DW_Msk (0x00000200UL) 35 #define R_DMAC_B0_GRP_CH_CHSTAT_DW_Pos (9UL) 36 #define R_DMAC_B0_GRP_CH_CHSTAT_DER_Msk (0x00000400UL) 37 #define R_DMAC_B0_GRP_CH_CHSTAT_DER_Pos (10UL) 38 #define R_DMAC_B0_GRP_CH_CHSTAT_MODE_Msk (0x00000800UL) 39 #define R_DMAC_B0_GRP_CH_CHSTAT_MODE_Pos (11UL) 40 #define R_DMAC_B0_GRP_CH_CHSTAT_INTMSK_Msk (0x00010000UL) 41 #define R_DMAC_B0_GRP_CH_CHSTAT_INTMSK_Pos (16UL) 42 #define R_DMAC_B0_GRP_CH_CHCTRL_SETEN_Msk (0x00000001UL) 43 #define R_DMAC_B0_GRP_CH_CHCTRL_SETEN_Pos (0UL) 44 #define R_DMAC_B0_GRP_CH_CHCTRL_CLREN_Msk (0x00000002UL) 45 #define R_DMAC_B0_GRP_CH_CHCTRL_CLREN_Pos (1UL) 46 #define R_DMAC_B0_GRP_CH_CHCTRL_STG_Msk (0x00000004UL) 47 #define R_DMAC_B0_GRP_CH_CHCTRL_STG_Pos (2UL) 48 #define R_DMAC_B0_GRP_CH_CHCTRL_SWRST_Msk (0x00000008UL) 49 #define R_DMAC_B0_GRP_CH_CHCTRL_SWRST_Pos (3UL) 50 #define R_DMAC_B0_GRP_CH_CHCTRL_CLRRQ_Msk (0x00000010UL) 51 #define R_DMAC_B0_GRP_CH_CHCTRL_CLRRQ_Pos (4UL) 52 #define R_DMAC_B0_GRP_CH_CHCTRL_CLREND_Msk (0x00000020UL) 53 #define R_DMAC_B0_GRP_CH_CHCTRL_CLREND_Pos (5UL) 54 #define R_DMAC_B0_GRP_CH_CHCTRL_CLRTC_Msk (0x00000040UL) 55 #define R_DMAC_B0_GRP_CH_CHCTRL_CLRTC_Pos (6UL) 56 #define R_DMAC_B0_GRP_CH_CHCTRL_SETSUS_Msk (0x00000100UL) 57 #define R_DMAC_B0_GRP_CH_CHCTRL_SETSUS_Pos (8UL) 58 #define R_DMAC_B0_GRP_CH_CHCTRL_CLRSUS_Msk (0x00000200UL) 59 #define R_DMAC_B0_GRP_CH_CHCTRL_CLRSUS_Pos (9UL) 60 #define R_DMAC_B0_GRP_CH_CHCTRL_SETINTMSK_Msk (0x00010000UL) 61 #define R_DMAC_B0_GRP_CH_CHCTRL_SETINTMSK_Pos (16UL) 62 #define R_DMAC_B0_GRP_CH_CHCTRL_CLRINTMSK_Msk (0x00020000UL) 63 #define R_DMAC_B0_GRP_CH_CHCTRL_CLRINTMSK_Pos (17UL) 64 #define R_DMAC_B0_GRP_CH_CHCFG_SEL_Msk (0x00000007UL) 65 #define R_DMAC_B0_GRP_CH_CHCFG_SEL_Pos (0UL) 66 #define R_DMAC_B0_GRP_CH_CHCFG_REQD_Msk (0x00000008UL) 67 #define R_DMAC_B0_GRP_CH_CHCFG_REQD_Pos (3UL) 68 #define R_DMAC_B0_GRP_CH_CHCFG_LOEN_Msk (0x00000010UL) 69 #define R_DMAC_B0_GRP_CH_CHCFG_LOEN_Pos (4UL) 70 #define R_DMAC_B0_GRP_CH_CHCFG_HIEN_Msk (0x00000020UL) 71 #define R_DMAC_B0_GRP_CH_CHCFG_HIEN_Pos (5UL) 72 #define R_DMAC_B0_GRP_CH_CHCFG_LVL_Msk (0x00000040UL) 73 #define R_DMAC_B0_GRP_CH_CHCFG_LVL_Pos (6UL) 74 #define R_DMAC_B0_GRP_CH_CHCFG_AM_Msk (0x00000700UL) 75 #define R_DMAC_B0_GRP_CH_CHCFG_AM_Pos (8UL) 76 #define R_DMAC_B0_GRP_CH_CHCFG_SDS_Msk (0x0000F000UL) 77 #define R_DMAC_B0_GRP_CH_CHCFG_SDS_Pos (12UL) 78 #define R_DMAC_B0_GRP_CH_CHCFG_DDS_Msk (0x000F0000UL) 79 #define R_DMAC_B0_GRP_CH_CHCFG_DDS_Pos (16UL) 80 #define R_DMAC_B0_GRP_CH_CHCFG_SAD_Msk (0x00100000UL) 81 #define R_DMAC_B0_GRP_CH_CHCFG_SAD_Pos (20UL) 82 #define R_DMAC_B0_GRP_CH_CHCFG_DAD_Msk (0x00200000UL) 83 #define R_DMAC_B0_GRP_CH_CHCFG_DAD_Pos (21UL) 84 #define R_DMAC_B0_GRP_CH_CHCFG_TM_Msk (0x00400000UL) 85 #define R_DMAC_B0_GRP_CH_CHCFG_TM_Pos (22UL) 86 #define R_DMAC_B0_GRP_CH_CHCFG_DEM_Msk (0x01000000UL) 87 #define R_DMAC_B0_GRP_CH_CHCFG_DEM_Pos (24UL) 88 #define R_DMAC_B0_GRP_CH_CHCFG_TCM_Msk (0x02000000UL) 89 #define R_DMAC_B0_GRP_CH_CHCFG_TCM_Pos (25UL) 90 #define R_DMAC_B0_GRP_CH_CHCFG_SBE_Msk (0x08000000UL) 91 #define R_DMAC_B0_GRP_CH_CHCFG_SBE_Pos (27UL) 92 #define R_DMAC_B0_GRP_CH_CHCFG_RSEL_Msk (0x10000000UL) 93 #define R_DMAC_B0_GRP_CH_CHCFG_RSEL_Pos (28UL) 94 #define R_DMAC_B0_GRP_CH_CHCFG_RSW_Msk (0x20000000UL) 95 #define R_DMAC_B0_GRP_CH_CHCFG_RSW_Pos (29UL) 96 #define R_DMAC_B0_GRP_CH_CHCFG_REN_Msk (0x40000000UL) 97 #define R_DMAC_B0_GRP_CH_CHCFG_REN_Pos (30UL) 98 #define R_DMAC_B0_GRP_CH_CHCFG_DMS_Msk (0x80000000UL) 99 #define R_DMAC_B0_GRP_CH_CHCFG_DMS_Pos (31UL) 100 #define R_DMAC_B0_GRP_CH_CHITVL_ITVL_Msk (0x0000FFFFUL) 101 #define R_DMAC_B0_GRP_CH_CHITVL_ITVL_Pos (0UL) 102 #define R_DMAC_B0_GRP_CH_CHEXT_SPR_Msk (0x00000007UL) 103 #define R_DMAC_B0_GRP_CH_CHEXT_SPR_Pos (0UL) 104 #define R_DMAC_B0_GRP_CH_CHEXT_SCA_Msk (0x000000F0UL) 105 #define R_DMAC_B0_GRP_CH_CHEXT_SCA_Pos (4UL) 106 #define R_DMAC_B0_GRP_CH_CHEXT_DPR_Msk (0x00000700UL) 107 #define R_DMAC_B0_GRP_CH_CHEXT_DPR_Pos (8UL) 108 #define R_DMAC_B0_GRP_CH_CHEXT_DCA_Msk (0x0000F000UL) 109 #define R_DMAC_B0_GRP_CH_CHEXT_DCA_Pos (12UL) 110 #define R_DMAC_B0_GRP_DCTRL_PR_Msk (0x00000001UL) 111 #define R_DMAC_B0_GRP_DCTRL_PR_Pos (0UL) 112 #define R_DMAC_B0_GRP_DCTRL_LVINT_Msk (0x00000002UL) 113 #define R_DMAC_B0_GRP_DCTRL_LVINT_Pos (1UL) 114 #define R_DMAC_B0_GRP_DCTRL_LDPR_Msk (0x00070000UL) 115 #define R_DMAC_B0_GRP_DCTRL_LDPR_Pos (16UL) 116 #define R_DMAC_B0_GRP_DCTRL_LDCA_Msk (0x00F00000UL) 117 #define R_DMAC_B0_GRP_DCTRL_LDCA_Pos (20UL) 118 #define R_DMAC_B0_GRP_DCTRL_LWPR_Msk (0x07000000UL) 119 #define R_DMAC_B0_GRP_DCTRL_LWPR_Pos (24UL) 120 #define R_DMAC_B0_GRP_DCTRL_LWCA_Msk (0xF0000000UL) 121 #define R_DMAC_B0_GRP_DCTRL_LWCA_Pos (28UL) 122 #define R_DMAC_B0_GRP_DST_EN_EN0_Msk (0x00000001UL) 123 #define R_DMAC_B0_GRP_DST_EN_EN0_Pos (0UL) 124 #define R_DMAC_B0_GRP_DST_EN_EN1_Msk (0x00000002UL) 125 #define R_DMAC_B0_GRP_DST_EN_EN1_Pos (1UL) 126 #define R_DMAC_B0_GRP_DST_EN_EN2_Msk (0x00000004UL) 127 #define R_DMAC_B0_GRP_DST_EN_EN2_Pos (2UL) 128 #define R_DMAC_B0_GRP_DST_EN_EN3_Msk (0x00000008UL) 129 #define R_DMAC_B0_GRP_DST_EN_EN3_Pos (3UL) 130 #define R_DMAC_B0_GRP_DST_EN_EN4_Msk (0x00000010UL) 131 #define R_DMAC_B0_GRP_DST_EN_EN4_Pos (4UL) 132 #define R_DMAC_B0_GRP_DST_EN_EN5_Msk (0x00000020UL) 133 #define R_DMAC_B0_GRP_DST_EN_EN5_Pos (5UL) 134 #define R_DMAC_B0_GRP_DST_EN_EN6_Msk (0x00000040UL) 135 #define R_DMAC_B0_GRP_DST_EN_EN6_Pos (6UL) 136 #define R_DMAC_B0_GRP_DST_EN_EN7_Msk (0x00000080UL) 137 #define R_DMAC_B0_GRP_DST_EN_EN7_Pos (7UL) 138 #define R_DMAC_B0_GRP_DST_ER_ER0_Msk (0x00000001UL) 139 #define R_DMAC_B0_GRP_DST_ER_ER0_Pos (0UL) 140 #define R_DMAC_B0_GRP_DST_ER_ER1_Msk (0x00000002UL) 141 #define R_DMAC_B0_GRP_DST_ER_ER1_Pos (1UL) 142 #define R_DMAC_B0_GRP_DST_ER_ER2_Msk (0x00000004UL) 143 #define R_DMAC_B0_GRP_DST_ER_ER2_Pos (2UL) 144 #define R_DMAC_B0_GRP_DST_ER_ER3_Msk (0x00000008UL) 145 #define R_DMAC_B0_GRP_DST_ER_ER3_Pos (3UL) 146 #define R_DMAC_B0_GRP_DST_ER_ER4_Msk (0x00000010UL) 147 #define R_DMAC_B0_GRP_DST_ER_ER4_Pos (4UL) 148 #define R_DMAC_B0_GRP_DST_ER_ER5_Msk (0x00000020UL) 149 #define R_DMAC_B0_GRP_DST_ER_ER5_Pos (5UL) 150 #define R_DMAC_B0_GRP_DST_ER_ER6_Msk (0x00000040UL) 151 #define R_DMAC_B0_GRP_DST_ER_ER6_Pos (6UL) 152 #define R_DMAC_B0_GRP_DST_ER_ER7_Msk (0x00000080UL) 153 #define R_DMAC_B0_GRP_DST_ER_ER7_Pos (7UL) 154 #define R_DMAC_B0_GRP_DST_END_END0_Msk (0x00000001UL) 155 #define R_DMAC_B0_GRP_DST_END_END0_Pos (0UL) 156 #define R_DMAC_B0_GRP_DST_END_END1_Msk (0x00000002UL) 157 #define R_DMAC_B0_GRP_DST_END_END1_Pos (1UL) 158 #define R_DMAC_B0_GRP_DST_END_END2_Msk (0x00000004UL) 159 #define R_DMAC_B0_GRP_DST_END_END2_Pos (2UL) 160 #define R_DMAC_B0_GRP_DST_END_END3_Msk (0x00000008UL) 161 #define R_DMAC_B0_GRP_DST_END_END3_Pos (3UL) 162 #define R_DMAC_B0_GRP_DST_END_END4_Msk (0x00000010UL) 163 #define R_DMAC_B0_GRP_DST_END_END4_Pos (4UL) 164 #define R_DMAC_B0_GRP_DST_END_END5_Msk (0x00000020UL) 165 #define R_DMAC_B0_GRP_DST_END_END5_Pos (5UL) 166 #define R_DMAC_B0_GRP_DST_END_END6_Msk (0x00000040UL) 167 #define R_DMAC_B0_GRP_DST_END_END6_Pos (6UL) 168 #define R_DMAC_B0_GRP_DST_END_END7_Msk (0x00000080UL) 169 #define R_DMAC_B0_GRP_DST_END_END7_Pos (7UL) 170 #define R_DMAC_B0_GRP_DST_TC_TC0_Msk (0x00000001UL) 171 #define R_DMAC_B0_GRP_DST_TC_TC0_Pos (0UL) 172 #define R_DMAC_B0_GRP_DST_TC_TC1_Msk (0x00000002UL) 173 #define R_DMAC_B0_GRP_DST_TC_TC1_Pos (1UL) 174 #define R_DMAC_B0_GRP_DST_TC_TC2_Msk (0x00000004UL) 175 #define R_DMAC_B0_GRP_DST_TC_TC2_Pos (2UL) 176 #define R_DMAC_B0_GRP_DST_TC_TC3_Msk (0x00000008UL) 177 #define R_DMAC_B0_GRP_DST_TC_TC3_Pos (3UL) 178 #define R_DMAC_B0_GRP_DST_TC_TC4_Msk (0x00000010UL) 179 #define R_DMAC_B0_GRP_DST_TC_TC4_Pos (4UL) 180 #define R_DMAC_B0_GRP_DST_TC_TC5_Msk (0x00000020UL) 181 #define R_DMAC_B0_GRP_DST_TC_TC5_Pos (5UL) 182 #define R_DMAC_B0_GRP_DST_TC_TC6_Msk (0x00000040UL) 183 #define R_DMAC_B0_GRP_DST_TC_TC6_Pos (6UL) 184 #define R_DMAC_B0_GRP_DST_TC_TC7_Msk (0x00000080UL) 185 #define R_DMAC_B0_GRP_DST_TC_TC7_Pos (7UL) 186 #define R_DMAC_B0_GRP_DST_SUS_SUS0_Msk (0x00000001UL) 187 #define R_DMAC_B0_GRP_DST_SUS_SUS0_Pos (0UL) 188 #define R_DMAC_B0_GRP_DST_SUS_SUS1_Msk (0x00000002UL) 189 #define R_DMAC_B0_GRP_DST_SUS_SUS1_Pos (1UL) 190 #define R_DMAC_B0_GRP_DST_SUS_SUS2_Msk (0x00000004UL) 191 #define R_DMAC_B0_GRP_DST_SUS_SUS2_Pos (2UL) 192 #define R_DMAC_B0_GRP_DST_SUS_SUS3_Msk (0x00000008UL) 193 #define R_DMAC_B0_GRP_DST_SUS_SUS3_Pos (3UL) 194 #define R_DMAC_B0_GRP_DST_SUS_SUS4_Msk (0x00000010UL) 195 #define R_DMAC_B0_GRP_DST_SUS_SUS4_Pos (4UL) 196 #define R_DMAC_B0_GRP_DST_SUS_SUS5_Msk (0x00000020UL) 197 #define R_DMAC_B0_GRP_DST_SUS_SUS5_Pos (5UL) 198 #define R_DMAC_B0_GRP_DST_SUS_SUS6_Msk (0x00000040UL) 199 #define R_DMAC_B0_GRP_DST_SUS_SUS6_Pos (6UL) 200 #define R_DMAC_B0_GRP_DST_SUS_SUS7_Msk (0x00000080UL) 201 #define R_DMAC_B0_GRP_DST_SUS_SUS7_Pos (7UL) 202 #define R_DMAC_B0_EX_DMARS0_CH0_RID_Msk (0x00000003UL) 203 #define R_DMAC_B0_EX_DMARS0_CH0_RID_Pos (0UL) 204 #define R_DMAC_B0_EX_DMARS0_CH0_MID_Msk (0x000003FCUL) 205 #define R_DMAC_B0_EX_DMARS0_CH0_MID_Pos (2UL) 206 #define R_DMAC_B0_EX_DMARS0_CH1_RID_Msk (0x00030000UL) 207 #define R_DMAC_B0_EX_DMARS0_CH1_RID_Pos (16UL) 208 #define R_DMAC_B0_EX_DMARS0_CH1_MID_Msk (0x03FC0000UL) 209 #define R_DMAC_B0_EX_DMARS0_CH1_MID_Pos (18UL) 210 #define R_DMAC_B0_EX_DMARS1_CH2_RID_Msk (0x00000003UL) 211 #define R_DMAC_B0_EX_DMARS1_CH2_RID_Pos (0UL) 212 #define R_DMAC_B0_EX_DMARS1_CH2_MID_Msk (0x000003FCUL) 213 #define R_DMAC_B0_EX_DMARS1_CH2_MID_Pos (2UL) 214 #define R_DMAC_B0_EX_DMARS1_CH3_RID_Msk (0x00030000UL) 215 #define R_DMAC_B0_EX_DMARS1_CH3_RID_Pos (16UL) 216 #define R_DMAC_B0_EX_DMARS1_CH3_MID_Msk (0x03FC0000UL) 217 #define R_DMAC_B0_EX_DMARS1_CH3_MID_Pos (18UL) 218 #define R_DMAC_B0_EX_DMARS2_CH4_RID_Msk (0x00000003UL) 219 #define R_DMAC_B0_EX_DMARS2_CH4_RID_Pos (0UL) 220 #define R_DMAC_B0_EX_DMARS2_CH4_MID_Msk (0x000003FCUL) 221 #define R_DMAC_B0_EX_DMARS2_CH4_MID_Pos (2UL) 222 #define R_DMAC_B0_EX_DMARS2_CH5_RID_Msk (0x00030000UL) 223 #define R_DMAC_B0_EX_DMARS2_CH5_RID_Pos (16UL) 224 #define R_DMAC_B0_EX_DMARS2_CH5_MID_Msk (0x03FC0000UL) 225 #define R_DMAC_B0_EX_DMARS2_CH5_MID_Pos (18UL) 226 #define R_DMAC_B0_EX_DMARS3_CH6_RID_Msk (0x00000003UL) 227 #define R_DMAC_B0_EX_DMARS3_CH6_RID_Pos (0UL) 228 #define R_DMAC_B0_EX_DMARS3_CH6_MID_Msk (0x000003FCUL) 229 #define R_DMAC_B0_EX_DMARS3_CH6_MID_Pos (2UL) 230 #define R_DMAC_B0_EX_DMARS3_CH7_RID_Msk (0x00030000UL) 231 #define R_DMAC_B0_EX_DMARS3_CH7_RID_Pos (16UL) 232 #define R_DMAC_B0_EX_DMARS3_CH7_MID_Msk (0x03FC0000UL) 233 #define R_DMAC_B0_EX_DMARS3_CH7_MID_Pos (18UL) 234 #define R_DMAC_B0_EX_DMARS4_CH8_RID_Msk (0x00000003UL) 235 #define R_DMAC_B0_EX_DMARS4_CH8_RID_Pos (0UL) 236 #define R_DMAC_B0_EX_DMARS4_CH8_MID_Msk (0x000003FCUL) 237 #define R_DMAC_B0_EX_DMARS4_CH8_MID_Pos (2UL) 238 #define R_DMAC_B0_EX_DMARS4_CH9_RID_Msk (0x00030000UL) 239 #define R_DMAC_B0_EX_DMARS4_CH9_RID_Pos (16UL) 240 #define R_DMAC_B0_EX_DMARS4_CH9_MID_Msk (0x03FC0000UL) 241 #define R_DMAC_B0_EX_DMARS4_CH9_MID_Pos (18UL) 242 #define R_DMAC_B0_EX_DMARS5_CH10_RID_Msk (0x00000003UL) 243 #define R_DMAC_B0_EX_DMARS5_CH10_RID_Pos (0UL) 244 #define R_DMAC_B0_EX_DMARS5_CH10_MID_Msk (0x000003FCUL) 245 #define R_DMAC_B0_EX_DMARS5_CH10_MID_Pos (2UL) 246 #define R_DMAC_B0_EX_DMARS5_CH11_RID_Msk (0x00030000UL) 247 #define R_DMAC_B0_EX_DMARS5_CH11_RID_Pos (16UL) 248 #define R_DMAC_B0_EX_DMARS5_CH11_MID_Msk (0x03FC0000UL) 249 #define R_DMAC_B0_EX_DMARS5_CH11_MID_Pos (18UL) 250 #define R_DMAC_B0_EX_DMARS6_CH12_RID_Msk (0x00000003UL) 251 #define R_DMAC_B0_EX_DMARS6_CH12_RID_Pos (0UL) 252 #define R_DMAC_B0_EX_DMARS6_CH12_MID_Msk (0x000003FCUL) 253 #define R_DMAC_B0_EX_DMARS6_CH12_MID_Pos (2UL) 254 #define R_DMAC_B0_EX_DMARS6_CH13_RID_Msk (0x00030000UL) 255 #define R_DMAC_B0_EX_DMARS6_CH13_RID_Pos (16UL) 256 #define R_DMAC_B0_EX_DMARS6_CH13_MID_Msk (0x03FC0000UL) 257 #define R_DMAC_B0_EX_DMARS6_CH13_MID_Pos (18UL) 258 #define R_DMAC_B0_EX_DMARS7_CH14_RID_Msk (0x00000003UL) 259 #define R_DMAC_B0_EX_DMARS7_CH14_RID_Pos (0UL) 260 #define R_DMAC_B0_EX_DMARS7_CH14_MID_Msk (0x000003FCUL) 261 #define R_DMAC_B0_EX_DMARS7_CH14_MID_Pos (2UL) 262 #define R_DMAC_B0_EX_DMARS7_CH15_RID_Msk (0x00030000UL) 263 #define R_DMAC_B0_EX_DMARS7_CH15_RID_Pos (16UL) 264 #define R_DMAC_B0_EX_DMARS7_CH15_MID_Msk (0x03FC0000UL) 265 #define R_DMAC_B0_EX_DMARS7_CH15_MID_Pos (18UL) 266 267 #endif 268
