1 /* 2 * Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef BSP_MODULE_H 8 #define BSP_MODULE_H 9 10 /** Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */ 11 FSP_HEADER 12 13 /*******************************************************************************************************************//** 14 * @addtogroup BSP_MCU 15 * @{ 16 **********************************************************************************************************************/ 17 18 /********************************************************************************************************************** 19 * Macro definitions 20 *********************************************************************************************************************/ 21 22 /******************************************************************************************************************//** 23 * Cancels the module stop state. 24 * 25 * @param ip fsp_ip_t enum value for the module to be started. 26 * @param channel The channel. Use ch 0 for modules without channels. 27 *********************************************************************************************************************/ 28 #define R_BSP_MSTP_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; \ 29 FSP_CRITICAL_SECTION_ENTER; \ 30 BSP_MSTP_REG_ ## ip(channel) = 0x00000000U \ 31 | (BSP_MSTP_BIT_ ## ip(channel) << 16U); \ 32 BSP_MSTP_REG_ ## ip(channel); \ 33 FSP_CRITICAL_SECTION_EXIT;} 34 35 /*******************************************************************************************************************//** 36 * Enables the module stop state. 37 * 38 * @param ip fsp_ip_t enum value for the module to be stopped. 39 * @param channel The channel. Use ch 0 for modules without channels. 40 *********************************************************************************************************************/ 41 #define R_BSP_MSTP_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; \ 42 FSP_CRITICAL_SECTION_ENTER; \ 43 BSP_MSTP_REG_ ## ip(channel) = 0x0000FFFFU \ 44 | (BSP_MSTP_BIT_ ## ip(channel) << 16U); \ 45 BSP_MSTP_REG_ ## ip(channel); \ 46 FSP_CRITICAL_SECTION_EXIT;} 47 48 /** @} (end addtogroup BSP_MCU) */ 49 #define BSP_MSTP_REG_FSP_IP_GTM(channel) R_CPG->CPG_BUS_REG0_MSTOP 50 #define BSP_MSTP_BIT_FSP_IP_GTM(channel) (1U << (R_CPG_CPG_BUS_REG0_MSTOP_MSTOP4_ON_Pos + channel)) 51 52 #define BSP_MSTP_REG_FSP_IP_GPT(channel) R_CPG->CPG_BUS_MCPU1_MSTOP 53 #define BSP_MSTP_BIT_FSP_IP_GPT(channel) (1U << R_CPG_CPG_BUS_MCPU1_MSTOP_MSTOP4_ON_Pos) 54 55 #define BSP_MSTP_REG_FSP_IP_POEG(channel) R_CPG->CPG_BUS_MCPU1_MSTOP 56 #define BSP_MSTP_BIT_FSP_IP_POEG(channel) (1U << (R_CPG_CPG_BUS_MCPU1_MSTOP_MSTOP5_ON_Pos + channel)) 57 58 #define BSP_MSTP_REG_FSP_IP_PORT(channel) R_CPG->CPG_BUS_PERI_CPU_MSTOP 59 #define BSP_MSTP_BIT_FSP_IP_PORT(channel) (1U << R_CPG_CPG_BUS_PERI_CPU_MSTOP_MSTOP6_ON_Pos) 60 61 #define BSP_MSTP_REG_FSP_IP_IM33(channel) R_CPG->CPG_BUS_PERI_CPU_MSTOP 62 #define BSP_MSTP_BIT_FSP_IP_IM33(channel) (1U << R_CPG_CPG_BUS_PERI_CPU_MSTOP_MSTOP14_ON_Pos) 63 64 #ifndef BSP_MSTP_REG_FSP_IP_SCIF 65 #define BSP_MSTP_REG_FSP_IP_SCIF(channel) R_CPG->CPG_BUS_MCPU2_MSTOP 66 #endif 67 #ifndef BSP_MSTP_BIT_FSP_IP_SCIF 68 #define BSP_MSTP_BIT_FSP_IP_SCIF(channel) (1U << (R_CPG_CPG_BUS_MCPU2_MSTOP_MSTOP1_ON_Pos + channel)) 69 #endif 70 71 #define BSP_MSTP_REG_FSP_IP_RIIC(channel) R_CPG->CPG_BUS_MCPU2_MSTOP 72 #define BSP_MSTP_BIT_FSP_IP_RIIC(channel) (1U << (R_CPG_CPG_BUS_MCPU2_MSTOP_MSTOP10_ON_Pos + channel)) 73 74 #ifndef BSP_MSTP_REG_FSP_IP_RSPI 75 #define BSP_MSTP_REG_FSP_IP_RSPI(channel) *((1U >= \ 76 channel) ? &R_CPG->CPG_BUS_MCPU1_MSTOP : &R_CPG->CPG_BUS_MCPU2_MSTOP) 77 #endif 78 #ifndef BSP_MSTP_BIT_FSP_IP_RSPI 79 #define BSP_MSTP_BIT_FSP_IP_RSPI(channel) ((1U >= \ 80 channel) ? (1U << (R_CPG_CPG_BUS_MCPU1_MSTOP_MSTOP14_ON_Pos + channel)) \ 81 : (1U << R_CPG_CPG_BUS_MCPU2_MSTOP_MSTOP0_ON_Pos)) 82 #endif 83 84 #define BSP_MSTP_REG_FSP_IP_MHU(channel) R_CPG->CPG_MHU_MSTOP 85 #define BSP_MSTP_BIT_FSP_IP_MHU(channel) (1U << R_CPG_CPG_MHU_MSTOP_MSTOP0_ON_Pos) 86 87 #define BSP_MSTP_REG_FSP_IP_DMAC(channel) R_CPG->CPG_BUS_REG1_MSTOP 88 #define BSP_MSTP_BIT_FSP_IP_DMAC(channel) (3U << \ 89 (R_CPG_CPG_BUS_REG1_MSTOP_MSTOP0_ON_Pos + \ 90 (channel * R_CPG_CPG_BUS_REG1_MSTOP_MSTOP2_ON_Pos))) 91 #define BSP_MSTP_REG_FSP_IP_DMAC_s(channel) BSP_MSTP_REG_FSP_IP_DMAC(channel) 92 #define BSP_MSTP_BIT_FSP_IP_DMAC_s(channel) BSP_MSTP_BIT_FSP_IP_DMAC(channel) 93 94 #define BSP_MSTP_REG_FSP_IP_SSI(channel) R_CPG->CPG_BUS_MCPU1_MSTOP 95 #define BSP_MSTP_BIT_FSP_IP_SSI(channel) (1U << (R_CPG_CPG_BUS_MCPU1_MSTOP_MSTOP10_ON_Pos + channel)) 96 97 #define BSP_MSTP_REG_FSP_IP_CANFD(channel) R_CPG->CPG_BUS_MCPU2_MSTOP 98 #define BSP_MSTP_BIT_FSP_IP_CANFD(channel) (1U << R_CPG_CPG_BUS_MCPU2_MSTOP_MSTOP9_ON_Pos) 99 100 #define BSP_MSTP_REG_FSP_IP_ADC(channel) R_CPG->CPG_BUS_MCPU2_MSTOP 101 #define BSP_MSTP_BIT_FSP_IP_ADC(channel) (1U << R_CPG_CPG_BUS_MCPU2_MSTOP_MSTOP14_ON_Pos) 102 103 #define BSP_MSTP_REG_FSP_IP_TSU(channel) R_CPG->CPG_BUS_MCPU2_MSTOP 104 #define BSP_MSTP_BIT_FSP_IP_TSU(channel) (1U << R_CPG_CPG_BUS_MCPU2_MSTOP_MSTOP15_ON_Pos) 105 106 #define BSP_MSTP_REG_FSP_IP_WDT(channel) R_CPG->CPG_BUS_REG0_MSTOP 107 #define BSP_MSTP_BIT_FSP_IP_WDT(channel) ((2U == (channel)) ? (1U << R_CPG_CPG_BUS_REG0_MSTOP_MSTOP1_ON_Pos) \ 108 : (1U << (R_CPG_CPG_BUS_REG0_MSTOP_MSTOP2_ON_Pos + channel))) 109 110 #define BSP_MSTP_REG_FSP_IP_SCI(channel) R_CPG->CPG_BUS_MCPU2_MSTOP 111 #define BSP_MSTP_BIT_FSP_IP_SCI(channel) (1U << (R_CPG_CPG_BUS_MCPU2_MSTOP_MSTOP7_ON_Pos + channel)) 112 113 #define BSP_MSTP_REG_FSP_IP_MTU3(channel) R_CPG->CPG_BUS_MCPU1_MSTOP 114 #define BSP_MSTP_BIT_FSP_IP_MTU3(channel) (1U << (R_CPG_CPG_BUS_MCPU1_MSTOP_MSTOP2_ON_Pos)) 115 116 /** Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ 117 FSP_FOOTER 118 119 /*********************************************************************************************************************** 120 * Typedef definitions 121 **********************************************************************************************************************/ 122 123 /*********************************************************************************************************************** 124 * Exported global variables 125 **********************************************************************************************************************/ 126 127 /*********************************************************************************************************************** 128 * Exported global functions (to be accessed by other files) 129 **********************************************************************************************************************/ 130 131 #endif /* BSP_MODULE_H */ 132
