1 /* 2 * Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 /********************************************************************************************************************** 8 * Includes <System Includes> , "Project Includes" 9 *********************************************************************************************************************/ 10 #ifndef HW_SCE_RA_PRIVATE_HEADER_FILE 11 #define HW_SCE_RA_PRIVATE_HEADER_FILE 12 13 #include "hw_sce_aes_private.h" 14 15 /********************************************************************************************************************** 16 * Macro definitions 17 *********************************************************************************************************************/ 18 19 #define SIZE_AES_GCM_IN_DATA_BYTES (256) 20 #define SIZE_AES_GCM_IN_DATA_IV_LEN_BYTES (16) 21 #define SIZE_AES_GCM_IN_DATA_IV_GCM_LEN_BYTES (512) 22 #define SIZE_AES_GCM_IN_DATA_AAD_LEN_BYTES (128) 23 24 #define SCE_AES_GCM_IN_DATA_IV_LEN_LOC (32) 25 26 #define SCE_AES_IN_DATA_CMD_ECB_ENCRYPTION (0x00000000U) 27 #define SCE_AES_IN_DATA_CMD_ECB_DECRYPTION (0x00000001U) 28 #define SCE_AES_IN_DATA_CMD_CBC_ENCRYPTION (0x00000002U) 29 #define SCE_AES_IN_DATA_CMD_CBC_DECRYPTION (0x00000003U) 30 #define SCE_AES_IN_DATA_CMD_CTR_ENCRYPTION_DECRYPTION (0x00000004U) 31 32 #define SCE_AES_IN_DATA_CMD_CCM_128_ENC_COMMON_INIT (0U) 33 #define SCE_AES_IN_DATA_CMD_CCM_192_ENC_COMMON_INIT (1U) 34 #define SCE_AES_IN_DATA_CMD_CCM_256_ENC_COMMON_INIT (2U) 35 #define SCE_AES_IN_DATA_CMD_CCM_ENC_COUNTER_GENERATE (3U) 36 #define SCE_AES_IN_DATA_CMD_CCM_ENC_FORMAT_A_DATA (4U) 37 #define SCE_AES_IN_DATA_CMD_CCM_ENC_CTR_ENCRYPT (5U) 38 #define SCE_AES_IN_DATA_CMD_CCM_ENC_GENERATE_TAG (6U) 39 #define SCE_AES_IN_DATA_CMD_CCM_128_DEC_COMMON_INIT (7U) 40 #define SCE_AES_IN_DATA_CMD_CCM_192_DEC_COMMON_INIT (8U) 41 #define SCE_AES_IN_DATA_CMD_CCM_256_DEC_COMMON_INIT (9U) 42 #define SCE_AES_IN_DATA_CMD_CCM_DEC_COUNTER_GENERATE (10U) 43 #define SCE_AES_IN_DATA_CMD_CCM_DEC_CTR_DECRYPT (11U) 44 #define SCE_AES_IN_DATA_CMD_CCM_DEC_FORMAT_A_DATA (12U) 45 #define SCE_AES_IN_DATA_CMD_CCM_DEC_FORMAT_PAYLOAD (13U) 46 #define SCE_AES_IN_DATA_CMD_CCM_DEC_GENERATE_TAG (14U) 47 48 /* Wrapped keys not supported on RA2; these definitions are added to let the code compile. */ 49 #define SIZE_AES_128BIT_KEYLEN_BITS_WRAPPED (1) 50 #define SIZE_AES_128BIT_KEYLEN_BYTES_WRAPPED ((SIZE_AES_128BIT_KEYLEN_BITS_WRAPPED) / 8) 51 #define SIZE_AES_128BIT_KEYLEN_WORDS_WRAPPED ((SIZE_AES_128BIT_KEYLEN_BITS_WRAPPED) / 32) 52 53 #define SIZE_AES_192BIT_KEYLEN_BITS_WRAPPED (2) /* 192 not supported on SCE5 */ 54 #define SIZE_AES_192BIT_KEYLEN_BYTES_WRAPPED ((SIZE_AES_192BIT_KEYLEN_BITS_WRAPPED) / 8) 55 #define SIZE_AES_192BIT_KEYLEN_WORDS_WRAPPED ((SIZE_AES_192BIT_KEYLEN_BITS_WRAPPED) / 32) 56 57 #define SIZE_AES_256BIT_KEYLEN_BITS_WRAPPED (3) 58 #define SIZE_AES_256BIT_KEYLEN_BYTES_WRAPPED ((SIZE_AES_256BIT_KEYLEN_BITS_WRAPPED) / 8) 59 #define SIZE_AES_256BIT_KEYLEN_WORDS_WRAPPED ((SIZE_AES_256BIT_KEYLEN_BITS_WRAPPED) / 32) 60 61 #define R_AES_AESCNTH_INIT (0x8000UL) /*!< AESCNTH initialization: Initialization AES Circuit */ 62 #define R_AES_AESCNTH_DEINIT (0x0000UL) /*!< AESCNTH deinitialization: Don’t Initialize AES Circuit */ 63 #define R_AES_AESCNTL_GCM_MODE (0x00A0UL) /*!< AESCNTL: Assign bit of Cipher use Mode: GCM mode */ 64 #define R_AES_AESCNTL_128_DEC (0x0008UL) /*!< AESCNTL: Decryption 128 bit (Bit 0-3 Selection bit of Encryption/Decryption and Key Length) */ 65 66 #define R_AES_AESCNTL_CBC_128_ENC (0x0000UL) /*!< AESCNTL: Encryption - CBC mode - 128 bits */ 67 #define R_AES_AESCNTL_CBC_192_ENC (0x0002UL) /*!< AESCNTL: Encryption - CBC mode - 192 bits */ 68 #define R_AES_AESCNTL_CBC_256_ENC (0x0004UL) /*!< AESCNTL: Encryption - CBC mode - 256 bits */ 69 #define R_AES_AESCNTL_CBC_128_DEC (0x0008UL) /*!< AESCNTL: Decryption - CBC mode - 128 bits */ 70 #define R_AES_AESCNTL_CBC_192_DEC (0x000AUL) /*!< AESCNTL: Decryption - CBC mode - 128 bits */ 71 #define R_AES_AESCNTL_CBC_256_DEC (0x000CUL) /*!< AESCNTL: Decryption - CBC mode - 128 bits */ 72 73 #define R_AES_AESCNTL_ECB_128_ENC (0x0010UL) /*!< AESCNTL: Encryption - ECB mode - 128 bits */ 74 #define R_AES_AESCNTL_ECB_192_ENC (0x0012UL) /*!< AESCNTL: Encryption - ECB mode - 192 bits */ 75 #define R_AES_AESCNTL_ECB_256_ENC (0x0014UL) /*!< AESCNTL: Encryption - ECB mode - 256 bits */ 76 #define R_AES_AESCNTL_ECB_128_DEC (0x0018UL) /*!< AESCNTL: Decryption - ECB mode - 128 bits */ 77 #define R_AES_AESCNTL_ECB_192_DEC (0x001AUL) /*!< AESCNTL: Decryption - ECB mode - 128 bits */ 78 #define R_AES_AESCNTL_ECB_256_DEC (0x001CUL) /*!< AESCNTL: Decryption - ECB mode - 128 bits */ 79 80 #define R_AES_AESCNTL_CTR_128_ENC (0x0040UL) /*!< AESCNTL: Encryption - CTR mode - 128 bits */ 81 #define R_AES_AESCNTL_CTR_192_ENC (0x0042UL) /*!< AESCNTL: Encryption - CTR mode - 192 bits */ 82 #define R_AES_AESCNTL_CTR_256_ENC (0x0044UL) /*!< AESCNTL: Encryption - CTR mode - 256 bits */ 83 #define R_AES_AESCNTL_CTR_128_DEC (0x0048UL) /*!< AESCNTL: Decryption - CTR mode - 128 bits */ 84 #define R_AES_AESCNTL_CTR_192_DEC (0x004AUL) /*!< AESCNTL: Decryption - CTR mode - 128 bits */ 85 #define R_AES_AESCNTL_CTR_256_DEC (0x004CUL) /*!< AESCNTL: Decryption - CTR mode - 128 bits */ 86 87 #define R_AES_AESCNTL_CMAC_128_ENC (0x0080UL) /*!< AESCNTL: Encryption - CMAC mode - 128 bits */ 88 #define R_AES_AESCNTL_CMAC_192_ENC (0x0082UL) /*!< AESCNTL: Encryption - CMAC mode - 192 bits */ 89 #define R_AES_AESCNTL_CMAC_256_ENC (0x0084UL) /*!< AESCNTL: Encryption - CMAC mode - 256 bits */ 90 #define R_AES_AESCNTL_CMAC_128_DEC (0x0088UL) /*!< AESCNTL: Decryption - CMAC mode - 128 bits */ 91 #define R_AES_AESCNTL_CMAC_192_DEC (0x008AUL) /*!< AESCNTL: Decryption - CMAC mode - 128 bits */ 92 #define R_AES_AESCNTL_CMAC_256_DEC (0x008CUL) /*!< AESCNTL: Decryption - CMAC mode - 128 bits */ 93 94 #define R_AES_AESCNTL_GCM_128_ENC (0x00A0UL) /*!< AESCNTL: Encryption - GCM mode - 128 bits */ 95 #define R_AES_AESCNTL_GCM_192_ENC (0x00A2UL) /*!< AESCNTL: Encryption - GCM mode - 192 bits */ 96 #define R_AES_AESCNTL_GCM_256_ENC (0x00A4UL) /*!< AESCNTL: Encryption - GCM mode - 256 bits */ 97 #define R_AES_AESCNTL_GCM_128_DEC (0x00A8UL) /*!< AESCNTL: Decryption - GCM mode - 128 bits */ 98 #define R_AES_AESCNTL_GCM_192_DEC (0x00AAUL) /*!< AESCNTL: Decryption - GCM mode - 128 bits */ 99 #define R_AES_AESCNTL_GCM_256_DEC (0x00ACUL) /*!< AESCNTL: Decryption - GCM mode - 128 bits */ 100 101 #define R_AES_AESCNTL_CCM_128_ENC (0x00C0UL) /*!< AESCNTL: Encryption - CCM mode - 128 bits */ 102 #define R_AES_AESCNTL_CCM_192_ENC (0x00C2UL) /*!< AESCNTL: Encryption - CCM mode - 192 bits */ 103 #define R_AES_AESCNTL_CCM_256_ENC (0x00C4UL) /*!< AESCNTL: Encryption - CCM mode - 256 bits */ 104 #define R_AES_AESCNTL_CCM_128_DEC (0x00C8UL) /*!< AESCNTL: Decryption - CCM mode - 128 bits */ 105 #define R_AES_AESCNTL_CCM_192_DEC (0x00CAUL) /*!< AESCNTL: Decryption - CCM mode - 128 bits */ 106 #define R_AES_AESCNTL_CCM_256_DEC (0x00CCUL) /*!< AESCNTL: Decryption - CCM mode - 128 bits */ 107 108 #define R_AES_AESDCNTL_BIT_2_3_MODE_1 (0x0008UL) /*!< AESDCNTL: Key update assign bit: Enable + First block contents control assign bit: Use (AES-ECB, AES-GCM) */ 109 #define R_AES_AESDCNTL_BIT_2_3_MODE_2 (0x000CUL) /*!< AESDCNTL: Key update assign bit: Enable + First block contents control assign bit: Not use (AES-CBC, AES-CTR) */ 110 #define R_AES_AESDCNTL_CALCULATE_START (0x0003UL) /*!< AESDCNTL: Start AES calculation - Start reflect AES Encryption/Decryption calculation result to AESODATnRegister */ 111 #define R_AES_AESDCNTL_BIT_2 (0x0004UL) /*!< AESDCNTL: Bit 2 */ 112 #define R_AES_AESDCNTL_BIT_3 (0x0008UL) /*!< AESDCNTL: Bit 3 */ 113 #define R_AES_AESDCNTL_BIT_4 (0x0010UL) /*!< AESDCNTL: Bit 4 */ 114 #define R_AES_AESDCNTL_BIT_5 (0x0020UL) /*!< AESDCNTL: Bit 5 */ 115 #define R_AES_AESDCNTL_BIT_6 (0x0040UL) /*!< AESDCNTL: Bit 6 */ 116 117 #define R_AES_AESDCNTL_FIST_SET (0x0004UL) /*!< AESDCNTL: FIRST = 1: The result of the previous calculation is not used for the calculation of the first block */ 118 #define R_AES_AESDCNTL_NEW_KEY_SET (0x0008UL) /*!< AESDCNTL: NEW_KEY = 1: Key data are updated using the data set in the AESKEYn registers */ 119 #define R_AES_AESDCNTL_ATTR_CCM_MODE_1 (0x0020UL) /*!< AESDCNTL: ATTR[2:0] = 001: The input data as the parameter B0 of the formatting function */ 120 #define R_AES_AESDCNTL_ATTR_CCM_MODE_2 (0x0040UL) /*!< AESDCNTL: ATTR[2:0] = 010: In encryption: Setting prohibited, In decryption: A ciphertext */ 121 #define R_AES_AESDCNTL_ATTR_CCM_MODE_3 (0x0060UL) /*!< AESDCNTL: ATTR[2:0] = 011: The input data as A (associated data) of the formatting function */ 122 #define R_AES_AESDCNTL_ATTR_CCM_MODE_4 (0x0080UL) /*!< AESDCNTL: ATTR[2:0] = 100: Indicating the input data are a plaintext */ 123 #define R_AES_AESDCNTL_ATTR_CCM_MODE_5 (0x0000UL) /*!< AESDCNTL: ATTR[2:0] = 000: In encryption: The dummy input data used for calculation of T XOR MSBTlen(S0) 124 * In decryption: Setting prohibited */ 125 #define R_AES_AESDCNTL_ATTR_CCM_MODE_6 (0x00A0UL) /*!< AESDCNTL: ATTR[2:0] = 101: In encryption: Setting prohibited 126 * In decryption: The input data to be calculated by T XOR MSBTlen(S0) */ 127 128 #define R_AES_AESSTSL_BIT_5 (0x0020UL) /*!< AESSTSL: Bit 5: Status Bit to show AES operation status */ 129 #define R_AES_AESSTSL_CALCULATE_COMPLETED (0x0003UL) /*!< AESSTSL: Bit 0-1: Status Bit to show AES Encryption/Decryption completion */ 130 #define R_AES_AESSTSCL_DATA_CLEAN (0x0003UL) /*!< AESSTSCL: Bit 0-1: clear bit1.0 state in AES Status Register */ 131 132 #define R_AES_AESDCNTH_EXECUTE_TAG_CALCULATION (0x0002UL) /*!< AESDCNTH: Bit 1 = 1: The calculation of tag is executed, and result is stored in the AESODATn registers */ 133 #define R_AES_AESDCNTH_NOT_EXECUTE_TAG_CALCULATION (0x0000UL) /*!< AESDCNTH: Bit 1 = 0: Don't execute calculation of tag */ 134 135 #define HW_AES_DATA_FIT_TO_BLOCK_SIZE(x) ((uint32_t) x & 0xFFFFFFF0) 136 #define HW_AES_DATA_GET_LAST_REMAINS(x) ((uint32_t) x & 0x0000000F) 137 #define HW_32BIT_ALIGNED(x) !(x & 0x03) 138 139 /********************************************************************************************************************** 140 * Global Typedef definitions 141 *********************************************************************************************************************/ 142 143 /********************************************************************************************************************** 144 * External global variables 145 *********************************************************************************************************************/ 146 147 /********************************************************************************************************************** 148 * Exported global functions 149 *********************************************************************************************************************/ 150 151 /*********************************************************************************************************************** 152 * Private global variables and functions 153 ***********************************************************************************************************************/ 154 uint32_t change_endian_long(uint32_t data); 155 void hw_aes_set_key(uint8_t * key, uint32_t KeyLen); 156 void hw_aes_set_iv(uint8_t * initialize_vetor); 157 void hw_aes_start(uint8_t * input, uint8_t * output, uint32_t block); 158 void hw_aes_ccm_mode_start(uint8_t * input, uint8_t * output, uint32_t block); 159 fsp_err_t hw_gcm_calculation(uint8_t * input, 160 uint8_t * output, 161 uint32_t data_len, 162 uint8_t * atag, 163 uint8_t * initial_vector, 164 uint32_t iv_len, 165 uint8_t * aad, 166 uint32_t aad_len); 167 168 void HW_SCE_AesCcmDecryptCounterGenerate(uint32_t InData_TextLength, 169 uint32_t InData_Hdrlen, 170 uint32_t InData_MacLength, 171 uint32_t InData_IVLength); 172 173 fsp_err_t HW_SCE_Aes128EncryptDecryptInitSub(const uint32_t * InData_KeyType, 174 const uint32_t * InData_Cmd, 175 const uint32_t * InData_KeyIndex, 176 const uint32_t * InData_IV); 177 178 void HW_SCE_Aes128EncryptDecryptUpdateSub(const uint32_t * InData_Text, 179 uint32_t * OutData_Text, 180 const uint32_t MAX_CNT); 181 fsp_err_t HW_SCE_Aes128EncryptDecryptFinalSub(void); 182 183 fsp_err_t HW_SCE_Aes192EncryptDecryptInitSub(const uint32_t * InData_Cmd, 184 const uint32_t * InData_KeyIndex, 185 const uint32_t * InData_IV); 186 void HW_SCE_Aes192EncryptDecryptUpdateSub(const uint32_t * InData_Text, 187 uint32_t * OutData_Text, 188 const uint32_t MAX_CNT); 189 fsp_err_t HW_SCE_Aes192EncryptDecryptFinalSub(void); 190 fsp_err_t HW_SCE_Aes256EncryptDecryptInitSub(const uint32_t * InData_KeyType, 191 const uint32_t * InData_Cmd, 192 const uint32_t * InData_KeyIndex, 193 const uint32_t * InData_IV); 194 void HW_SCE_Aes256EncryptDecryptUpdateSub(const uint32_t * InData_Text, 195 uint32_t * OutData_Text, 196 const uint32_t MAX_CNT); 197 fsp_err_t HW_SCE_Aes256EncryptDecryptFinalSub(void); 198 199 fsp_err_t HW_SCE_Aes128GcmEncryptInitSub(uint32_t * InData_KeyType, uint32_t * InData_KeyIndex, uint32_t * InData_IV); 200 void HW_SCE_Aes128GcmEncryptUpdateAADSub(uint32_t * InData_DataA, uint32_t MAX_CNT); 201 void HW_SCE_Aes128GcmEncryptUpdateTransitionSub(void); 202 void HW_SCE_Aes128GcmEncryptUpdateSub(uint32_t * InData_Text, uint32_t * OutData_Text, uint32_t MAX_CNT); 203 fsp_err_t HW_SCE_Aes128GcmEncryptFinalSub(uint32_t * InData_Text, 204 uint32_t * InData_DataALen, 205 uint32_t * InData_TextLen, 206 uint32_t * OutData_Text, 207 uint32_t * OutData_DataT); 208 fsp_err_t HW_SCE_Aes128GcmDecryptInitSub(uint32_t * InData_KeyType, uint32_t * InData_KeyIndex, uint32_t * InData_IV); 209 void HW_SCE_Aes128GcmDecryptUpdateAADSub(uint32_t * InData_DataA, uint32_t MAX_CNT); 210 void HW_SCE_Aes128GcmDecryptUpdateTransitionSub(void); 211 void HW_SCE_Aes128GcmDecryptUpdateSub(uint32_t * InData_Text, uint32_t * OutData_Text, uint32_t MAX_CNT); 212 fsp_err_t HW_SCE_Aes128GcmDecryptFinalSub(uint32_t * InData_Text, 213 uint32_t * InData_DataT, 214 uint32_t * InData_DataALen, 215 uint32_t * InData_TextLen, 216 uint32_t * InData_DataTLen, 217 uint32_t * OutData_Text); 218 219 fsp_err_t HW_SCE_Aes192GcmEncryptInitSub(uint32_t * InData_KeyType, uint32_t * InData_KeyIndex, uint32_t * InData_IV); 220 void HW_SCE_Aes192GcmEncryptUpdateAADSub(uint32_t * InData_DataA, uint32_t MAX_CNT); 221 void HW_SCE_Aes192GcmEncryptUpdateTransitionSub(void); 222 void HW_SCE_Aes192GcmEncryptUpdateSub(uint32_t * InData_Text, uint32_t * OutData_Text, uint32_t MAX_CNT); 223 fsp_err_t HW_SCE_Aes192GcmEncryptFinalSub(uint32_t * InData_Text, 224 uint32_t * InData_DataALen, 225 uint32_t * InData_TextLen, 226 uint32_t * OutData_Text, 227 uint32_t * OutData_DataT); 228 fsp_err_t HW_SCE_Aes192GcmDecryptInitSub(uint32_t * InData_KeyType, uint32_t * InData_KeyIndex, uint32_t * InData_IV); 229 void HW_SCE_Aes192GcmDecryptUpdateAADSub(uint32_t * InData_DataA, uint32_t MAX_CNT); 230 void HW_SCE_Aes192GcmDecryptUpdateTransitionSub(void); 231 void HW_SCE_Aes192GcmDecryptUpdateSub(uint32_t * InData_Text, uint32_t * OutData_Text, uint32_t MAX_CNT); 232 fsp_err_t HW_SCE_Aes192GcmDecryptFinalSub(uint32_t * InData_Text, 233 uint32_t * InData_DataT, 234 uint32_t * InData_DataALen, 235 uint32_t * InData_TextLen, 236 uint32_t * InData_DataTLen, 237 uint32_t * OutData_Text); 238 239 fsp_err_t HW_SCE_Aes256GcmEncryptInitSub(uint32_t * InData_KeyType, uint32_t * InData_KeyIndex, uint32_t * InData_IV); 240 void HW_SCE_Aes256GcmEncryptUpdateAADSub(uint32_t * InData_DataA, uint32_t MAX_CNT); 241 void HW_SCE_Aes256GcmEncryptUpdateTransitionSub(void); 242 void HW_SCE_Aes256GcmEncryptUpdateSub(uint32_t * InData_Text, uint32_t * OutData_Text, uint32_t MAX_CNT); 243 fsp_err_t HW_SCE_Aes256GcmEncryptFinalSub(uint32_t * InData_Text, 244 uint32_t * InData_DataALen, 245 uint32_t * InData_TextLen, 246 uint32_t * OutData_Text, 247 uint32_t * OutData_DataT); 248 fsp_err_t HW_SCE_Aes256GcmDecryptInitSub(uint32_t * InData_KeyType, uint32_t * InData_KeyIndex, uint32_t * InData_IV); 249 void HW_SCE_Aes256GcmDecryptUpdateAADSub(uint32_t * InData_DataA, uint32_t MAX_CNT); 250 void HW_SCE_Aes256GcmDecryptUpdateTransitionSub(void); 251 void HW_SCE_Aes256GcmDecryptUpdateSub(uint32_t * InData_Text, uint32_t * OutData_Text, uint32_t MAX_CNT); 252 fsp_err_t HW_SCE_Aes256GcmDecryptFinalSub(uint32_t * InData_Text, 253 uint32_t * InData_DataT, 254 uint32_t * InData_DataALen, 255 uint32_t * InData_TextLen, 256 uint32_t * InData_DataTLen, 257 uint32_t * OutData_Text); 258 fsp_err_t HW_SCE_AES_128CtrEncrypt(const uint32_t * InData_Key, 259 const uint32_t * InData_IV, 260 const uint32_t num_words, 261 const uint32_t * InData_Text, 262 uint32_t * OutData_Text, 263 uint32_t * OutData_IV); 264 fsp_err_t HW_SCE_AES_192CtrEncrypt(const uint32_t * InData_Key, 265 const uint32_t * InData_IV, 266 const uint32_t num_words, 267 const uint32_t * InData_Text, 268 uint32_t * OutData_Text, 269 uint32_t * OutData_IV); 270 fsp_err_t HW_SCE_AES_256CtrEncrypt(const uint32_t * InData_Key, 271 const uint32_t * InData_IV, 272 const uint32_t num_words, 273 const uint32_t * InData_Text, 274 uint32_t * OutData_Text, 275 uint32_t * OutData_IV); 276 fsp_err_t HW_SCE_AES_128CtrDecrypt(const uint32_t * InData_Key, 277 const uint32_t * InData_IV, 278 const uint32_t num_words, 279 const uint32_t * InData_Text, 280 uint32_t * OutData_Text); 281 fsp_err_t HW_SCE_AES_192CtrDecrypt(const uint32_t * InData_Key, 282 const uint32_t * InData_IV, 283 const uint32_t num_words, 284 const uint32_t * InData_Text, 285 uint32_t * OutData_Text); 286 fsp_err_t HW_SCE_AES_256CtrDecrypt(const uint32_t * InData_Key, 287 const uint32_t * InData_IV, 288 const uint32_t num_words, 289 const uint32_t * InData_Text, 290 uint32_t * OutData_Text); 291 292 fsp_err_t HW_SCE_Aes128CcmEncryptInitSub(const uint32_t InData_KeyType[], 293 const uint32_t InData_DataType[], 294 const uint32_t InData_Cmd[], 295 const uint32_t InData_TextLen[], 296 const uint32_t InData_KeyIndex[], 297 const uint32_t InData_IV[], 298 const uint32_t InData_Header[], 299 const uint32_t InData_SeqNum[], 300 const uint32_t Header_Len); 301 302 fsp_err_t HW_SCE_Aes192CcmEncryptInitSub(const uint32_t InData_KeyType[], 303 const uint32_t InData_DataType[], 304 const uint32_t InData_Cmd[], 305 const uint32_t InData_TextLen[], 306 const uint32_t InData_KeyIndex[], 307 const uint32_t InData_IV[], 308 const uint32_t InData_Header[], 309 const uint32_t InData_SeqNum[], 310 const uint32_t Header_Len); 311 312 fsp_err_t HW_SCE_Aes256CcmEncryptInitSub(const uint32_t InData_KeyType[], 313 const uint32_t InData_DataType[], 314 const uint32_t InData_Cmd[], 315 const uint32_t InData_TextLen[], 316 const uint32_t InData_KeyIndex[], 317 const uint32_t InData_IV[], 318 const uint32_t InData_Header[], 319 const uint32_t InData_SeqNum[], 320 const uint32_t Header_Len); 321 322 void HW_SCE_Aes128CcmEncryptUpdateSub(const uint32_t InData_Text[], uint32_t OutData_Text[], const uint32_t MAX_CNT); 323 324 void HW_SCE_Aes192CcmEncryptUpdateSub(const uint32_t InData_Text[], uint32_t OutData_Text[], const uint32_t MAX_CNT); 325 326 void HW_SCE_Aes256CcmEncryptUpdateSub(const uint32_t InData_Text[], uint32_t OutData_Text[], const uint32_t MAX_CNT); 327 328 fsp_err_t HW_SCE_Aes128CcmEncryptFinalSub(const uint32_t InData_Text[], uint32_t OutData_Text[], 329 uint32_t OutData_MAC[]); 330 331 fsp_err_t HW_SCE_Aes192CcmEncryptFinalSub(const uint32_t InData_Text[], uint32_t OutData_Text[], 332 uint32_t OutData_MAC[]); 333 334 fsp_err_t HW_SCE_Aes256CcmEncryptFinalSub(const uint32_t InData_Text[], uint32_t OutData_Text[], 335 uint32_t OutData_MAC[]); 336 337 fsp_err_t HW_SCE_Aes128CcmDecryptInitSub(const uint32_t InData_KeyType[], 338 const uint32_t InData_DataType[], 339 const uint32_t InData_Cmd[], 340 const uint32_t InData_TextLen[], 341 const uint32_t InData_MACLength[], 342 const uint32_t InData_KeyIndex[], 343 const uint32_t InData_IV[], 344 const uint32_t InData_Header[], 345 const uint32_t InData_SeqNum[], 346 const uint32_t Header_Len); 347 348 fsp_err_t HW_SCE_Aes192CcmDecryptInitSub(const uint32_t InData_KeyType[], 349 const uint32_t InData_DataType[], 350 const uint32_t InData_Cmd[], 351 const uint32_t InData_TextLen[], 352 const uint32_t InData_MACLength[], 353 const uint32_t InData_KeyIndex[], 354 const uint32_t InData_IV[], 355 const uint32_t InData_Header[], 356 const uint32_t InData_SeqNum[], 357 const uint32_t Header_Len); 358 359 fsp_err_t HW_SCE_Aes256CcmDecryptInitSub(const uint32_t InData_KeyType[], 360 const uint32_t InData_DataType[], 361 const uint32_t InData_Cmd[], 362 const uint32_t InData_TextLen[], 363 const uint32_t InData_MACLength[], 364 const uint32_t InData_KeyIndex[], 365 const uint32_t InData_IV[], 366 const uint32_t InData_Header[], 367 const uint32_t InData_SeqNum[], 368 const uint32_t Header_Len); 369 370 void HW_SCE_Aes128CcmDecryptUpdateSub(const uint32_t InData_Text[], uint32_t OutData_Text[], const uint32_t MAX_CNT); 371 372 void HW_SCE_Aes192CcmDecryptUpdateSub(const uint32_t InData_Text[], uint32_t OutData_Text[], const uint32_t MAX_CNT); 373 374 void HW_SCE_Aes256CcmDecryptUpdateSub(const uint32_t InData_Text[], uint32_t OutData_Text[], const uint32_t MAX_CNT); 375 376 fsp_err_t HW_SCE_Aes128CcmDecryptFinalSub(const uint32_t InData_Text[], 377 const uint32_t InData_TextLen[], 378 const uint32_t InData_MAC[], 379 const uint32_t InData_MACLength[], 380 uint32_t OutData_Text[]); 381 382 fsp_err_t HW_SCE_Aes192CcmDecryptFinalSub(const uint32_t InData_Text[], 383 const uint32_t InData_TextLen[], 384 const uint32_t InData_MAC[], 385 const uint32_t InData_MACLength[], 386 uint32_t OutData_Text[]); 387 388 fsp_err_t HW_SCE_Aes256CcmDecryptFinalSub(const uint32_t InData_Text[], 389 const uint32_t InData_TextLen[], 390 const uint32_t InData_MAC[], 391 const uint32_t InData_MACLength[], 392 uint32_t OutData_Text[]); 393 394 #endif /* HW_SCE_RA_PRIVATE_HEADER_FILE */ 395
