1 /*
2 * Copyright 2022 Google LLC
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #ifndef ZEPHYR_DRIVERS_GPIO_RT1718S_H_
8 #define ZEPHYR_DRIVERS_GPIO_RT1718S_H_
9
10 #include <zephyr/device.h>
11 #include <zephyr/drivers/gpio.h>
12 #include <zephyr/drivers/i2c.h>
13 #include <zephyr/kernel.h>
14
15 #define RT1718S_GPIO_NUM 3
16
17 #define RT1718S_REG_ALERT 0x10
18 #define RT1718S_REG_ALERT_VENDOR_DEFINED_ALERT BIT(15)
19
20 #define RT1718S_REG_ALERT_MASK 0x12
21 #define RT1718S_REG_ALERT_MASK_VENDOR_DEFINED_ALERT BIT(15)
22
23 #define RT1718S_REG_RT_MASK8 0xA6
24 #define RT1718S_REG_RT_MASK8_GPIO1_R BIT(0)
25 #define RT1718S_REG_RT_MASK8_GPIO2_R BIT(1)
26 #define RT1718S_REG_RT_MASK8_GPIO3_R BIT(2)
27 #define RT1718S_REG_RT_MASK8_GPIO1_F BIT(4)
28 #define RT1718S_REG_RT_MASK8_GPIO2_F BIT(5)
29 #define RT1718S_REG_RT_MASK8_GPIO3_F BIT(6)
30
31 #define RT1718S_REG_RT_INT8 0xA8
32 #define RT1718S_REG_RT_INT8_GPIO1_R BIT(0)
33 #define RT1718S_REG_RT_INT8_GPIO2_R BIT(1)
34 #define RT1718S_REG_RT_INT8_GPIO3_R BIT(2)
35 #define RT1718S_REG_RT_INT8_GPIO1_F BIT(4)
36 #define RT1718S_REG_RT_INT8_GPIO2_F BIT(5)
37 #define RT1718S_REG_RT_INT8_GPIO3_F BIT(6)
38 #define RT1718S_GPIO_INT_MASK \
39 (RT1718S_REG_RT_INT8_GPIO1_R | RT1718S_REG_RT_INT8_GPIO2_R | RT1718S_REG_RT_INT8_GPIO3_R | \
40 RT1718S_REG_RT_INT8_GPIO1_F | RT1718S_REG_RT_INT8_GPIO2_F | RT1718S_REG_RT_INT8_GPIO3_F)
41
42 #define RT1718S_REG_RT_ST8 0xAA
43 #define RT1718S_REG_RT_ST8_GPIO1_I BIT(0)
44 #define RT1718S_REG_RT_ST8_GPIO2_I BIT(1)
45 #define RT1718S_REG_RT_ST8_GPIO3_I BIT(2)
46
47 #define RT1718S_REG_GPIO_CTRL(pin) (0xED + pin)
48 #define RT1718S_REG_GPIO_CTRL_PU BIT(5)
49 #define RT1718S_REG_GPIO_CTRL_PD BIT(4)
50 #define RT1718S_REG_GPIO_CTRL_OD_N BIT(3)
51 #define RT1718S_REG_GPIO_CTRL_OE BIT(2)
52 #define RT1718S_REG_GPIO_CTRL_O BIT(1)
53 #define RT1718S_REG_GPIO_CTRL_I BIT(0)
54
55 /* RT1718S chip driver config */
56 struct rt1718s_config {
57 /* I2C device */
58 const struct i2c_dt_spec i2c_dev;
59 /* Alert GPIO pin */
60 const struct gpio_dt_spec irq_gpio;
61 /* GPIO port device */
62 const struct device *gpio_port_dev;
63 };
64
65 /* RT1718S chip driver data */
66 struct rt1718s_data {
67 /* RT1718S device */
68 const struct device *dev;
69 /* lock TCPCI registers access */
70 struct k_sem lock_tcpci;
71 /* Alert pin callback */
72 struct gpio_callback gpio_cb;
73 /* Alert worker */
74 struct k_work alert_worker;
75 };
76
77 /**
78 * @brief Read a RT1718S register
79 *
80 * @param dev RT1718S device
81 * @param reg_addr Register address
82 * @param val A pointer to a buffer for the data to return
83 *
84 * @return 0 if successful, otherwise failed.
85 */
rt1718s_reg_read_byte(const struct device * dev,uint8_t reg_addr,uint8_t * val)86 static inline int rt1718s_reg_read_byte(const struct device *dev, uint8_t reg_addr, uint8_t *val)
87 {
88 const struct rt1718s_config *const config = (const struct rt1718s_config *)dev->config;
89
90 return i2c_reg_read_byte_dt(&config->i2c_dev, reg_addr, val);
91 }
92
93 /**
94 * @brief Read a sequence of RT1718S registers
95 *
96 * @param dev RT1718S device
97 * @param start_addr The register start address
98 * @param buf A pointer to a buffer for the data to return
99 * @param num_bytes Number of data to read
100 *
101 * @return 0 if successful, otherwise failed.
102 */
rt1718s_reg_burst_read(const struct device * dev,uint8_t start_addr,uint8_t * buf,uint32_t num_bytes)103 static inline int rt1718s_reg_burst_read(const struct device *dev, uint8_t start_addr, uint8_t *buf,
104 uint32_t num_bytes)
105 {
106 const struct rt1718s_config *const config = (const struct rt1718s_config *)dev->config;
107
108 return i2c_burst_read_dt(&config->i2c_dev, start_addr, buf, num_bytes);
109 }
110
111 /**
112 * @brief Write a RT1718S register
113 *
114 * @param dev RT1718S device
115 * @param reg_addr Register address
116 * @param val Data to write
117 *
118 * @return 0 if successful, otherwise failed.
119 */
rt1718s_reg_write_byte(const struct device * dev,uint8_t reg_addr,uint8_t val)120 static inline int rt1718s_reg_write_byte(const struct device *dev, uint8_t reg_addr, uint8_t val)
121 {
122 const struct rt1718s_config *const config = (const struct rt1718s_config *)dev->config;
123
124 return i2c_reg_write_byte_dt(&config->i2c_dev, reg_addr, val);
125 }
126
127 /**
128 * @brief Write a sequence of RT1718S registers
129 *
130 * @param dev RT1718S device
131 * @param start_addr The register start address
132 * @param buf A pointer to a buffer for the data to write
133 * @param num_bytes Number of data to write
134 *
135 * @return 0 if successful, otherwise failed.
136 */
rt1718s_reg_burst_write(const struct device * dev,uint8_t start_addr,uint8_t * buf,uint32_t num_bytes)137 static inline int rt1718s_reg_burst_write(const struct device *dev, uint8_t start_addr,
138 uint8_t *buf, uint32_t num_bytes)
139 {
140 const struct rt1718s_config *const config = (const struct rt1718s_config *)dev->config;
141
142 return i2c_burst_write_dt(&config->i2c_dev, start_addr, buf, num_bytes);
143 }
144
145 /**
146 * @brief Compare data & write a RT1718S register
147 *
148 * @param dev RT1718S device
149 * @param reg_addr Register address
150 * @param reg_val Old register data
151 * @param new_val New register data
152 *
153 * @return 0 if successful, otherwise failed.
154 */
rt1718s_reg_update(const struct device * dev,uint8_t reg_addr,uint8_t reg_val,uint8_t new_val)155 static inline int rt1718s_reg_update(const struct device *dev, uint8_t reg_addr, uint8_t reg_val,
156 uint8_t new_val)
157 {
158 if (reg_val == new_val)
159 return 0;
160
161 return rt1718s_reg_write_byte(dev, reg_addr, new_val);
162 }
163
164 /**
165 * @brief Dispatch GPIO port alert
166 *
167 * @param dev RT1718S device
168 */
169 void rt1718s_gpio_alert_handler(const struct device *dev);
170
171 #endif /* ZEPHYR_DRIVERS_GPIO_RT1718S_H_*/
172
