/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L3A60/ |
D | K32L3A60_cm0plus.h | 16137 __I uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x42 */ member
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D | K32L3A60_cm4.h | 16087 __I uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x42 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/ |
D | MIMXRT685S_dsp.h | 20467 __I uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x42 */ member
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D | MIMXRT685S_cm33.h | 30207 __I uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x42 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/ |
D | MCIMX7U5_cm4.h | 27817 __I uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x42 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/ |
D | MCIMX7U3_cm4.h | 27816 __I uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x42 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT633S/ |
D | MIMXRT633S.h | 30207 __I uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x42 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/ |
D | MIMXRT595S_dsp.h | 32553 __I uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x42 */ member
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D | MIMXRT595S_cm33.h | 42186 __I uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x42 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT533S/ |
D | MIMXRT533S.h | 40559 __I uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x42 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT555S/ |
D | MIMXRT555S.h | 42185 __I uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x42 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN3/ |
D | MIMX8MN3_cm7.h | 44112 __IO uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x40 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN2/ |
D | MIMX8MN2_cm7.h | 44110 __IO uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x40 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN1/ |
D | MIMX8MN1_cm7.h | 44112 __IO uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x40 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN6/ |
D | MIMX8MN6_ca53.h | 44124 __IO uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x40 */ member
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D | MIMX8MN6_cm7.h | 44110 __IO uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x40 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN5/ |
D | MIMX8MN5_cm7.h | 44112 __IO uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x40 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN4/ |
D | MIMX8MN4_cm7.h | 44110 __IO uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x40 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ7/ |
D | MIMX8MQ7_cm4.h | 47371 __IO uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x40 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ5/ |
D | MIMX8MQ5_cm4.h | 45198 __IO uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x40 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ6/ |
D | MIMX8MQ6_cm4.h | 47371 __IO uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x40 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MD6/ |
D | MIMX8MD6_cm4.h | 47371 __IO uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x40 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MD7/ |
D | MIMX8MD7_cm4.h | 47371 __IO uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x40 */ member
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/hal_nxp-3.5.0/imx/devices/MCIMX6X/ |
D | MCIMX6X_M4.h | 31675 __IO uint16_t RSTGT_R; /**< Reset Gate Read,offset: 0x40 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1165/ |
D | MIMXRT1165_cm4.h | 67077 __IO uint16_t RSTGT_R; /**< Reset Gate Read, offset: 0x42 */ member
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