1 /*
2  * Copyright (c) 2017 Oticon A/S
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 #ifndef _NRF_HW_MODEL_PPI_H
7 #define _NRF_HW_MODEL_PPI_H
8 
9 #include "nrfx.h"
10 
11 #ifdef __cplusplus
12 extern "C"{
13 #endif
14 
15 typedef enum { //Note that, for performance, it is better to leave commented the unused ones
16   //0 0x40000000 CLOCK
17   //0 0x40000000 POWER
18   //CLOCK:
19   CLOCK_EVENTS_HFCLKSTARTED ,
20   CLOCK_EVENTS_LFCLKSTARTED ,
21 //  CLOCK_EVENTS_DONE         ,
22 //  CLOCK_EVENTS_CTTO         ,
23   //POWER:
24 //  POWER_EVENTS_POFWARN     ,
25 //  POWER_EVENTS_SLEEPENTER  ,
26 //  POWER_EVENTS_SLEEPEXIT   ,
27 //  POWER_EVENTS_USBDETECTED ,
28 //  POWER_EVENTS_USBREMOVED  ,
29 //  POWER_EVENTS_USBPWRRDY   ,
30 
31   //1 0x40001000 RADIO
32   //RADIO:
33   RADIO_EVENTS_READY      ,
34   RADIO_EVENTS_ADDRESS    ,
35   RADIO_EVENTS_PAYLOAD    ,
36   RADIO_EVENTS_END        ,
37   RADIO_EVENTS_DISABLED   ,
38   RADIO_EVENTS_DEVMATCH   ,
39   RADIO_EVENTS_DEVMISS    ,
40   RADIO_EVENTS_RSSIEND    ,
41   RADIO_EVENTS_BCMATCH    ,
42   RADIO_EVENTS_CRCOK      ,
43   RADIO_EVENTS_CRCERROR   ,
44 //  RADIO_EVENTS_FRAMESTART ,
45 //  RADIO_EVENTS_EDEND      ,
46 //  RADIO_EVENTS_EDSTOPPED  ,
47 //  RADIO_EVENTS_CCAIDLE    ,
48 //  RADIO_EVENTS_CCABUSY    ,
49 //  RADIO_EVENTS_CCASTOPPED ,
50 //  RADIO_EVENTS_RATEBOOST  ,
51 //  RADIO_EVENTS_TXREADY    ,
52 //  RADIO_EVENTS_RXREADY    ,
53 //  RADIO_EVENTS_MHRMATCH   ,
54 //  RADIO_EVENTS_PHYEND     ,
55 
56 //  2 0x40002000 UARTE
57 //  2 0x40002000 UART
58 //  3 0x40003000 TWIM
59 //  3 0x40003000 SPIS
60 //  3 0x40003000 SPIM
61 //  3 0x40003000 SPI
62 //  3 0x40003000 TWIS
63 //  3 0x40003000 TWI
64 //  4 0x40004000 TWIS
65 //  4 0x40004000 SPIS
66 //  4 0x40004000 SPIM
67 //  4 0x40004000 TWI
68 //  4 0x40004000 TWIM
69 //  4 0x40004000 SPI
70 //  5 0x40005000 NFCT
71 //  6 0x40006000 GPIOTE
72 //  7 0x40007000 SAADC
73 
74   //8 0x40008000 TIMER0
75   //TIMER
76   TIMER0_EVENTS_COMPARE_0 ,
77   TIMER0_EVENTS_COMPARE_1 ,
78   TIMER0_EVENTS_COMPARE_2 ,
79 //  TIMER0_EVENTS_COMPARE_3 ,
80 //  TIMER0_EVENTS_COMPARE_4 ,
81 //  TIMER0_EVENTS_COMPARE_5 ,
82 
83 //9 0x40009000 Timer 1
84   TIMER1_EVENTS_COMPARE_0 ,
85   TIMER1_EVENTS_COMPARE_1 ,
86 //  TIMER1_EVENTS_COMPARE_2 ,
87 //  TIMER1_EVENTS_COMPARE_3 ,
88 //  TIMER1_EVENTS_COMPARE_4 ,
89 //  TIMER1_EVENTS_COMPARE_5 ,
90 
91 //10 0x4000A000 Timer 2
92   TIMER2_EVENTS_COMPARE_0 ,
93 //  TIMER2_EVENTS_COMPARE_1 ,
94 //  TIMER2_EVENTS_COMPARE_2 ,
95 //  TIMER2_EVENTS_COMPARE_3 ,
96 //  TIMER2_EVENTS_COMPARE_4 ,
97 //  TIMER2_EVENTS_COMPARE_5 ,
98 
99 
100   //11 0x4000B000 RTC0
101   //RTC
102   RTC0_EVENTS_TICK      ,
103 //  RTC0_EVENTS_OVRFLW    ,
104   RTC0_EVENTS_COMPARE_0 ,
105   RTC0_EVENTS_COMPARE_1 ,
106   RTC0_EVENTS_COMPARE_2 ,
107   RTC0_EVENTS_COMPARE_3 ,
108 
109   //12 0x4000C000 Temperature sensor
110 
111   //13 0x4000D000 Random number generator
112   //RNG
113   RNG_EVENTS_VALRDY     ,
114 
115   //14 0x4000E000 ECB AES
116   ECB_EVENTS_ENDECB,
117   ECB_EVENTS_ERRORECB,
118 
119   //15 0x4000F000 AAR
120   AAR_EVENTS_END,
121   AAR_EVENTS_RESOLVED,
122   AAR_EVENTS_NOTRESOLVED,
123 
124   //15 0x4000F000 CCM AES
125   CCM_EVENTS_ENDKSGEN,
126   CCM_EVENTS_ENDCRYPT,
127   CCM_EVENTS_ERROR,
128 
129   //16 0x40010000 WDT
130 
131   //17 0x40011000 RTC1
132   RTC1_EVENTS_TICK      ,
133 //  RTC1_EVENTS_OVRFLW    ,
134   RTC1_EVENTS_COMPARE_0 ,
135   RTC1_EVENTS_COMPARE_1 ,
136   RTC1_EVENTS_COMPARE_2 ,
137   RTC1_EVENTS_COMPARE_3 ,
138 
139 //  18 0x40012000 QDEC
140 //  19 0x40013000 LPCOMP
141 //  19 0x40013000 COMP
142 //  20 0x40014000 EGU
143 //  20 0x40014000 SWI
144 //  21 0x40015000 EGU
145 //  21 0x40015000 SWI
146 //  22 0x40016000 EGU
147 //  22 0x40016000 SWI
148 //  23 0x40017000 EGU
149 //  23 0x40017000 SWI
150 //  24 0x40018000 SWI
151 //  24 0x40018000 EGU
152 //  25 0x40019000 SWI
153 //  25 0x40019000 EGU
154 
155 //  26 0x4001A000 TIMER3
156     TIMER3_EVENTS_COMPARE_0 ,
157 //  TIMER3_EVENTS_COMPARE_1 ,
158 //  TIMER3_EVENTS_COMPARE_2 ,
159 //  TIMER3_EVENTS_COMPARE_3 ,
160 //  TIMER3_EVENTS_COMPARE_4 ,
161 //  TIMER3_EVENTS_COMPARE_5 ,
162 
163 //  27 0x4001B000 TIMER4
164     TIMER4_EVENTS_COMPARE_0 ,
165 //  TIMER4_EVENTS_COMPARE_1 ,
166 //  TIMER4_EVENTS_COMPARE_2 ,
167 //  TIMER4_EVENTS_COMPARE_3 ,
168 //  TIMER4_EVENTS_COMPARE_4 ,
169 //  TIMER4_EVENTS_COMPARE_5 ,
170 
171 //  28 0x4001C000 PWM
172 //  29 0x4001D000 PDM
173 //  30 0x4001E000 ACL
174 //  30 0x4001E000 NVMC
175 
176 //31 0x4001F000 PPI
177 //PPI
178 //No events
179 
180 //  32 0x40020000 MWU
181 //  33 0x40021000 PWM
182 //  34 0x40022000 PWM
183 //  35 0x40023000 SPIM
184 //  35 0x40023000 SPIS
185 //  35 0x40023000 SPI
186 //  36 0x40024000 RTC
187   RTC2_EVENTS_TICK      ,
188 //  RTC2_EVENTS_OVRFLW    ,
189   RTC2_EVENTS_COMPARE_0 ,
190   RTC2_EVENTS_COMPARE_1 ,
191   RTC2_EVENTS_COMPARE_2 ,
192   RTC2_EVENTS_COMPARE_3 ,
193 
194 //  37 0x40025000 I2S
195 //  38 0x40026000 FPU
196 //  39 0x40027000 USBD
197 //  40 0x40028000 UARTE
198 //  41 0x40029000 QSPI
199 //  45 0x4002D000 PWM
200 //  47 0x4002F000 SPIM
201 //  0 0x50000000 GPIO
202 //  0 0x50000000 GPIO
203 //  0 0x50000300 GPIO
204 //  42 0x5002A000 CRYPTOCELL
205 //  N/A 0x10000000 FICR
206 //  N/A 0x10001000 UICR
207 
208   NUMBER_PPI_EVENTS
209 } ppi_event_types_t;
210 
211 #define NUMBER_PPI_CHANNELS 32
212 
213 void nrf_ppi_init();
214 void nrf_ppi_clean_up();
215 void nrf_ppi_event(ppi_event_types_t event);
216 void nrf_ppi_regw_sideeffects();
217 void nrf_ppi_regw_sideeffects_TEP(int ch_nbr);
218 void nrf_ppi_regw_sideeffects_EEP(int ch_nbr);
219 void nrf_ppi_regw_sideeffects_FORK_TEP(int ch_nbr);
220 void nrf_ppi_regw_sideeffects_TASKS_CHG_DIS(int i);
221 void nrf_ppi_regw_sideeffects_CHENSET();
222 void nrf_ppi_regw_sideeffects_CHENCLR();
223 
224 #ifdef __cplusplus
225 }
226 #endif
227 
228 #endif
229