1 // Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 #pragma once 16 17 #ifdef __cplusplus 18 extern "C" { 19 #endif 20 21 #include "soc/soc_caps.h" 22 23 /** 24 * @brief RMT channel ID 25 * 26 */ 27 typedef enum { 28 RMT_CHANNEL_0, /*!< RMT channel number 0 */ 29 RMT_CHANNEL_1, /*!< RMT channel number 1 */ 30 RMT_CHANNEL_2, /*!< RMT channel number 2 */ 31 RMT_CHANNEL_3, /*!< RMT channel number 3 */ 32 #if SOC_RMT_CHANNELS_NUM > 4 33 RMT_CHANNEL_4, /*!< RMT channel number 4 */ 34 RMT_CHANNEL_5, /*!< RMT channel number 5 */ 35 RMT_CHANNEL_6, /*!< RMT channel number 6 */ 36 RMT_CHANNEL_7, /*!< RMT channel number 7 */ 37 #endif 38 RMT_CHANNEL_MAX /*!< Number of RMT channels */ 39 } rmt_channel_t; 40 41 /** 42 * @brief RMT Internal Memory Owner 43 * 44 */ 45 typedef enum { 46 RMT_MEM_OWNER_TX, /*!< RMT RX mode, RMT transmitter owns the memory block*/ 47 RMT_MEM_OWNER_RX, /*!< RMT RX mode, RMT receiver owns the memory block*/ 48 RMT_MEM_OWNER_MAX, 49 } rmt_mem_owner_t; 50 51 /** 52 * @brief Clock Source of RMT Channel 53 * 54 */ 55 typedef enum { 56 #if SOC_RMT_SUPPORT_REF_TICK 57 RMT_BASECLK_REF = 0, /*!< RMT source clock is REF_TICK, 1MHz by default */ 58 #endif 59 RMT_BASECLK_APB = 1, /*!< RMT source clock is APB CLK, 80Mhz by default */ 60 #if SOC_RMT_SUPPORT_XTAL 61 RMT_BASECLK_XTAL = 3, /*!< RMT source clock is XTAL clock, 40Mhz by default */ 62 #endif 63 RMT_BASECLK_MAX, 64 } rmt_source_clk_t; 65 66 /** 67 * @brief RMT Data Mode 68 * 69 * @note We highly recommended to use MEM mode not FIFO mode since there will be some gotcha in FIFO mode. 70 * 71 */ 72 typedef enum { 73 RMT_DATA_MODE_FIFO, /*<! RMT memory access in FIFO mode */ 74 RMT_DATA_MODE_MEM, /*<! RMT memory access in memory mode */ 75 RMT_DATA_MODE_MAX, 76 } rmt_data_mode_t; 77 78 /** 79 * @brief RMT Channel Working Mode (TX or RX) 80 * 81 */ 82 typedef enum { 83 RMT_MODE_TX, /*!< RMT TX mode */ 84 RMT_MODE_RX, /*!< RMT RX mode */ 85 RMT_MODE_MAX 86 } rmt_mode_t; 87 88 /** 89 * @brief RMT Idle Level 90 * 91 */ 92 typedef enum { 93 RMT_IDLE_LEVEL_LOW, /*!< RMT TX idle level: low Level */ 94 RMT_IDLE_LEVEL_HIGH, /*!< RMT TX idle level: high Level */ 95 RMT_IDLE_LEVEL_MAX, 96 } rmt_idle_level_t; 97 98 /** 99 * @brief RMT Carrier Level 100 * 101 */ 102 typedef enum { 103 RMT_CARRIER_LEVEL_LOW, /*!< RMT carrier wave is modulated for low Level output */ 104 RMT_CARRIER_LEVEL_HIGH, /*!< RMT carrier wave is modulated for high Level output */ 105 RMT_CARRIER_LEVEL_MAX 106 } rmt_carrier_level_t; 107 108 /** 109 * @brief RMT Channel Status 110 * 111 */ 112 typedef enum { 113 RMT_CHANNEL_UNINIT, /*!< RMT channel uninitialized */ 114 RMT_CHANNEL_IDLE, /*!< RMT channel status idle */ 115 RMT_CHANNEL_BUSY, /*!< RMT channel status busy */ 116 } rmt_channel_status_t; 117 118 /** 119 * @brief Data struct of RMT channel status 120 */ 121 typedef struct { 122 rmt_channel_status_t status[RMT_CHANNEL_MAX]; /*!< Store the current status of each channel */ 123 } rmt_channel_status_result_t; 124 125 #ifdef __cplusplus 126 } 127 #endif 128
