1 /* 2 * Copyright 2022, Cypress Semiconductor Corporation (an Infineon company) 3 * SPDX-License-Identifier: Apache-2.0 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 */ 17 18 #include "whd.h" 19 #include "bus_protocols/whd_bus_protocol_interface.h" 20 21 #ifndef INCLUDED_SDIO_WHD_BUS_PROTOCOL_H 22 #define INCLUDED_SDIO_WHD_BUS_PROTOCOL_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /****************************************************** 29 * Macros 30 ******************************************************/ 31 #define WHD_BIT_MASK(x) ( (1 << x) - 1 ) 32 33 #define WHD_BUS_HEADER_SIZE (0) 34 35 #define WHD_BUS_SDIO_MAX_BACKPLANE_TRANSFER_SIZE (1536) 36 #define WHD_BUS_SDIO_BACKPLANE_READ_PADD_SIZE (0) 37 38 #define WHD_BUS_STATS_INCREMENT_VARIABLE(bus_priv, var) \ 39 do { bus_priv->whd_bus_stats.var++; } while (0) 40 41 #define WHD_BUS_STATS_CONDITIONAL_INCREMENT_VARIABLE(bus_priv, condition, var) \ 42 do { if (condition){ bus_priv->whd_bus_stats.var++; }} while (0) 43 44 /****************************************************** 45 * Structures 46 ******************************************************/ 47 #pragma pack(1) 48 typedef struct 49 { 50 unsigned char stuff_bits; 51 unsigned int ocr : 24; 52 } sdio_cmd5_argument_t; 53 54 typedef struct 55 { 56 unsigned int _unique2 : 9; /* 0-8 */ 57 unsigned int register_address : 17; /* 9-25 */ 58 unsigned int _unique : 2; /* 26-27 */ 59 unsigned int function_number : 3; /* 28-30 */ 60 unsigned int rw_flag : 1; /* 31 */ 61 } sdio_cmd5x_argument_t; 62 63 typedef struct 64 { 65 uint8_t write_data; /* 0 - 7 */ 66 unsigned int _stuff2 : 1; /* 8 */ 67 unsigned int register_address : 17; /* 9-25 */ 68 unsigned int _stuff : 1; /* 26 */ 69 unsigned int raw_flag : 1; /* 27 */ 70 unsigned int function_number : 3; /* 28-30 */ 71 unsigned int rw_flag : 1; /* 31 */ 72 } whd_bus_sdio_cmd52_argument_t; 73 74 typedef struct 75 { 76 unsigned int count : 9; /* 0-8 */ 77 unsigned int register_address : 17; /* 9-25 */ 78 unsigned int op_code : 1; /* 26 */ 79 unsigned int block_mode : 1; /* 27 */ 80 unsigned int function_number : 3; /* 28-30 */ 81 unsigned int rw_flag : 1; /* 31 */ 82 } whd_bus_sdio_cmd53_argument_t; 83 84 typedef union 85 { 86 uint32_t value; 87 sdio_cmd5_argument_t cmd5; 88 sdio_cmd5x_argument_t cmd5x; 89 whd_bus_sdio_cmd52_argument_t cmd52; 90 whd_bus_sdio_cmd53_argument_t cmd53; 91 } sdio_cmd_argument_t; 92 93 typedef struct 94 { 95 unsigned int ocr : 24; /* 0-23 */ 96 unsigned int stuff_bits : 3; /* 24-26 */ 97 unsigned int memory_present : 1; /* 27 */ 98 unsigned int function_count : 3; /* 28-30 */ 99 unsigned int c : 1; /* 31 */ 100 } sdio_response4_t; 101 102 typedef struct 103 { 104 uint8_t data; /* 0-7 */ 105 uint8_t response_flags; /* 8-15 */ 106 uint16_t stuff; /* 16-31 */ 107 } sdio_response5_t; 108 109 typedef struct 110 { 111 uint16_t card_status; /* 0-15 */ 112 uint16_t rca; /* 16-31 */ 113 } sdio_response6_t; 114 115 typedef union 116 { 117 uint32_t value; 118 sdio_response4_t r4; 119 sdio_response5_t r5; 120 sdio_response6_t r6; 121 } sdio_response_t; 122 123 typedef enum 124 { 125 SDIO_BLOCK_MODE = (0 << 2), /* These are STM32 implementation specific */ 126 SDIO_BYTE_MODE = (1 << 2) /* These are STM32 implementation specific */ 127 } sdio_transfer_mode_t; 128 129 typedef enum 130 { 131 SDIO_1B_BLOCK = 1, SDIO_2B_BLOCK = 2, SDIO_4B_BLOCK = 4, SDIO_8B_BLOCK = 8, SDIO_16B_BLOCK = 16, 132 SDIO_32B_BLOCK = 32, SDIO_64B_BLOCK = 64, SDIO_128B_BLOCK = 128, SDIO_256B_BLOCK = 256, SDIO_512B_BLOCK = 512, 133 SDIO_1024B_BLOCK = 1024, SDIO_2048B_BLOCK = 2048 134 } sdio_block_size_t; 135 136 typedef enum 137 { 138 RESPONSE_NEEDED, NO_RESPONSE 139 } sdio_response_needed_t; 140 141 typedef struct 142 { 143 uint32_t cmd52; /* Number of cmd52 reads/writes issued */ 144 uint32_t cmd53_read; /* Number of cmd53 reads */ 145 uint32_t cmd53_write; /* Number of cmd53 writes */ 146 uint32_t cmd52_fail; /* Number of cmd52 read/write fails */ 147 uint32_t cmd53_read_fail; /* Number of cmd53 read fails */ 148 uint32_t cmd53_write_fail; /* Number of cmd53 write fails */ 149 uint32_t oob_intrs; /* Number of OOB interrupts generated by wlan chip */ 150 uint32_t sdio_intrs; /* Number of SDIO interrupts generated by wlan chip */ 151 uint32_t error_intrs; /* Number of SDIO error interrupts generated by wlan chip */ 152 uint32_t read_aborts; /* Number of times read aborts are called */ 153 } whd_bus_stats_t; 154 #pragma pack() 155 156 /****************************************************** 157 * Function declarations 158 ******************************************************/ 159 /* Initialisation functions */ 160 extern whd_result_t whd_bus_sdio_init(whd_driver_t whd_driver); 161 extern whd_result_t whd_bus_sdio_resume_after_deep_sleep(whd_driver_t whd_driver); 162 extern whd_result_t whd_bus_sdio_deinit(whd_driver_t whd_driver); 163 164 /* Device register access functions */ 165 extern whd_result_t whd_bus_sdio_write_backplane_value(whd_driver_t whd_driver, uint32_t address, 166 uint8_t register_length, uint32_t value); 167 extern whd_result_t whd_bus_sdio_read_backplane_value(whd_driver_t whd_driver, uint32_t address, 168 uint8_t register_length, uint8_t *value); 169 extern whd_result_t whd_bus_sdio_write_register_value(whd_driver_t whd_driver, whd_bus_function_t function, 170 uint32_t address, uint8_t value_length, uint32_t value); 171 extern whd_result_t whd_bus_sdio_read_register_value(whd_driver_t whd_driver, whd_bus_function_t function, 172 uint32_t address, uint8_t value_length, uint8_t *value); 173 174 /* Device data transfer functions */ 175 extern whd_result_t whd_bus_sdio_send_buffer(whd_driver_t whd_driver, whd_buffer_t buffer); 176 extern whd_result_t whd_bus_sdio_transfer_bytes(whd_driver_t whd_driver, whd_bus_transfer_direction_t direction, 177 whd_bus_function_t function, uint32_t address, uint16_t size, 178 whd_transfer_bytes_packet_t *data); 179 extern whd_result_t whd_bus_sdio_transfer_backplane_bytes(whd_driver_t whd_driver, 180 whd_bus_transfer_direction_t direction, uint32_t address, 181 uint32_t size, uint8_t *data); 182 183 /* Frame transfer function */ 184 extern whd_result_t whd_bus_sdio_read_frame(whd_driver_t whd_driver, whd_buffer_t *buffer); 185 186 extern whd_result_t whd_bus_sdio_poke_wlan(whd_driver_t whd_driver); 187 extern uint32_t whd_bus_sdio_packet_available_to_read(whd_driver_t whd_driver); 188 extern whd_result_t whd_bus_sdio_ack_interrupt(whd_driver_t whd_driver, uint32_t intstatus); 189 190 extern whd_result_t whd_bus_sdio_set_backplane_window(whd_driver_t whd_driver, uint32_t addr, uint32_t *curbase); 191 192 extern void whd_delayed_bus_release_schedule_update(whd_driver_t whd_driver, whd_bool_t is_scheduled); 193 #define DELAYED_BUS_RELEASE_SCHEDULE(whd_driver, schedule) \ 194 do { whd_delayed_bus_release_schedule_update(whd_driver, schedule); } while (0) 195 196 extern whd_bool_t whd_bus_sdio_wake_interrupt_present(whd_driver_t whd_driver); 197 198 extern whd_result_t whd_bus_sdio_wakeup(whd_driver_t whd_driver); 199 extern whd_result_t whd_bus_sdio_sleep(whd_driver_t whd_driver); 200 201 extern void whd_bus_sdio_init_stats(whd_driver_t whd_driver); 202 extern whd_result_t whd_bus_sdio_print_stats(whd_driver_t whd_driver, whd_bool_t reset_after_print); 203 extern whd_result_t whd_bus_sdio_reinit_stats(whd_driver_t whd_driver, whd_bool_t wake_from_firmware); 204 205 uint8_t whd_bus_sdio_backplane_read_padd_size(whd_driver_t whd_driver); 206 207 extern whd_result_t whd_bus_sdio_wait_for_wlan_event(whd_driver_t whd_driver, 208 cy_semaphore_t *transceive_semaphore); 209 extern whd_bool_t whd_bus_sdio_use_status_report_scheme(whd_driver_t whd_driver); 210 extern uint32_t whd_bus_sdio_get_max_transfer_size(whd_driver_t whd_driver); 211 /****************************************************** 212 * Global variables 213 ******************************************************/ 214 215 #ifdef __cplusplus 216 } /*extern "C" */ 217 #endif 218 219 #endif /* ifndef INCLUDED_SDIO_WHD_BUS_PROTOCOL_H */ 220
