1 /***************************************************************************//** 2 * \file cy_cryptolite_hw.h 3 * \version 2.30 4 * 5 * \brief 6 * This file provides common constants and macros 7 * for the Cryptolite driver. 8 * 9 ******************************************************************************** 10 * \copyright 11 * Copyright (c) (2020-2022), Cypress Semiconductor Corporation (an Infineon company) or 12 * an affiliate of Cypress Semiconductor Corporation. 13 * SPDX-License-Identifier: Apache-2.0 14 * 15 * Licensed under the Apache License, Version 2.0 (the "License"); 16 * you may not use this file except in compliance with the License. 17 * You may obtain a copy of the License at 18 * 19 * http://www.apache.org/licenses/LICENSE-2.0 20 * 21 * Unless required by applicable law or agreed to in writing, software 22 * distributed under the License is distributed on an "AS IS" BASIS, 23 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 24 * See the License for the specific language governing permissions and 25 * limitations under the License. 26 *******************************************************************************/ 27 #if !defined (CY_CRYPTOLITE_HW_H) 28 #define CY_CRYPTOLITE_HW_H 29 30 #include "cy_device.h" 31 32 #if defined (CY_IP_MXCRYPTOLITE) 33 34 #if defined(__cplusplus) 35 extern "C" { 36 #endif 37 38 #include "ip/cyip_cryptolite.h" 39 40 #define REG_CRYPTOLITE_CTL(base) (((CRYPTOLITE_Type*)(base))->CTL) 41 #define REG_CRYPTOLITE_STATUS(base) (((CRYPTOLITE_Type*)(base))->STATUS) 42 #define REG_CRYPTOLITE_AES_DESCR(base) (((CRYPTOLITE_Type*)(base))->AES_DESCR) 43 #define REG_CRYPTOLITE_SHA_DESCR(base) (((CRYPTOLITE_Type*)(base))->SHA_DESCR) 44 #define REG_CRYPTOLITE_VU_DESCR(base) (((CRYPTOLITE_Type*)(base))->VU_DESCR) 45 #define REG_CRYPTOLITE_SHA_INTR_ERROR(base) (((CRYPTOLITE_Type*)(base))->INTR_ERROR) 46 #define REG_CRYPTOLITE_SHA_INTR_ERROR_SET(base) (((CRYPTOLITE_Type*)(base))->INTR_ERROR_SET) 47 #define REG_CRYPTOLITE_SHA_INTR_ERROR_MASK(base) (((CRYPTOLITE_Type*)(base))->INTR_ERROR_MASK) 48 #define REG_CRYPTOLITE_SHA_INTR_ERROR_MASKED(base) (((CRYPTOLITE_Type*)(base))->INTR_ERROR_MASKED) 49 50 #define REG_CRYPTOLITE_TRNG_CTL0(base) (((CRYPTOLITE_Type*)(base))->TRNG_CTL0) 51 #define REG_CRYPTOLITE_TRNG_CTL1(base) (((CRYPTOLITE_Type*)(base))->TRNG_CTL1) 52 #define REG_CRYPTOLITE_TRNG_STATUS(base) (((CRYPTOLITE_Type*)(base))->TRNG_STATUS) 53 #define REG_CRYPTOLITE_TRNG_RESULT(base) (((CRYPTOLITE_Type*)(base))->TRNG_RESULT) 54 #define REG_CRYPTOLITE_TRNG_GARO_CTL(base) (((CRYPTOLITE_Type*)(base))->TRNG_GARO_CTL) 55 #define REG_CRYPTOLITE_TRNG_FIRO_CTL(base) (((CRYPTOLITE_Type*)(base))->TRNG_FIRO_CTL) 56 #define REG_CRYPTOLITE_TRNG_MON_CTL(base) (((CRYPTOLITE_Type*)(base))->TRNG_MON_CTL) 57 #define REG_CRYPTOLITE_TRNG_MON_RC_CTL(base) (((CRYPTOLITE_Type*)(base))->TRNG_MON_RC_CTL) 58 #define REG_CRYPTOLITE_TRNG_MON_RC_STATUS0(base) (((CRYPTOLITE_Type*)(base))->TRNG_MON_RC_STATUS0) 59 #define REG_CRYPTOLITE_TRNG_MON_RC_STATUS1(base) (((CRYPTOLITE_Type*)(base))->TRNG_MON_RC_STATUS1) 60 #define REG_CRYPTOLITE_TRNG_MON_AP_CTL(base) (((CRYPTOLITE_Type*)(base))->TRNG_MON_AP_CTL) 61 #define REG_CRYPTOLITE_TRNG_MON_AP_STATUS0(base) (((CRYPTOLITE_Type*)(base))->TRNG_MON_AP_STATUS0) 62 #define REG_CRYPTOLITE_TRNG_MON_AP_STATUS1(base) (((CRYPTOLITE_Type*)(base))->TRNG_MON_AP_STATUS1) 63 #define REG_CRYPTOLITE_INTR_TRNG(base) (((CRYPTOLITE_Type*)(base))->INTR_TRNG) 64 #define REG_CRYPTOLITE_INTR_TRNG_SET(base) (((CRYPTOLITE_Type*)(base))->INTR_TRNG_SET) 65 #define REG_CRYPTOLITE_INTR_TRNG_MASK(base) (((CRYPTOLITE_Type*)(base))->INTR_TRNG_MASK) 66 #define REG_CRYPTOLITE_INTR_TRNG_MASKED(base) (((CRYPTOLITE_Type*)(base))->INTR_TRNG_MASKED) 67 68 #define REG_CRYPTOLITE_INTR_ERROR(base) (((CRYPTOLITE_Type*)(base))->INTR_ERROR) 69 #define REG_CRYPTOLITE_INTR_ERROR_SET(base) (((CRYPTOLITE_Type*)(base))->INTR_ERROR_SET) 70 #define REG_CRYPTOLITE_INTR_ERROR_MASK(base) (((CRYPTOLITE_Type*)(base))->INTR_ERROR_MASK) 71 #define REG_CRYPTOLITE_INTR_ERROR_MASKED(base) (((CRYPTOLITE_Type*)(base))->INTR_ERROR_MASKED) 72 73 #define CY_CRYPTOLITE_MSG_SCH_CTLWD ((uint32_t)(0UL << 28UL)) 74 #define CY_CRYPTOLITE_PROCESS_CTLWD ((uint32_t)(1UL << 28UL)) 75 /*bus error interrupt mask*/ 76 #define CY_CRYPTOLITE_INTR_BUS_ERROR_MASK ((uint32_t)CRYPTOLITE_INTR_ERROR_BUS_ERROR_Msk) 77 78 #if defined(__cplusplus) 79 } 80 #endif 81 82 #endif /* CY_IP_MXCRYPTOLITE */ 83 84 #endif /* #if !defined (CY_CRYPTOLITE_HW_H) */ 85
