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Searched defs:RCC_PLLCFGR_PLL1RGE_0 (Results 1 – 25 of 26) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h12963 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
Dstm32h7a3xxq.h12975 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
Dstm32h7b0xx.h13407 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
Dstm32h7b0xxq.h13419 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
Dstm32h7b3xx.h13414 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
Dstm32h7b3xxq.h13426 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
Dstm32h723xx.h14812 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
Dstm32h725xx.h14824 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
Dstm32h730xxq.h15275 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
Dstm32h730xx.h15263 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
Dstm32h733xx.h15263 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
Dstm32h735xx.h15275 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
Dstm32h750xx.h15042 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
Dstm32h753xx.h15048 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
Dstm32h745xx.h15355 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
Dstm32h745xg.h15355 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
Dstm32h742xx.h14149 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
Dstm32h743xx.h14779 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
Dstm32h755xx.h15624 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
Dstm32h747xx.h18512 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
Dstm32h747xg.h18512 #define RCC_PLLCFGR_PLL1RGE_0 (0x0UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000000 */ macro
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/soc/
Dstm32h7s3xx.h15410 #define RCC_PLLCFGR_PLL1RGE_0 (0x1UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000008 */ macro
Dstm32h7s7xx.h15812 #define RCC_PLLCFGR_PLL1RGE_0 (0x1UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000008 */ macro
Dstm32h7r3xx.h14778 #define RCC_PLLCFGR_PLL1RGE_0 (0x1UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000008 */ macro
Dstm32h7r7xx.h15178 #define RCC_PLLCFGR_PLL1RGE_0 (0x1UL << RCC_PLLCFGR_PLL1RGE_Pos) /*!< 0x00000008 */ macro

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