1/*
2 * longjmp for the Blackfin processor
3 *
4 * Copyright (C) 2006 Analog Devices, Inc.
5 *
6 * The authors hereby grant permission to use, copy, modify, distribute,
7 * and license this software and its documentation for any purpose, provided
8 * that existing copyright notices are retained in all copies and that this
9 * notice is included verbatim in any distributions. No written agreement,
10 * license, or royalty fee is required for any of the authorized uses.
11 * Modifications to this software may be copyrighted by their authors
12 * and need not follow the licensing terms described here, provided that
13 * the new terms are clearly indicated on the first page of each file where
14 * they apply.
15 */
16
17#include <picolibc.h>
18
19#define _ASM
20#define _SETJMP_H
21
22
23.text;
24.align 4;
25.globl _longjmp;
26.type _longjmp, STT_FUNC;
27_longjmp:
28	P0 = R0;
29	R0 = [P0 + 0x00];
30	[--SP] = R0;		/* Put P0 on the stack */
31
32	P1 = [P0 + 0x04];
33	P2 = [P0 + 0x08];
34	P3 = [P0 + 0x0C];
35	P4 = [P0 + 0x10];
36	P5 = [P0 + 0x14];
37
38	FP = [P0 + 0x18];
39	R0 = [SP++];		/* Grab P0 from old stack */
40	SP = [P0 + 0x1C];	/* Update Stack Pointer */
41	[--SP] = R0;		/* Put P0 on new stack */
42	[--SP] = R1;		/* Put VAL arg on new stack */
43
44	R0 = [P0 + 0x20];	/* Data Registers */
45	R1 = [P0 + 0x24];
46	R2 = [P0 + 0x28];
47	R3 = [P0 + 0x2C];
48	R4 = [P0 + 0x30];
49	R5 = [P0 + 0x34];
50	R6 = [P0 + 0x38];
51	R7 = [P0 + 0x3C];
52
53	R0 = [P0 + 0x40];
54	ASTAT = R0;
55
56	R0 = [P0 + 0x44];	/* Loop Counters */
57	LC0 = R0;
58	R0 = [P0 + 0x48];
59	LC1 = R0;
60
61	R0 = [P0 + 0x4C];	/* Accumulators */
62	A0.W = R0;
63	R0 = [P0 + 0x50];
64	A0.X = R0;
65	R0 = [P0 + 0x54];
66	A1.W = R0;
67	R0 = [P0 + 0x58];
68	A1.X = R0;
69
70	R0 = [P0 + 0x5C];	/* Index Registers */
71	I0 = R0;
72	R0 = [P0 + 0x60];
73	I1 = R0;
74	R0 = [P0 + 0x64];
75	I2 = R0;
76	R0 = [P0 + 0x68];
77	I3 = R0;
78
79	R0 = [P0 + 0x6C];	/* Modifier Registers */
80	M0 = R0;
81	R0 = [P0 + 0x70];
82	M1 = R0;
83	R0 = [P0 + 0x74];
84	M2 = R0;
85	R0 = [P0 + 0x78];
86	M3 = R0;
87
88	R0 = [P0 + 0x7C];	/* Length Registers */
89	L0 = R0;
90	R0 = [P0 + 0x80];
91	L1 = R0;
92	R0 = [P0 + 0x84];
93	L2 = R0;
94	R0 = [P0 + 0x88];
95	L3 = R0;
96
97	R0 = [P0 + 0x8C];	/* Base Registers */
98	B0 = R0;
99	R0 = [P0 + 0x90];
100	B1 = R0;
101	R0 = [P0 + 0x94];
102	B2 = R0;
103	R0 = [P0 + 0x98];
104	B3 = R0;
105
106	R0 = [P0 + 0x9C];	/* Return Address (PC) */
107	RETS = R0;
108
109	R0 = [SP++];
110	P0 = [SP++];
111
112	CC = R0 == 0;
113	IF !CC JUMP 1f;
114	R0 = 1;
1151:
116	RTS;
117.size _longjmp, .-_longjmp;
118