1 /****************************************************************************** 2 * @file qspi.h 3 * @version V3.00 4 * @brief M2354 series QSPI driver header file 5 * 6 * @copyright SPDX-License-Identifier: Apache-2.0 7 * @copyright Copyright (C) 2020 Nuvoton Technology Corp. All rights reserved. 8 *****************************************************************************/ 9 #ifndef __QSPI_H__ 10 #define __QSPI_H__ 11 12 #ifdef __cplusplus 13 extern "C" 14 { 15 #endif 16 17 18 /** @addtogroup Standard_Driver Standard Driver 19 @{ 20 */ 21 22 /** @addtogroup QSPI_Driver QSPI Driver 23 @{ 24 */ 25 26 /** @addtogroup QSPI_EXPORTED_CONSTANTS QSPI Exported Constants 27 @{ 28 */ 29 30 #define QSPI_MODE_0 (QSPI_CTL_TXNEG_Msk) /*!< CLKPOL=0; RXNEG=0; TXNEG=1 */ 31 #define QSPI_MODE_1 (QSPI_CTL_RXNEG_Msk) /*!< CLKPOL=0; RXNEG=1; TXNEG=0 */ 32 #define QSPI_MODE_2 (QSPI_CTL_CLKPOL_Msk | QSPI_CTL_RXNEG_Msk) /*!< CLKPOL=1; RXNEG=1; TXNEG=0 */ 33 #define QSPI_MODE_3 (QSPI_CTL_CLKPOL_Msk | QSPI_CTL_TXNEG_Msk) /*!< CLKPOL=1; RXNEG=0; TXNEG=1 */ 34 35 #define QSPI_SLAVE (QSPI_CTL_SLAVE_Msk) /*!< Set as slave */ 36 #define QSPI_MASTER (0x0UL) /*!< Set as master */ 37 38 #define QSPI_SS (QSPI_SSCTL_SS_Msk) /*!< Set SS */ 39 #define QSPI_SS_ACTIVE_HIGH (QSPI_SSCTL_SSACTPOL_Msk) /*!< SS active high */ 40 #define QSPI_SS_ACTIVE_LOW (0x0UL) /*!< SS active low */ 41 42 /* QSPI Interrupt Mask */ 43 #define QSPI_UNIT_INT_MASK (0x001UL) /*!< Unit transfer interrupt mask */ 44 #define QSPI_SSACT_INT_MASK (0x002UL) /*!< Slave selection signal active interrupt mask */ 45 #define QSPI_SSINACT_INT_MASK (0x004UL) /*!< Slave selection signal inactive interrupt mask */ 46 #define QSPI_SLVUR_INT_MASK (0x008UL) /*!< Slave under run interrupt mask */ 47 #define QSPI_SLVBE_INT_MASK (0x010UL) /*!< Slave bit count error interrupt mask */ 48 #define QSPI_SLVTO_INT_MASK (0x020UL) /*!< Slave Mode Time-out interrupt mask */ 49 #define QSPI_TXUF_INT_MASK (0x040UL) /*!< Slave TX underflow interrupt mask */ 50 #define QSPI_FIFO_TXTH_INT_MASK (0x080UL) /*!< FIFO TX threshold interrupt mask */ 51 #define QSPI_FIFO_RXTH_INT_MASK (0x100UL) /*!< FIFO RX threshold interrupt mask */ 52 #define QSPI_FIFO_RXOV_INT_MASK (0x200UL) /*!< FIFO RX overrun interrupt mask */ 53 #define QSPI_FIFO_RXTO_INT_MASK (0x400UL) /*!< FIFO RX time-out interrupt mask */ 54 55 /* QSPI Status Mask */ 56 #define QSPI_BUSY_MASK (0x01UL) /*!< Busy status mask */ 57 #define QSPI_RX_EMPTY_MASK (0x02UL) /*!< RX empty status mask */ 58 #define QSPI_RX_FULL_MASK (0x04UL) /*!< RX full status mask */ 59 #define QSPI_TX_EMPTY_MASK (0x08UL) /*!< TX empty status mask */ 60 #define QSPI_TX_FULL_MASK (0x10UL) /*!< TX full status mask */ 61 #define QSPI_TXRX_RESET_MASK (0x20UL) /*!< TX or RX reset status mask */ 62 #define QSPI_SPIEN_STS_MASK (0x40UL) /*!< SPIEN status mask */ 63 #define QSPI_SSLINE_STS_MASK (0x80UL) /*!< QSPIx_SS line status mask */ 64 65 /* QSPI Status2 Mask */ 66 #define QSPI_SLVBENUM_MASK (0x01UL) /*!< Effective bit number of uncompleted RX data status mask */ 67 68 /**@}*/ /* end of group QSPI_EXPORTED_CONSTANTS */ 69 70 71 /** @addtogroup QSPI_EXPORTED_FUNCTIONS QSPI Exported Functions 72 @{ 73 */ 74 75 /** 76 * @brief Clear the unit transfer interrupt flag. 77 * @param[in] qspi The pointer of the specified QSPI module. 78 * @return None. 79 * @details Write 1 to UNITIF bit of QSPI_STATUS register to clear the unit transfer interrupt flag. 80 */ 81 #define QSPI_CLR_UNIT_TRANS_INT_FLAG(qspi) ( (qspi)->STATUS = QSPI_STATUS_UNITIF_Msk ) 82 83 /** 84 * @brief Disable 2-bit Transfer mode. 85 * @param[in] qspi The pointer of the specified QSPI module. 86 * @return None. 87 * @details Clear TWOBIT bit of QSPI_CTL register to disable 2-bit Transfer mode. 88 */ 89 #define QSPI_DISABLE_2BIT_MODE(qspi) ( (qspi)->CTL &= ~QSPI_CTL_TWOBIT_Msk ) 90 91 /** 92 * @brief Disable Slave 3-wire mode. 93 * @param[in] qspi The pointer of the specified QSPI module. 94 * @return None. 95 * @details Clear SLV3WIRE bit of QSPI_SSCTL register to disable Slave 3-wire mode. 96 */ 97 #define QSPI_DISABLE_3WIRE_MODE(qspi) ( (qspi)->SSCTL &= ~QSPI_SSCTL_SLV3WIRE_Msk ) 98 99 /** 100 * @brief Disable Dual I/O mode. 101 * @param[in] qspi The pointer of the specified QSPI module. 102 * @return None. 103 * @details Clear DUALIOEN bit of QSPI_CTL register to disable Dual I/O mode. 104 */ 105 #define QSPI_DISABLE_DUAL_MODE(qspi) ( (qspi)->CTL &= ~QSPI_CTL_DUALIOEN_Msk ) 106 107 /** 108 * @brief Disable Quad I/O mode. 109 * @param[in] qspi The pointer of the specified QSPI module. 110 * @return None. 111 * @details Clear QUADIOEN bit of QSPI_CTL register to disable Quad I/O mode. 112 */ 113 #define QSPI_DISABLE_QUAD_MODE(qspi) ( (qspi)->CTL &= ~QSPI_CTL_QUADIOEN_Msk ) 114 115 /** 116 * @brief Disable TX DTR mode. 117 * @param[in] qspi The pointer of the specified QSPI module. 118 * @return None. 119 * @details Clear TXDTREN bit of QSPI_CTL register to disable TX DTR mode. 120 */ 121 #define QSPI_DISABLE_TXDTR_MODE(qspi) ( (qspi)->CTL &= ~QSPI_CTL_TXDTREN_Msk ) 122 123 /** 124 * @brief Enable 2-bit Transfer mode. 125 * @param[in] qspi The pointer of the specified QSPI module. 126 * @return None. 127 * @details Set TWOBIT bit of QSPI_CTL register to enable 2-bit Transfer mode. 128 */ 129 #define QSPI_ENABLE_2BIT_MODE(qspi) ( (qspi)->CTL |= QSPI_CTL_TWOBIT_Msk ) 130 131 /** 132 * @brief Enable Slave 3-wire mode. 133 * @param[in] qspi The pointer of the specified QSPI module. 134 * @return None. 135 * @details Set SLV3WIRE bit of QSPI_SSCTL register to enable Slave 3-wire mode. 136 */ 137 #define QSPI_ENABLE_3WIRE_MODE(qspi) ( (qspi)->SSCTL |= QSPI_SSCTL_SLV3WIRE_Msk ) 138 139 /** 140 * @brief Enable Dual input mode. 141 * @param[in] qspi The pointer of the specified QSPI module. 142 * @return None. 143 * @details Clear DATDIR bit and set DUALIOEN bit of QSPI_CTL register to enable Dual input mode. 144 */ 145 #define QSPI_ENABLE_DUAL_INPUT_MODE(qspi) ( (qspi)->CTL = ((qspi)->CTL & (~QSPI_CTL_DATDIR_Msk)) | QSPI_CTL_DUALIOEN_Msk ) 146 147 /** 148 * @brief Enable Dual output mode. 149 * @param[in] qspi The pointer of the specified QSPI module. 150 * @return None. 151 * @details Set DATDIR bit and DUALIOEN bit of QSPI_CTL register to enable Dual output mode. 152 */ 153 #define QSPI_ENABLE_DUAL_OUTPUT_MODE(qspi) ( (qspi)->CTL |= (QSPI_CTL_DATDIR_Msk | QSPI_CTL_DUALIOEN_Msk) ) 154 155 /** 156 * @brief Enable Quad input mode. 157 * @param[in] qspi The pointer of the specified QSPI module. 158 * @return None. 159 * @details Clear DATDIR bit and set QUADIOEN bit of QSPI_CTL register to enable Quad input mode. 160 */ 161 #define QSPI_ENABLE_QUAD_INPUT_MODE(qspi) ( (qspi)->CTL = ((qspi)->CTL & (~QSPI_CTL_DATDIR_Msk)) | QSPI_CTL_QUADIOEN_Msk ) 162 163 /** 164 * @brief Enable Quad output mode. 165 * @param[in] qspi The pointer of the specified QSPI module. 166 * @return None. 167 * @details Set DATDIR bit and QUADIOEN bit of QSPI_CTL register to enable Quad output mode. 168 */ 169 #define QSPI_ENABLE_QUAD_OUTPUT_MODE(qspi) ( (qspi)->CTL |= (QSPI_CTL_DATDIR_Msk | QSPI_CTL_QUADIOEN_Msk) ) 170 171 /** 172 * @brief Enable TX DTR mode. 173 * @param[in] qspi The pointer of the specified QSPI module. 174 * @return None. 175 * @details Set TXDTREN bit of QSPI_CTL register to enable TX DTR mode. 176 */ 177 #define QSPI_ENABLE_TXDTR_MODE(qspi) ( (qspi)->CTL |= QSPI_CTL_TXDTREN_Msk ) 178 179 /** 180 * @brief Trigger RX PDMA function. 181 * @param[in] qspi The pointer of the specified QSPI module. 182 * @return None. 183 * @details Set RXPDMAEN bit of QSPI_PDMACTL register to enable RX PDMA transfer function. 184 */ 185 #define QSPI_TRIGGER_RX_PDMA(qspi) ( (qspi)->PDMACTL |= QSPI_PDMACTL_RXPDMAEN_Msk ) 186 187 /** 188 * @brief Trigger TX PDMA function. 189 * @param[in] qspi The pointer of the specified QSPI module. 190 * @return None. 191 * @details Set TXPDMAEN bit of QSPI_PDMACTL register to enable TX PDMA transfer function. 192 */ 193 #define QSPI_TRIGGER_TX_PDMA(qspi) ( (qspi)->PDMACTL |= QSPI_PDMACTL_TXPDMAEN_Msk ) 194 195 /** 196 * @brief Trigger TX and RX PDMA function. 197 * @param[in] qspi The pointer of the specified QSPI module. 198 * @return None. 199 * @details Set TXPDMAEN bit and RXPDMAEN bit of QSPI_PDMACTL register to enable TX and RX PDMA transfer function. 200 */ 201 #define QSPI_TRIGGER_TX_RX_PDMA(qspi) ( (qspi)->PDMACTL |= (QSPI_PDMACTL_TXPDMAEN_Msk | QSPI_PDMACTL_RXPDMAEN_Msk) ) 202 203 /** 204 * @brief Disable RX PDMA transfer. 205 * @param[in] qspi The pointer of the specified QSPI module. 206 * @return None. 207 * @details Clear RXPDMAEN bit of QSPI_PDMACTL register to disable RX PDMA transfer function. 208 */ 209 #define QSPI_DISABLE_RX_PDMA(qspi) ( (qspi)->PDMACTL &= ~QSPI_PDMACTL_RXPDMAEN_Msk ) 210 211 /** 212 * @brief Disable TX PDMA transfer. 213 * @param[in] qspi The pointer of the specified QSPI module. 214 * @return None. 215 * @details Clear TXPDMAEN bit of QSPI_PDMACTL register to disable TX PDMA transfer function. 216 */ 217 #define QSPI_DISABLE_TX_PDMA(qspi) ( (qspi)->PDMACTL &= ~QSPI_PDMACTL_TXPDMAEN_Msk ) 218 219 /** 220 * @brief Disable TX and RX PDMA transfer. 221 * @param[in] qspi The pointer of the specified QSPI module. 222 * @return None. 223 * @details Clear TXPDMAEN bit and RXPDMAEN bit of QSPI_PDMACTL register to disable TX and RX PDMA transfer function. 224 */ 225 #define QSPI_DISABLE_TX_RX_PDMA(qspi) ( (qspi)->PDMACTL &= ~(QSPI_PDMACTL_TXPDMAEN_Msk | QSPI_PDMACTL_RXPDMAEN_Msk) ) 226 227 /** 228 * @brief Get the count of available data in RX FIFO. 229 * @param[in] qspi The pointer of the specified QSPI module. 230 * @return The count of available data in RX FIFO. 231 * @details Read RXCNT (QSPI_STATUS[27:24]) to get the count of available data in RX FIFO. 232 */ 233 #define QSPI_GET_RX_FIFO_COUNT(qspi) ( ((qspi)->STATUS & QSPI_STATUS_RXCNT_Msk) >> QSPI_STATUS_RXCNT_Pos ) 234 235 /** 236 * @brief Get the RX FIFO empty flag. 237 * @param[in] qspi The pointer of the specified QSPI module. 238 * @retval 0 RX FIFO is not empty. 239 * @retval 1 RX FIFO is empty. 240 * @details Read RXEMPTY bit of QSPI_STATUS register to get the RX FIFO empty flag. 241 */ 242 #define QSPI_GET_RX_FIFO_EMPTY_FLAG(qspi) ( ((qspi)->STATUS & QSPI_STATUS_RXEMPTY_Msk) >> QSPI_STATUS_RXEMPTY_Pos ) 243 244 /** 245 * @brief Get the TX FIFO empty flag. 246 * @param[in] qspi The pointer of the specified QSPI module. 247 * @retval 0 TX FIFO is not empty. 248 * @retval 1 TX FIFO is empty. 249 * @details Read TXEMPTY bit of QSPI_STATUS register to get the TX FIFO empty flag. 250 */ 251 #define QSPI_GET_TX_FIFO_EMPTY_FLAG(qspi) ( ((qspi)->STATUS & QSPI_STATUS_TXEMPTY_Msk) >> QSPI_STATUS_TXEMPTY_Pos ) 252 253 /** 254 * @brief Get the TX FIFO full flag. 255 * @param[in] qspi The pointer of the specified QSPI module. 256 * @retval 0 TX FIFO is not full. 257 * @retval 1 TX FIFO is full. 258 * @details Read TXFULL bit of QSPI_STATUS register to get the TX FIFO full flag. 259 */ 260 #define QSPI_GET_TX_FIFO_FULL_FLAG(qspi) ( ((qspi)->STATUS & QSPI_STATUS_TXFULL_Msk) >> QSPI_STATUS_TXFULL_Pos ) 261 262 /** 263 * @brief Get the datum read from RX register. 264 * @param[in] qspi The pointer of the specified QSPI module. 265 * @return Data in RX register. 266 * @details Read QSPI_RX register to get the received datum. 267 */ 268 #define QSPI_READ_RX(qspi) ( (qspi)->RX ) 269 270 /** 271 * @brief Write datum to TX register. 272 * @param[in] qspi The pointer of the specified QSPI module. 273 * @param[in] u32TxData The datum which user attempt to transfer through QSPI bus. 274 * @return None. 275 * @details Write u32TxData to QSPI_TX register. 276 */ 277 #define QSPI_WRITE_TX(qspi, u32TxData) ( (qspi)->TX = (u32TxData) ) 278 279 /** 280 * @brief Set QSPIx_SS pin to high state. 281 * @param[in] qspi The pointer of the specified QSPI module. 282 * @return None. 283 * @details Disable automatic slave selection function and set QSPIx_SS pin to high state. 284 */ 285 #define QSPI_SET_SS_HIGH(qspi) ( (qspi)->SSCTL = ((qspi)->SSCTL & (~QSPI_SSCTL_AUTOSS_Msk)) | (QSPI_SSCTL_SSACTPOL_Msk | QSPI_SSCTL_SS_Msk) ) 286 287 /** 288 * @brief Set QSPIx_SS pin to low state. 289 * @param[in] qspi The pointer of the specified QSPI module. 290 * @return None. 291 * @details Disable automatic slave selection function and set QSPIx_SS pin to low state. 292 */ 293 #define QSPI_SET_SS_LOW(qspi) ( (qspi)->SSCTL = ((qspi)->SSCTL & (~(QSPI_SSCTL_AUTOSS_Msk | QSPI_SSCTL_SSACTPOL_Msk))) | QSPI_SSCTL_SS_Msk ) 294 295 /** 296 * @brief Enable Byte Reorder function. 297 * @param[in] qspi The pointer of the specified QSPI module. 298 * @return None. 299 * @details Enable Byte Reorder function. The suspend interval depends on the setting of SUSPITV (QSPI_CTL[7:4]). 300 */ 301 #define QSPI_ENABLE_BYTE_REORDER(qspi) ( (qspi)->CTL |= QSPI_CTL_REORDER_Msk ) 302 303 /** 304 * @brief Disable Byte Reorder function. 305 * @param[in] qspi The pointer of the specified QSPI module. 306 * @return None. 307 * @details Clear REORDER bit field of QSPI_CTL register to disable Byte Reorder function. 308 */ 309 #define QSPI_DISABLE_BYTE_REORDER(qspi) ( (qspi)->CTL &= ~QSPI_CTL_REORDER_Msk ) 310 311 /** 312 * @brief Set the length of suspend interval. 313 * @param[in] qspi The pointer of the specified QSPI module. 314 * @param[in] u32SuspCycle Decides the length of suspend interval. It could be 0 ~ 15. 315 * @return None. 316 * @details Set the length of suspend interval according to u32SuspCycle. 317 * The length of suspend interval is ((u32SuspCycle + 0.5) * the length of one QSPI bus clock cycle). 318 */ 319 #define QSPI_SET_SUSPEND_CYCLE(qspi, u32SuspCycle) ( (qspi)->CTL = ((qspi)->CTL & ~QSPI_CTL_SUSPITV_Msk) | ((u32SuspCycle) << QSPI_CTL_SUSPITV_Pos) ) 320 321 /** 322 * @brief Set the QSPI transfer sequence with LSB first. 323 * @param[in] qspi The pointer of the specified QSPI module. 324 * @return None. 325 * @details Set LSB bit of QSPI_CTL register to set the QSPI transfer sequence with LSB first. 326 */ 327 #define QSPI_SET_LSB_FIRST(qspi) ( (qspi)->CTL |= QSPI_CTL_LSB_Msk ) 328 329 /** 330 * @brief Set the QSPI transfer sequence with MSB first. 331 * @param[in] qspi The pointer of the specified QSPI module. 332 * @return None. 333 * @details Clear LSB bit of QSPI_CTL register to set the QSPI transfer sequence with MSB first. 334 */ 335 #define QSPI_SET_MSB_FIRST(qspi) ( (qspi)->CTL &= ~QSPI_CTL_LSB_Msk ) 336 337 /** 338 * @brief Set the data width of a QSPI transaction. 339 * @param[in] qspi The pointer of the specified QSPI module. 340 * @param[in] u32Width The bit width of one transaction. 341 * @return None. 342 * @details The data width can be 8 ~ 32 bits. 343 */ 344 #define QSPI_SET_DATA_WIDTH(qspi, u32Width) ( (qspi)->CTL = ((qspi)->CTL & ~QSPI_CTL_DWIDTH_Msk) | (((u32Width) & 0x1F) << QSPI_CTL_DWIDTH_Pos) ) 345 346 /** 347 * @brief Get the QSPI busy state. 348 * @param[in] qspi The pointer of the specified QSPI module. 349 * @retval 0 QSPI controller is not busy. 350 * @retval 1 QSPI controller is busy. 351 * @details This macro will return the busy state of QSPI controller. 352 */ 353 #define QSPI_IS_BUSY(qspi) ( ((qspi)->STATUS & QSPI_STATUS_BUSY_Msk) >> QSPI_STATUS_BUSY_Pos ) 354 355 /** 356 * @brief Enable QSPI controller. 357 * @param[in] qspi The pointer of the specified QSPI module. 358 * @return None. 359 * @details Set SPIEN (QSPI_CTL[0]) to enable QSPI controller. 360 */ 361 #define QSPI_ENABLE(qspi) ( (qspi)->CTL |= QSPI_CTL_SPIEN_Msk ) 362 363 /** 364 * @brief Disable QSPI controller. 365 * @param[in] qspi The pointer of the specified QSPI module. 366 * @return None. 367 * @details Clear SPIEN (QSPI_CTL[0]) to disable QSPI controller. 368 */ 369 #define QSPI_DISABLE(qspi) ( (qspi)->CTL &= ~QSPI_CTL_SPIEN_Msk ) 370 371 /* Function prototype declaration */ 372 uint32_t QSPI_Open(QSPI_T *qspi, uint32_t u32MasterSlave, uint32_t u32QSPIMode, uint32_t u32DataWidth, uint32_t u32BusClock); 373 void QSPI_Close(QSPI_T *qspi); 374 void QSPI_ClearRxFIFO(QSPI_T *qspi); 375 void QSPI_ClearTxFIFO(QSPI_T *qspi); 376 void QSPI_DisableAutoSS(QSPI_T *qspi); 377 void QSPI_EnableAutoSS(QSPI_T *qspi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel); 378 uint32_t QSPI_SetBusClock(QSPI_T *qspi, uint32_t u32BusClock); 379 void QSPI_SetFIFO(QSPI_T *qspi, uint32_t u32TxThreshold, uint32_t u32RxThreshold); 380 uint32_t QSPI_GetBusClock(QSPI_T *qspi); 381 void QSPI_EnableInt(QSPI_T *qspi, uint32_t u32Mask); 382 void QSPI_DisableInt(QSPI_T *qspi, uint32_t u32Mask); 383 uint32_t QSPI_GetIntFlag(QSPI_T *qspi, uint32_t u32Mask); 384 void QSPI_ClearIntFlag(QSPI_T *qspi, uint32_t u32Mask); 385 uint32_t QSPI_GetStatus(QSPI_T *qspi, uint32_t u32Mask); 386 uint32_t QSPI_GetStatus2(QSPI_T *qspi, uint32_t u32Mask); 387 388 389 /**@}*/ /* end of group QSPI_EXPORTED_FUNCTIONS */ 390 391 /**@}*/ /* end of group QSPI_Driver */ 392 393 /**@}*/ /* end of group Standard_Driver */ 394 395 #ifdef __cplusplus 396 } 397 #endif 398 399 #endif /* __QSPI_H__ */ 400
