1 /** 2 ****************************************************************************** 3 * @file stm32wb0x_hal_pwr.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2024 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32WB0x_HAL_PWR_H 21 #define STM32WB0x_HAL_PWR_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32wb0x_hal_def.h" 29 30 /* Include low level driver */ 31 #include "stm32wb0x_ll_pwr.h" 32 #include "stm32wb0x_ll_system.h" 33 /* Include PWR HAL Extended module */ 34 #include "stm32wb0x_hal_pwr_ex.h" 35 36 /** @addtogroup STM32WB0x_HAL_Driver 37 * @{ 38 */ 39 40 /** @defgroup PWR PWR 41 * @brief PWR HAL module driver 42 * @{ 43 */ 44 45 /* Exported types ------------------------------------------------------------*/ 46 /** @defgroup PWR_Exported_Types PWR Exported Types 47 * @{ 48 */ 49 50 /** 51 * @brief PWR PVD configuration structure definition 52 */ 53 typedef struct 54 { 55 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. 56 This parameter can be a value of @ref PWR_PVD_Detection_Level. */ 57 58 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. 59 This parameter can be a value of @ref PWR_PVD_Mode. */ 60 } PWR_PVDTypeDef; 61 62 /** 63 * @brief PWR DEEPSTOP configuration structure definition 64 */ 65 typedef struct 66 { 67 uint32_t deepStopMode; /*!< Specifies the configuration of the slow clock in DEEPSTOP. 68 This parameter can be one of the following value: 69 - PWR_DEEPSTOP_WITH_SLOW_CLOCK_OFF 70 - PWR_DEEPSTOP_WITH_SLOW_CLOCK_ON */ 71 72 } PWR_DEEPSTOPTypeDef; 73 74 /** 75 * @brief PWR SHUTDOWN configuration structure definition 76 */ 77 typedef struct 78 { 79 uint8_t BORStatus; /*!< Specifies the BOR status ENABLE or DISABLE */ 80 uint8_t WakeUpPinStatus; /*!< Specifies if the PB0 wake up source 81 is ENABLE or DISABLE*/ 82 uint8_t WakeUpPol; /*!< Specifies the wake up source polarity */ 83 } PWR_SHUTDOWNTypeDef; 84 85 /** 86 * @brief PWR SAVE enum definition 87 */ 88 typedef enum 89 { 90 POWER_SAVE_LEVEL_RUNNING = 0, 91 POWER_SAVE_LEVEL_CPU_HALT = 1, 92 POWER_SAVE_LEVEL_STOP_LS_CLOCK_ON = 2, 93 POWER_SAVE_LEVEL_STOP = 3 94 } PowerSaveLevels; 95 96 /** 97 * @} 98 */ 99 100 /* Exported constants --------------------------------------------------------*/ 101 /** @defgroup PWR_Exported_Constants PWR Exported Constants 102 * @{ 103 */ 104 105 /** @defgroup PWREx_WUP_Polarity Shift to apply to retrieve polarity information from PWR_WAKEUP_PINy_xxx constants 106 * @{ 107 */ 108 #define PWR_WUP_POLARITY_SHIFT 0x13U /*!< Internal constant used to retrieve wakeup pin polarity*/ 109 /** 110 * @} 111 */ 112 113 /** @defgroup PWR_Low_Power_Mode_Selection PWR Low Power Mode Selection 114 * @{ 115 */ 116 #define PWR_LOWPOWERMODE_STOP (0x00000000U) /*!< DeepStop mode */ 117 #define PWR_LOWPOWERMODE_SHUTDOWN (PWR_CR1_LPMS) /*!< Shutdown mode */ 118 119 /** 120 * @} 121 */ 122 /** @defgroup PWR_PVD_Detection_Level Power Voltage Detector Level selection 123 * @note Refer datasheet for selection voltage value 124 * @{ 125 */ 126 #define PWR_PVDLEVEL_0 (0x00000000U) /*!< PVD threshold around 2.0 V */ 127 #define PWR_PVDLEVEL_1 (PWR_CR2_PVDLS_0) /*!< PVD threshold around 2.2 V */ 128 #define PWR_PVDLEVEL_2 (PWR_CR2_PVDLS_1) /*!< PVD threshold around 2.4 V */ 129 #define PWR_PVDLEVEL_3 (PWR_CR2_PVDLS_1 | PWR_CR2_PVDLS_0) /*!< PVD threshold around 2.5 V */ 130 #define PWR_PVDLEVEL_4 (PWR_CR2_PVDLS_2) /*!< PVD threshold around 2.6 V */ 131 #define PWR_PVDLEVEL_5 (PWR_CR2_PVDLS_2 | PWR_CR2_PVDLS_0) /*!< PVD threshold around 2.8 V */ 132 #define PWR_PVDLEVEL_6 (PWR_CR2_PVDLS_2 | PWR_CR2_PVDLS_1) /*!< PVD threshold around 2.9 V */ 133 #define PWR_PVDLEVEL_7 (PWR_CR2_PVDLS) /*!< External input analog voltage (Compare internally to VBGP) */ 134 /** 135 * @} 136 */ 137 138 /** @defgroup PWR_PVD_Mode PWR PVD interrupt and event mode 139 * @{ 140 */ 141 #define PWR_PVD_MODE_NORMAL (0x00000000U) /*!< Basic mode is used */ 142 #define PWR_PVD_MODE_IT (SYSCFG_PWRC_IER_PVD_IE) /*!< Interrupt Mode detection */ 143 /** 144 * @} 145 */ 146 147 /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR regulator mode 148 * @{ 149 */ 150 #define PWR_MAINREGULATOR_ON (0x00000000U) /*!< Regulator in main mode */ 151 #define PWR_LOWPOWERREGULATOR_ON (0x00000001U) /*!< Regulator in low-power mode */ 152 /** 153 * @} 154 */ 155 /** @defgroup PWREx_Wakeup_Source_Select Wakeup Source Select 156 * @{ 157 */ 158 #define PWR_WUP_CR3 (0x00000000U) 159 #define PWR_WUP_CR6 (0x00000001U) 160 /** 161 * @} 162 */ 163 164 /** @defgroup PWR_DEEPSTOP_SLOW_CLOCK_CONFIG Slow clock configuration in DEEPSTOP mode 165 * @{ 166 */ 167 #define PWR_DEEPSTOP_WITH_SLOW_CLOCK_OFF (0x00000000U) 168 #define PWR_DEEPSTOP_WITH_SLOW_CLOCK_ON (0x00000001U) 169 /** 170 * @} 171 */ 172 173 /** 174 * @} 175 */ 176 177 /* Private define ------------------------------------------------------------*/ 178 /* Exported macros -----------------------------------------------------------*/ 179 /** @defgroup PWR_Exported_Macros PWR Exported Macros 180 * @{ 181 */ 182 /** @brief Check whether or not a specific PWR flag is set. 183 * @param __FLAG__ specifies the flag to check. 184 * This parameter can be one of the following values: 185 * 186 * /--------------------------------SR1-------------------------------/ 187 * @arg @ref PWR_FLAG_WUF0 Wake Up Flag 0. Indicates that a wakeup event 188 * was received from the pin PB0. 189 * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event 190 * was received from the pin PB1. 191 * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event 192 * was received from the pin PB2. 193 * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event 194 * was received from the pin PB3. 195 * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event 196 * was received from the pin PB4. 197 * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event 198 * was received from the pin PB5. 199 * @arg @ref PWR_FLAG_WUF6 Wake Up Flag 6. Indicates that a wakeup event 200 * was received from the pin PB6. 201 * @arg @ref PWR_FLAG_WUF7 Wake Up Flag 7. Indicates that a wakeup event 202 * was received from the pin PB7. 203 * @arg @ref PWR_FLAG_WUF8 Wake Up Flag 8. Indicates that a wakeup event 204 * was received from the pin PA8. 205 * @arg @ref PWR_FLAG_WUF9 Wake Up Flag 9. Indicates that a wakeup event 206 * was received from the pin PA9. 207 * @arg @ref PWR_FLAG_WUF10 Wake Up Flag 10. Indicates that a wakeup event 208 * was received from the pin PA10. 209 * @arg @ref PWR_FLAG_WUF11 Wake Up Flag 11. Indicates that a wakeup event 210 * was received from the pin PA11. 211 * @arg @ref PWR_FLAG_WBLEF Wake Up Flag Indicates that a wakeup event 212 * was received from the Bluetooth LE. 213 * 214 * @arg @ref PWR_FLAG_BHWF Wake Up Flag Indicates that a wakeup event 215 * was received from the Bluetooth LE Host CPU. 216 * 217 * @arg @ref PWR_FLAG_IWUF2 Wake Up Flag 11. Indicates that a wakeup event 218 * was received from the pin PA11. 219 * 220 * /--------------------------------SR2-------------------------------/ 221 * @arg @ref PWR_FLAG_SMPSBYPR This flag indicates if theSMPS regulator is in 222 * PRECHARGE mode 223 * @arg @ref PWR_FLAG_SMPSENR This flag indicates if SMPS regulator is in RUN 224 * mode. 225 * @arg @ref PWR_FLAG_SMPSRDYF This flag indicates if the SMPS regulator is ready 226 * @arg @ref PWR_FLAG_REGLPS This flag indicates if the low-power regulator 227 * is ready 228 * @arg @ref PWR_FLAG_REGMS This flag indicates if the main regulator is 229 * ready. 230 * @arg @ref PWR_FLAG_PVDO This flag indicates if the VDDIO is lower than 231 * the selected threshold. 232 * 233 * /--------------------------------SR3-------------------------------/ 234 * @arg @ref PWR_FLAG_WUF12 Wake Up Flag 12. Indicates that a wakeup event 235 * was received from the pin PA0. 236 * @arg @ref PWR_FLAG_WUF13 Wake Up Flag 13. Indicates that a wakeup event 237 * was received from the pin PA1. 238 * @arg @ref PWR_FLAG_WUF14 Wake Up Flag 14. Indicates that a wakeup event 239 * was received from the pin PA2. 240 * @arg @ref PWR_FLAG_WUF15 Wake Up Flag 15. Indicates that a wakeup event 241 * was received from the pin PA3. 242 * @arg @ref PWR_FLAG_WUF16 Wake Up Flag 16. Indicates that a wakeup event 243 * was received from the pin PB12 or PA4 for STM32wb07. 244 * @arg @ref PWR_FLAG_WUF17 Wake Up Flag 17. Indicates that a wakeup event 245 * was received from the pin PB13 or PA5 for STM32wb07. 246 * @arg @ref PWR_FLAG_WUF18 Wake Up Flag 18. Indicates that a wakeup event 247 * was received from the pin PB14 or PA6 for STM32wb07. 248 * @arg @ref PWR_FLAG_WUF19 Wake Up Flag 19. Indicates that a wakeup event 249 * was received from the pin PB15 or PA7 for STM32wb07. 250 * @arg @ref PWR_FLAG_WUF20 Wake Up Flag 20. Indicates that a wakeup event 251 * was received from the pin PB8. 252 * @arg @ref PWR_FLAG_WUF21 Wake Up Flag 21. Indicates that a wakeup event 253 * was received from the pin PB9. 254 * @arg @ref PWR_FLAG_WUF22 Wake Up Flag 22. Indicates that a wakeup event 255 * was received from the pin PB10. 256 * @arg @ref PWR_FLAG_WUF23 Wake Up Flag 23. Indicates that a wakeup event 257 * was received from the pin PB11. 258 * @arg @ref PWR_FLAG_WUF24 Wake Up Flag 24. Indicates that a wakeup event 259 * was received from the pin PB12. 260 * @arg @ref PWR_FLAG_WUF25 Wake Up Flag 25. Indicates that a wakeup event 261 * was received from the pin PB13. 262 * @arg @ref PWR_FLAG_WUF26 Wake Up Flag 26. Indicates that a wakeup event 263 * was received from the pin PB14. 264 * @arg @ref PWR_FLAG_WUF27 Wake Up Flag 27. Indicates that a wakeup event 265 * was received from the pin PB15. 266 * /--------------------------------EXTSRR-------------------------------/ 267 * @arg @ref PWR_FLAG_DEEPSTOPF System DEEPTSTOP Flag 268 * @arg @ref PWR_FLAG_RFPHASEF RFPHASE Flag 269 * 270 * @retval The new state of __FLAG__ (TRUE or FALSE). 271 */ 272 #if defined (PWR_CR6_EWU20) 273 #define __HAL_PWR_GET_FLAG(__FLAG__)( \ 274 ((__FLAG__) == PWR_FLAG_WUF0) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF0) == PWR_SR1_WUF0) : \ 275 ((__FLAG__) == PWR_FLAG_WUF1) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF1) == PWR_SR1_WUF1) : \ 276 ((__FLAG__) == PWR_FLAG_WUF2) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF2) == PWR_SR1_WUF2) : \ 277 ((__FLAG__) == PWR_FLAG_WUF3) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF3) == PWR_SR1_WUF3) : \ 278 ((__FLAG__) == PWR_FLAG_WUF4) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF4) == PWR_SR1_WUF4) : \ 279 ((__FLAG__) == PWR_FLAG_WUF5) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF5) == PWR_SR1_WUF5) : \ 280 ((__FLAG__) == PWR_FLAG_WUF6) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF6) == PWR_SR1_WUF6) : \ 281 ((__FLAG__) == PWR_FLAG_WUF7) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF7) == PWR_SR1_WUF7) : \ 282 ((__FLAG__) == PWR_FLAG_WUF8) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF8) == PWR_SR1_WUF8) : \ 283 ((__FLAG__) == PWR_FLAG_WUF9) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF9) == PWR_SR1_WUF9) : \ 284 ((__FLAG__) == PWR_FLAG_WUF10) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF10) == PWR_SR1_WUF10) : \ 285 ((__FLAG__) == PWR_FLAG_WUF11) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF11) == PWR_SR1_WUF11) : \ 286 ((__FLAG__) == PWR_FLAG_WBLEF) ? (READ_BIT(PWR->SR1, PWR_SR1_WBLEF) == PWR_SR1_WBLEF) : \ 287 ((__FLAG__) == PWR_FLAG_BHWF) ? (READ_BIT(PWR->SR1, PWR_SR1_WBLEHCPUF) == PWR_SR1_WBLEHCPUF) : \ 288 ((__FLAG__) == PWR_FLAG_WUFI) ? (READ_BIT(PWR->SR1, PWR_SR1_IWUF) == PWR_SR1_IWUF) : \ 289 ((__FLAG__) == PWR_FLAG_SMPSBYPR) ? (READ_BIT(PWR->SR2, PWR_SR2_SMPSBYPR) == PWR_SR2_SMPSBYPR) : \ 290 ((__FLAG__) == PWR_FLAG_SMPSENR) ? (READ_BIT(PWR->SR2, PWR_SR2_SMPSENR) == PWR_SR2_SMPSENR) : \ 291 ((__FLAG__) == PWR_FLAG_SMPSRDYF) ? (READ_BIT(PWR->SR2, PWR_SR2_SMPSRDY) == PWR_SR2_SMPSRDY) : \ 292 ((__FLAG__) == PWR_FLAG_REGLPS) ? (READ_BIT(PWR->SR2, PWR_SR2_REGLPS) == PWR_SR2_REGLPS) : \ 293 ((__FLAG__) == PWR_FLAG_REGMS) ? (READ_BIT(PWR->SR2, PWR_SR2_REGMS) == PWR_SR2_REGMS) : \ 294 ((__FLAG__) == PWR_FLAG_PVDO) ? (READ_BIT(PWR->SR2, PWR_SR2_PVDO) == PWR_SR2_PVDO) : \ 295 ((__FLAG__) == PWR_FLAG_WUF12) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF12) == PWR_SR3_WUF12) : \ 296 ((__FLAG__) == PWR_FLAG_WUF13) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF13) == PWR_SR3_WUF13) : \ 297 ((__FLAG__) == PWR_FLAG_WUF14) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF14) == PWR_SR3_WUF14) : \ 298 ((__FLAG__) == PWR_FLAG_WUF15) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF15) == PWR_SR3_WUF15) : \ 299 ((__FLAG__) == PWR_FLAG_WUF16) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF16) == PWR_SR3_WUF16) : \ 300 ((__FLAG__) == PWR_FLAG_WUF17) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF17) == PWR_SR3_WUF17) : \ 301 ((__FLAG__) == PWR_FLAG_WUF18) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF18) == PWR_SR3_WUF18) : \ 302 ((__FLAG__) == PWR_FLAG_WUF19) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF19) == PWR_SR3_WUF19) : \ 303 ((__FLAG__) == PWR_FLAG_WUF20) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF20) == PWR_SR3_WUF20) : \ 304 ((__FLAG__) == PWR_FLAG_WUF21) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF21) == PWR_SR3_WUF21) : \ 305 ((__FLAG__) == PWR_FLAG_WUF22) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF22) == PWR_SR3_WUF22) : \ 306 ((__FLAG__) == PWR_FLAG_WUF23) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF23) == PWR_SR3_WUF23) : \ 307 ((__FLAG__) == PWR_FLAG_WUF24) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF24) == PWR_SR3_WUF24) : \ 308 ((__FLAG__) == PWR_FLAG_WUF25) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF25) == PWR_SR3_WUF25) : \ 309 ((__FLAG__) == PWR_FLAG_WUF26) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF26) == PWR_SR3_WUF26) : \ 310 ((__FLAG__) == PWR_FLAG_WUF27) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF27) == PWR_SR3_WUF27) : \ 311 ((__FLAG__) == PWR_FLAG_DEEPSTOPF) ? (READ_BIT(PWR->EXTSRR, PWR_EXTSRR_DEEPSTOPF) == PWR_EXTSRR_DEEPSTOPF) : \ 312 (READ_BIT(PWR->EXTSRR, PWR_EXTSRR_RFPHASEF) == PWR_EXTSRR_RFPHASEF)) 313 #else 314 #define __HAL_PWR_GET_FLAG(__FLAG__)( \ 315 ((__FLAG__) == PWR_FLAG_WUF0) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF0) == PWR_SR1_WUF0) : \ 316 ((__FLAG__) == PWR_FLAG_WUF1) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF1) == PWR_SR1_WUF1) : \ 317 ((__FLAG__) == PWR_FLAG_WUF2) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF2) == PWR_SR1_WUF2) : \ 318 ((__FLAG__) == PWR_FLAG_WUF3) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF3) == PWR_SR1_WUF3) : \ 319 ((__FLAG__) == PWR_FLAG_WUF4) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF4) == PWR_SR1_WUF4) : \ 320 ((__FLAG__) == PWR_FLAG_WUF5) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF5) == PWR_SR1_WUF5) : \ 321 ((__FLAG__) == PWR_FLAG_WUF6) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF6) == PWR_SR1_WUF6) : \ 322 ((__FLAG__) == PWR_FLAG_WUF7) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF7) == PWR_SR1_WUF7) : \ 323 ((__FLAG__) == PWR_FLAG_WUF8) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF8) == PWR_SR1_WUF8) : \ 324 ((__FLAG__) == PWR_FLAG_WUF9) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF9) == PWR_SR1_WUF9) : \ 325 ((__FLAG__) == PWR_FLAG_WUF10) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF10) == PWR_SR1_WUF10) : \ 326 ((__FLAG__) == PWR_FLAG_WUF11) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF11) == PWR_SR1_WUF11) : \ 327 ((__FLAG__) == PWR_FLAG_WBLEF) ? (READ_BIT(PWR->SR1, PWR_SR1_WBLEF) == PWR_SR1_WBLEF) : \ 328 ((__FLAG__) == PWR_FLAG_BHWF) ? (READ_BIT(PWR->SR1, PWR_SR1_WBLEHCPUF) == PWR_SR1_WBLEHCPUF) : \ 329 ((__FLAG__) == PWR_FLAG_WUFI) ? (READ_BIT(PWR->SR1, PWR_SR1_IWUF) == PWR_SR1_IWUF) : \ 330 ((__FLAG__) == PWR_FLAG_IWUF2) ? (READ_BIT(PWR->SR1, PWR_SR1_IWUF2) == PWR_SR1_IWUF2) : \ 331 ((__FLAG__) == PWR_FLAG_SMPSBYPR) ? (READ_BIT(PWR->SR2, PWR_SR2_SMPSBYPR) == PWR_SR2_SMPSBYPR) : \ 332 ((__FLAG__) == PWR_FLAG_SMPSENR) ? (READ_BIT(PWR->SR2, PWR_SR2_SMPSENR) == PWR_SR2_SMPSENR) : \ 333 ((__FLAG__) == PWR_FLAG_SMPSRDYF) ? (READ_BIT(PWR->SR2, PWR_SR2_SMPSRDY) == PWR_SR2_SMPSRDY) : \ 334 ((__FLAG__) == PWR_FLAG_REGLPS) ? (READ_BIT(PWR->SR2, PWR_SR2_REGLPS) == PWR_SR2_REGLPS) : \ 335 ((__FLAG__) == PWR_FLAG_PVDO) ? (READ_BIT(PWR->SR2, PWR_SR2_PVDO) == PWR_SR2_PVDO) : \ 336 ((__FLAG__) == PWR_FLAG_WUF12) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF12) == PWR_SR3_WUF12) : \ 337 ((__FLAG__) == PWR_FLAG_WUF13) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF13) == PWR_SR3_WUF13) : \ 338 ((__FLAG__) == PWR_FLAG_WUF14) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF14) == PWR_SR3_WUF14) : \ 339 ((__FLAG__) == PWR_FLAG_WUF15) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF15) == PWR_SR3_WUF15) : \ 340 ((__FLAG__) == PWR_FLAG_WUF16) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF16) == PWR_SR3_WUF16) : \ 341 ((__FLAG__) == PWR_FLAG_WUF17) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF17) == PWR_SR3_WUF17) : \ 342 ((__FLAG__) == PWR_FLAG_WUF18) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF18) == PWR_SR3_WUF18) : \ 343 ((__FLAG__) == PWR_FLAG_WUF19) ? (READ_BIT(PWR->SR3, PWR_SR3_WUF19) == PWR_SR3_WUF19) : \ 344 ((__FLAG__) == PWR_FLAG_DEEPSTOPF) ? (READ_BIT(PWR->EXTSRR, PWR_EXTSRR_DEEPSTOPF) == PWR_EXTSRR_DEEPSTOPF): \ 345 (READ_BIT(PWR->EXTSRR, PWR_EXTSRR_RFPHASEF) == PWR_EXTSRR_RFPHASEF)) 346 #endif /* PWR_CR6_EWU20 */ 347 348 /** @brief Clear a specific PWR flag. 349 * @param __FLAG__ specifies the flag to clear. 350 * This parameter can be one of the following values: 351 * /--------------------------------SR1-------------------------------/ 352 * @arg @ref PWR_FLAG_WUF0 Wake Up Flag 0. Indicates that a wakeup event 353 * was received from the pin PB0. 354 * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event 355 * was received from the pin PB1. 356 * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event 357 * was received from the pin PB2. 358 * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event 359 * was received from the pin PB3. 360 * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event 361 * was received from the pin PB4. 362 * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event 363 * was received from the pin PB5. 364 * @arg @ref PWR_FLAG_WUF6 Wake Up Flag 6. Indicates that a wakeup event 365 * was received from the pin PB6. 366 * @arg @ref PWR_FLAG_WUF7 Wake Up Flag 7. Indicates that a wakeup event 367 * was received from the pin PB7. 368 * @arg @ref PWR_FLAG_WUF8 Wake Up Flag 8. Indicates that a wakeup event 369 * was received from the pin PA8. 370 * @arg @ref PWR_FLAG_WUF9 Wake Up Flag 9. Indicates that a wakeup event 371 * was received from the pin PA9. 372 * @arg @ref PWR_FLAG_WUF10 Wake Up Flag 10. Indicates that a wakeup event 373 * was received from the pin PA10. 374 * @arg @ref PWR_FLAG_WUF11 Wake Up Flag 11. Indicates that a wakeup event 375 * was received from the pin PA11. 376 * @arg @ref PWR_FLAG_WBLEF Wake Up Flag Indicates that a wakeup event 377 * was received from the Bluetooth LE. 378 * 379 * @arg @ref PWR_FLAG_BHWF Wake Up Flag Indicates that a wakeup event 380 * was received from the Bluetooth LE Host CPU. 381 * 382 * @arg @ref PWR_FLAG_IWUF2 Wake Up Flag 11. Indicates that a wakeup event 383 * was received from the pin PA11. 384 * 385 * /--------------------------------SR3-------------------------------/ 386 * @arg @ref PWR_FLAG_WUF12 Wake Up Flag 12. Indicates that a wakeup event 387 * was received from the pin PA0. 388 * @arg @ref PWR_FLAG_WUF13 Wake Up Flag 13. Indicates that a wakeup event 389 * was received from the pin PA1. 390 * @arg @ref PWR_FLAG_WUF14 Wake Up Flag 14. Indicates that a wakeup event 391 * was received from the pin PA2. 392 * @arg @ref PWR_FLAG_WUF15 Wake Up Flag 15. Indicates that a wakeup event 393 * was received from the pin PA3. 394 * @arg @ref PWR_FLAG_WUF16 Wake Up Flag 16. Indicates that a wakeup event 395 * was received from the pin PB12 or PA4 for STM32wb07. 396 * @arg @ref PWR_FLAG_WUF17 Wake Up Flag 17. Indicates that a wakeup event 397 * was received from the pin PB13 or PA5 for STM32wb07. 398 * @arg @ref PWR_FLAG_WUF18 Wake Up Flag 18. Indicates that a wakeup event 399 * was received from the pin PB14 or PA6 for STM32wb07. 400 * @arg @ref PWR_FLAG_WUF19 Wake Up Flag 19. Indicates that a wakeup event 401 * was received from the pin PB15 or PA7 for STM32wb07. 402 * @arg @ref PWR_FLAG_WUF20 Wake Up Flag 20. Indicates that a wakeup event 403 * was received from the pin PB8. 404 * @arg @ref PWR_FLAG_WUF21 Wake Up Flag 21. Indicates that a wakeup event 405 * was received from the pin PB9. 406 * @arg @ref PWR_FLAG_WUF22 Wake Up Flag 22. Indicates that a wakeup event 407 * was received from the pin PB10. 408 * @arg @ref PWR_FLAG_WUF23 Wake Up Flag 23. Indicates that a wakeup event 409 * was received from the pin PB11. 410 * @arg @ref PWR_FLAG_WUF24 Wake Up Flag 24. Indicates that a wakeup event 411 * was received from the pin PB12. 412 * @arg @ref PWR_FLAG_WUF25 Wake Up Flag 25. Indicates that a wakeup event 413 * was received from the pin PB13. 414 * @arg @ref PWR_FLAG_WUF26 Wake Up Flag 26. Indicates that a wakeup event 415 * was received from the pin PB14. 416 * @arg @ref PWR_FLAG_WUF27 Wake Up Flag 27. Indicates that a wakeup event 417 * was received from the pin PB15. 418 * @arg @ref PWR_WU_FLAG_ALL all Wakeup flags. 419 * 420 * /--------------------------------EXTSRR-------------------------------/ 421 * @arg @ref PWR_FLAG_DEEPSTOPF System DEEPTSTOP Flag 422 * @arg @ref PWR_FLAG_RFPHASEF RFPHASE Flag 423 * @retval The new state of __FLAG__ (TRUE or FALSE). 424 */ 425 #if defined (PWR_CR6_EWU20) 426 #define __HAL_PWR_CLEAR_FLAG(__FLAG__)( \ 427 ((__FLAG__) == PWR_FLAG_DEEPSTOPF) ? (SET_BIT(PWR->EXTSRR, PWR_EXTSRR_DEEPSTOPF)) : \ 428 ((__FLAG__) == PWR_FLAG_RFPHASEF) ? (SET_BIT(PWR->EXTSRR, PWR_EXTSRR_RFPHASEF)) : \ 429 ((__FLAG__) == PWR_FLAG_WUF0) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF0)) : \ 430 ((__FLAG__) == PWR_FLAG_WUF1) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF1)) : \ 431 ((__FLAG__) == PWR_FLAG_WUF2) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF2)) : \ 432 ((__FLAG__) == PWR_FLAG_WUF3) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF3)) : \ 433 ((__FLAG__) == PWR_FLAG_WUF4) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF4)) : \ 434 ((__FLAG__) == PWR_FLAG_WUF5) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF5)) : \ 435 ((__FLAG__) == PWR_FLAG_WUF6) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF6)) : \ 436 ((__FLAG__) == PWR_FLAG_WUF7) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF7)) : \ 437 ((__FLAG__) == PWR_FLAG_WUF8) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF8)) : \ 438 ((__FLAG__) == PWR_FLAG_WUF9) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF9)) : \ 439 ((__FLAG__) == PWR_FLAG_WUF10) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF10)) : \ 440 ((__FLAG__) == PWR_FLAG_WUF11) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF11)) : \ 441 ((__FLAG__) == PWR_FLAG_WBLEF) ? (SET_BIT(PWR->SR1, PWR_SR1_WBLEF)) : \ 442 ((__FLAG__) == PWR_FLAG_BHWF) ? (SET_BIT(PWR->SR1, PWR_SR1_WBLEHCPUF)) : \ 443 ((__FLAG__) == PWR_FLAG_WUF12) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF12)) : \ 444 ((__FLAG__) == PWR_FLAG_WUF13) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF13)) : \ 445 ((__FLAG__) == PWR_FLAG_WUF14) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF14)) : \ 446 ((__FLAG__) == PWR_FLAG_WUF15) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF15)) : \ 447 ((__FLAG__) == PWR_FLAG_WUF16) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF16)) : \ 448 ((__FLAG__) == PWR_FLAG_WUF17) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF17)) : \ 449 ((__FLAG__) == PWR_FLAG_WUF18) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF18)) : \ 450 ((__FLAG__) == PWR_FLAG_WUF19) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF19)) : \ 451 ((__FLAG__) == PWR_FLAG_WUF20) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF20)) : \ 452 ((__FLAG__) == PWR_FLAG_WUF21) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF21)) : \ 453 ((__FLAG__) == PWR_FLAG_WUF22) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF22)) : \ 454 ((__FLAG__) == PWR_FLAG_WUF23) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF23)) : \ 455 ((__FLAG__) == PWR_FLAG_WUF24) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF24)) : \ 456 ((__FLAG__) == PWR_FLAG_WUF25) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF25)) : \ 457 ((__FLAG__) == PWR_FLAG_WUF26) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF26)) : \ 458 ((__FLAG__) == PWR_FLAG_WUF27) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF27)) : \ 459 ((__FLAG__) == PWR_FLAG_SR1_ALL) ? (SET_BIT(PWR->SR1, PWR_FLAG_SR1_ALL)) : \ 460 ((__FLAG__) == PWR_FLAG_SR3_ALL) ? (SET_BIT(PWR->SR3, PWR_FLAG_SR3_ALL)) : \ 461 (SET_BIT(PWR->SR1, PWR_FLAG_SR1_ALL), SET_BIT(PWR->SR3, PWR_FLAG_SR3_ALL))) 462 463 #else 464 #define __HAL_PWR_CLEAR_FLAG(__FLAG__)( \ 465 ((__FLAG__) == PWR_FLAG_DEEPSTOPF) ? (SET_BIT(PWR->EXTSRR, PWR_EXTSRR_DEEPSTOPF)) : \ 466 ((__FLAG__) == PWR_FLAG_RFPHASEF ) ? (SET_BIT(PWR->EXTSRR, PWR_EXTSRR_RFPHASEF)) : \ 467 ((__FLAG__) == PWR_FLAG_WUF0) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF0)) : \ 468 ((__FLAG__) == PWR_FLAG_WUF1) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF1)) : \ 469 ((__FLAG__) == PWR_FLAG_WUF2) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF2)) : \ 470 ((__FLAG__) == PWR_FLAG_WUF3) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF3)) : \ 471 ((__FLAG__) == PWR_FLAG_WUF4) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF4)) : \ 472 ((__FLAG__) == PWR_FLAG_WUF5) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF5)) : \ 473 ((__FLAG__) == PWR_FLAG_WUF6) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF6)) : \ 474 ((__FLAG__) == PWR_FLAG_WUF7) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF7)) : \ 475 ((__FLAG__) == PWR_FLAG_WUF8) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF8)) : \ 476 ((__FLAG__) == PWR_FLAG_WUF9) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF9)) : \ 477 ((__FLAG__) == PWR_FLAG_WUF10) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF10)) : \ 478 ((__FLAG__) == PWR_FLAG_WUF11) ? (SET_BIT(PWR->SR1, PWR_SR1_WUF11)) : \ 479 ((__FLAG__) == PWR_FLAG_WBLEF) ? (SET_BIT(PWR->SR1, PWR_SR1_WBLEF)) : \ 480 ((__FLAG__) == PWR_FLAG_BHWF) ? (SET_BIT(PWR->SR1, PWR_SR1_WBLEHCPUF)) : \ 481 ((__FLAG__) == PWR_FLAG_IWUF2) ? (SET_BIT(PWR->SR1, PWR_SR1_IWUF2)) : \ 482 ((__FLAG__) == PWR_FLAG_WUF12) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF12)) : \ 483 ((__FLAG__) == PWR_FLAG_WUF13) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF13)) : \ 484 ((__FLAG__) == PWR_FLAG_WUF14) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF14)) : \ 485 ((__FLAG__) == PWR_FLAG_WUF15) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF15)) : \ 486 ((__FLAG__) == PWR_FLAG_WUF16) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF16)) : \ 487 ((__FLAG__) == PWR_FLAG_WUF17) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF17)) : \ 488 ((__FLAG__) == PWR_FLAG_WUF18) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF18)) : \ 489 ((__FLAG__) == PWR_FLAG_WUF19) ? (SET_BIT(PWR->SR3, PWR_SR3_WUF19)) : \ 490 ((__FLAG__) == PWR_FLAG_SR1_ALL) ? (SET_BIT(PWR->SR1, PWR_FLAG_SR1_ALL)) : \ 491 ((__FLAG__) == PWR_FLAG_SR3_ALL) ? (SET_BIT(PWR->SR3, PWR_FLAG_SR3_ALL)) : \ 492 (SET_BIT(PWR->SR1, PWR_FLAG_SR1_ALL), SET_BIT(PWR->SR3, PWR_FLAG_SR3_ALL))) 493 #endif /* PWR_CR6_EWU20 */ 494 495 /** 496 * @brief Enable the PVD Line. 497 * @retval None 498 */ 499 #define __HAL_PWR_PVD_ENABLE_IT() SET_BIT(SYSCFG->PWRC_IER, SYSCFG_PWRC_IER_PVD_IE) 500 501 /** 502 * @brief Disable the PVD Interrupt Line. 503 * @retval None 504 */ 505 #define __HAL_PWR_PVD_DISABLE_IT() CLEAR_BIT(SYSCFG->PWRC_IER, SYSCFG_PWRC_IER_PVD_IE) 506 507 508 /** 509 * @brief Check whether or not the PVD interrupt flag is set. 510 * @retval PVD Line Status. 511 */ 512 #define __HAL_PWR_PVD_GET_FLAG() (READ_BIT(SYSCFG->PWRC_ISCR, SYSCFG_PWRC_ISCR_PVD_ISC)\ 513 == (SYSCFG_PWRC_ISCR_PVD_ISC)) ? 1UL : 0U 514 515 /** 516 * @brief Clear the PVD interrupt flag. 517 * @retval None 518 */ 519 #define __HAL_PWR_PVD_CLEAR_FLAG() SET_BIT(SYSCFG->PWRC_ISCR, SYSCFG_PWRC_ISCR_PVD_ISC) 520 521 /** 522 * @} 523 */ 524 525 526 /* Private macros --------------------------------------------------------*/ 527 /** @defgroup PWR_Private_Macros PWR Private Macros 528 * @{ 529 */ 530 531 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ 532 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ 533 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ 534 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) 535 536 537 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_NORMAL) ||\ 538 ((MODE) == PWR_PVD_MODE_IT)) 539 540 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ 541 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) 542 543 /** 544 * @} 545 */ 546 /** @addtogroup PWR_Exported_Functions 547 * @{ 548 */ 549 550 /* Exported functions --------------------------------------------------------*/ 551 /** @addtogroup PWR_Exported_Functions_Group1 552 * @{ 553 */ 554 void HAL_PWR_DeInit(void); 555 556 /** 557 * @} 558 */ 559 560 /** @addtogroup PWR_Exported_Functions_Group2 561 * @{ 562 */ 563 /* Peripheral Control functions ************************************************/ 564 HAL_StatusTypeDef HAL_PWR_ConfigPVD(const PWR_PVDTypeDef *sConfigPVD); 565 void HAL_PWR_EnablePVD(void); 566 void HAL_PWR_DisablePVD(void); 567 void HAL_PWR_PVDCallback(void); 568 /* WakeUp pins configuration functions ****************************************/ 569 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPin, uint32_t WakeUpPolarity); 570 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); 571 uint32_t HAL_PWR_GetClearWakeupSource(void); 572 /* Low Power modes configuration functions ************************************/ 573 HAL_StatusTypeDef HAL_PWR_ConfigDEEPSTOP(PWR_DEEPSTOPTypeDef *sConfigDEEPSTOP); 574 HAL_StatusTypeDef HAL_PWR_ConfigSHUTDOWN(PWR_SHUTDOWNTypeDef *sConfigSHUTDOWN); 575 void HAL_PWR_EnterDEEPSTOPMode(void); 576 void HAL_PWR_EnterSLEEPMode(void); 577 578 /* Sleep on exit and sev on pending configuration functions *******************/ 579 void HAL_PWR_EnableSleepOnExit(void); 580 void HAL_PWR_DisableSleepOnExit(void); 581 void HAL_PWR_EnableSEVOnPend(void); 582 void HAL_PWR_DisableSEVOnPend(void); 583 584 /* Interrupt handler functions ************************************************/ 585 void HAL_PWR_PVD_IRQHandler(void); 586 void HAL_PWR_WKUP_IRQHandler(void); 587 void HAL_PWR_WKUPx_Callback(uint32_t WakeupIOs); 588 589 /** 590 * @} 591 */ 592 593 /** 594 * @} 595 */ 596 597 /** 598 * @} 599 */ 600 601 /** 602 * @} 603 */ 604 605 #ifdef __cplusplus 606 } 607 #endif 608 609 610 #endif /* STM32WB0x_HAL_PWR_H */ 611
