1 /** 2 ****************************************************************************** 3 * @file stm32n6xx_hal_pwr_ex.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2023 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32N6xx_HAL_PWR_EX_H 21 #define STM32N6xx_HAL_PWR_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif /* __cplusplus */ 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32n6xx_hal_def.h" 29 30 31 /** @addtogroup STM32N6xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup PWREx 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 41 /** @defgroup PWREx_Exported_Types PWR Extended Exported Types 42 * @{ 43 */ 44 /** 45 * @brief PWREx Wakeup pin configuration structure definition 46 */ 47 typedef struct 48 { 49 uint32_t WakeUpPin; /*!< Specifies the Wake-Up pin to be enabled. 50 This parameter can be a value of @ref PWR_WakeUp_Pins */ 51 52 uint32_t PinPolarity; /*!< Specifies the Wake-Up pin polarity. 53 This parameter can be a value of @ref PWR_PIN_Polarity */ 54 55 uint32_t PinPull; /*!< Specifies the Wake-Up pin pull. 56 This parameter can be a value of @ref PWR_PIN_Pull */ 57 } PWREx_WakeupPinTypeDef; 58 59 /** 60 * @brief PWR PVM configuration structure definition 61 */ 62 typedef struct 63 { 64 uint32_t PVMType; /*!< Specifies which voltage is monitored. 65 This parameter can be a value of 66 @ref PWREx_PVM_Type. */ 67 68 uint32_t Mode; /*!< Specifies the operating mode for the selected pins. 69 This parameter can be a value of 70 @ref PWREx_PVM_Mode. */ 71 } PWR_PVMTypeDef; 72 73 74 /** 75 * @brief PWR VddCORE monitoring configuration structure definition 76 */ 77 typedef struct 78 { 79 uint32_t LowVoltageThreshold; /*!< Specifies the VDDCORE voltage detector low-level. 80 This parameter can be a value of 81 @ref PWREx_VDDCORE_Levels. */ 82 83 uint32_t Mode; /*!< Specifies the operating mode for the selected pins. 84 This parameter can be a value of 85 @ref PWREx_VddCOREVM_Mode. */ 86 } PWR_VddCOREVMTypeDef; 87 /** 88 * @} 89 */ 90 91 /* Exported constants --------------------------------------------------------*/ 92 93 /** @defgroup PWREx_Exported_Constants PWR Extended Exported Constants 94 * @{ 95 */ 96 97 /** @defgroup PWREx_Supply_configuration PWREx Supply configuration 98 * @{ 99 */ 100 #define PWR_SMPS_SUPPLY PWR_CR1_SDEN /*!< VCORE power domains are supplied from SMPS step-down converter according to VOS */ 101 #define PWR_EXTERNAL_SOURCE_SUPPLY (0U) /*!< SMPS step-down converter disabled. VCORE supplied from external source */ 102 103 #define PWR_SUPPLY_CONFIG_MASK PWR_CR1_SDEN 104 /** 105 * @} 106 */ 107 108 /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale 109 * @{ 110 */ 111 #define PWR_REGULATOR_VOLTAGE_SCALE0 PWR_VOSCR_VOS /*!< Voltage scaling range 0 (highest frequency) */ 112 #define PWR_REGULATOR_VOLTAGE_SCALE1 (0U) /*!< Voltage scaling range 1 (lowest power) */ 113 /** 114 * @} 115 */ 116 117 /** @defgroup PWREx_Regulator_Voltage_Scale PWREx Regulator Voltage Scale 118 * @{ 119 */ 120 #define PWR_REGULATOR_STOP_VOLTAGE_SCALE3 PWR_CPUCR_SVOS /*!< System Stop mode voltage scaling range 3 (highest frequency) */ 121 #define PWR_REGULATOR_STOP_VOLTAGE_SCALE5 (0U) /*!< System Stop mode voltage scaling range 5 (lowest power) */ 122 /** 123 * @} 124 */ 125 126 /** @defgroup PWREx_VBAT_Thresholds PWREx VBAT Thresholds 127 * @{ 128 */ 129 #define PWR_VBAT_BETWEEN_HIGH_LOW_THRESHOLD (0U) 130 #define PWR_VBAT_BELOW_LOW_THRESHOLD PWR_BDCR1_VBATL 131 #define PWR_VBAT_ABOVE_HIGH_THRESHOLD PWR_BDCR1_VBATH 132 /** 133 * @} 134 */ 135 136 /** @defgroup PWREx_TEMP_Thresholds PWREx Temperature Thresholds 137 * @{ 138 */ 139 #define PWR_TEMP_BETWEEN_HIGH_LOW_THRESHOLD (0U) 140 #define PWR_TEMP_BELOW_LOW_THRESHOLD PWR_BDCR1_TEMPL 141 #define PWR_TEMP_ABOVE_HIGH_THRESHOLD PWR_BDCR1_TEMPH 142 /** 143 * @} 144 */ 145 146 /** @defgroup PWREx_VDDCORE_Levels PWREx VDDCORE voltage detector low-level 147 * @{ 148 */ 149 #define PWR_VDDCORE_THRESHOLD_VOS0 PWR_CR3_VCORELLS 150 #define PWR_VDDCORE_THRESHOLD_VOS1 (0U) 151 /** 152 * @} 153 */ 154 155 /** @defgroup PWREx_VDDCORE_Thresholds PWREx VDDCORE voltage detector low-level Thresholds 156 * @{ 157 */ 158 #define PWR_VDDCORE_BETWEEN_HIGH_LOW_THRESHOLD (0U) 159 #define PWR_VDDCORE_BELOW_LOW_THRESHOLD PWR_CR3_VCOREL 160 #define PWR_VDDCORE_ABOVE_HIGH_THRESHOLD PWR_CR3_VCOREH 161 /** 162 * @} 163 */ 164 165 /** @defgroup PWREx_VddCOREVM_Mode PWR Extended VddCORE Monitoring Interrupt and Event Mode 166 * @{ 167 */ 168 #define PWR_VDDCOREVM_MODE_NORMAL (0x00U) /*!< Basic Mode is used */ 169 #define PWR_VDDCOREVM_MODE_IT_RISING (0x05U) /*!< External Interrupt Mode with Rising edge trigger detection */ 170 #define PWR_VDDCOREVM_MODE_IT_FALLING (0x06U) /*!< External Interrupt Mode with Falling edge trigger detection */ 171 #define PWR_VDDCOREVM_MODE_IT_RISING_FALLING (0x07U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 172 #define PWR_VDDCOREVM_MODE_EVENT_RISING (0x09U) /*!< Event Mode with Rising edge trigger detection */ 173 #define PWR_VDDCOREVM_MODE_EVENT_FALLING (0x0AU) /*!< Event Mode with Falling edge trigger detection */ 174 #define PWR_VDDCOREVM_MODE_EVENT_RISING_FALLING (0x0BU) /*!< Event Mode with Rising/Falling edge trigger detection */ 175 /** 176 * @} 177 */ 178 179 /** @defgroup PWREx_VDDIO PWREx Vdd IO selection 180 * @{ 181 */ 182 #define PWR_VDDIO (0U) 183 #define PWR_VDDIO2 (1U) 184 #define PWR_VDDIO3 (2U) 185 #define PWR_VDDIO4 (3U) 186 #define PWR_VDDIO5 (4U) 187 /** 188 * @} 189 */ 190 191 /** @defgroup PWREx_VDDIO_Range PWREx Vdd IO Range 192 * @{ 193 */ 194 #define PWR_VDDIO_RANGE_3V3 (0U) 195 #define PWR_VDDIO_RANGE_1V8 (1U) 196 /** 197 * @} 198 */ 199 200 /** @defgroup PWREx_PVM_Mode PWR Extended PVM Interrupt and Event Mode 201 * @{ 202 */ 203 #define PWR_PVM_MODE_NORMAL (0x00U) /*!< Basic Mode is used */ 204 #define PWR_PVM_MODE_IT_RISING (0x05U) /*!< External Interrupt Mode with Rising edge trigger detection */ 205 #define PWR_PVM_MODE_IT_FALLING (0x06U) /*!< External Interrupt Mode with Falling edge trigger detection */ 206 #define PWR_PVM_MODE_IT_RISING_FALLING (0x07U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 207 #define PWR_PVM_MODE_EVENT_RISING (0x09U) /*!< Event Mode with Rising edge trigger detection */ 208 #define PWR_PVM_MODE_EVENT_FALLING (0x0AU) /*!< Event Mode with Falling edge trigger detection */ 209 #define PWR_PVM_MODE_EVENT_RISING_FALLING (0x0BU) /*!< Event Mode with Rising/Falling edge trigger detection */ 210 /** 211 * @} 212 */ 213 214 /** 215 * @} 216 */ 217 218 /* Exported macros -----------------------------------------------------------*/ 219 /** @defgroup PWREx_Exported_Macros PWR Extended Exported Macros 220 * @{ 221 */ 222 223 /** 224 * @brief Enable the USBVM Extended Interrupt Line. 225 * @retval None. 226 */ 227 #define __HAL_PWR_USBVM_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR3, PWR_EXTI_LINE_PVM_VDDUSB) 228 229 /** 230 * @brief Disable the USBVM Extended Interrupt Line. 231 * @retval None. 232 */ 233 #define __HAL_PWR_USBVM_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR3, PWR_EXTI_LINE_PVM_VDDUSB) 234 235 /** 236 * @brief Enable the USBVM Event Line. 237 * @retval None. 238 */ 239 #define __HAL_PWR_USBVM_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR3, PWR_EXTI_LINE_PVM_VDDUSB) 240 241 /** 242 * @brief Disable the USBVM Event Line. 243 * @retval None. 244 */ 245 #define __HAL_PWR_USBVM_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR3, PWR_EXTI_LINE_PVM_VDDUSB) 246 247 /** 248 * @brief Enable the USBVM Extended Interrupt Rising Trigger. 249 * @retval None. 250 */ 251 #define __HAL_PWR_USBVM_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR3, PWR_EXTI_LINE_PVM_VDDUSB) 252 253 /** 254 * @brief Disable the USBVM Extended Interrupt Rising Trigger. 255 * @retval None. 256 */ 257 #define __HAL_PWR_USBVM_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR3, PWR_EXTI_LINE_PVM_VDDUSB) 258 259 /** 260 * @brief Enable the USBVM Extended Interrupt Falling Trigger. 261 * @retval None. 262 */ 263 #define __HAL_PWR_USBVM_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR3, PWR_EXTI_LINE_PVM_VDDUSB) 264 265 /** 266 * @brief Disable the USBVM Extended Interrupt Falling Trigger. 267 * @retval None. 268 */ 269 #define __HAL_PWR_USBVM_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR3, PWR_EXTI_LINE_PVM_VDDUSB) 270 271 /** 272 * @brief Enable the USBVM Extended Interrupt Rising & Falling Trigger. 273 * @retval None. 274 */ 275 #define __HAL_PWR_USBVM_EXTI_ENABLE_RISING_FALLING_EDGE() \ 276 do \ 277 { \ 278 __HAL_PWR_USBVM_EXTI_ENABLE_RISING_EDGE(); \ 279 __HAL_PWR_USBVM_EXTI_ENABLE_FALLING_EDGE(); \ 280 } while(0) 281 282 /** 283 * @brief Disable the USBVM Extended Interrupt Rising & Falling Trigger. 284 * @retval None. 285 */ 286 #define __HAL_PWR_USBVM_EXTI_DISABLE_RISING_FALLING_EDGE() \ 287 do \ 288 { \ 289 __HAL_PWR_USBVM_EXTI_DISABLE_RISING_EDGE(); \ 290 __HAL_PWR_USBVM_EXTI_DISABLE_FALLING_EDGE(); \ 291 } while(0) 292 293 /** 294 * @brief Generate a Software Interrupt on USBVM EXTI Line. 295 * @retval None 296 */ 297 #define __HAL_PWR_USBVM_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER3, PWR_EXTI_LINE_PVM_VDDUSB) 298 299 /** 300 * @brief Check whether the specified USBVM EXTI flag is set or not. 301 * @retval EXTI USBVM Line Status. 302 */ 303 #define __HAL_PWR_USBVM_EXTI_GET_FLAG() ((EXTI->RPR3 | EXTI->FPR3) & PWR_EXTI_LINE_PVM_VDDUSB) 304 305 /** 306 * @brief Clear the USBVM interrupt Rising flag. 307 * @retval None. 308 */ 309 #define __HAL_PWR_USBVM_EXTI_CLEAR_RISING_FLAG() WRITE_REG(EXTI->RPR3, PWR_EXTI_LINE_PVM_VDDUSB) 310 311 /** 312 * @brief Clear the USBVM interrupt Falling flag. 313 * @retval None 314 */ 315 #define __HAL_PWR_USBVM_EXTI_CLEAR_FALLING_FLAG() WRITE_REG(EXTI->FPR3, PWR_EXTI_LINE_PVM_VDDUSB) 316 317 /** 318 * @brief Enable the IO2VM Extended Interrupt Line. 319 * @retval None. 320 */ 321 #define __HAL_PWR_IO2VM_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR3, PWR_EXTI_LINE_PVM_VDDIO2) 322 323 /** 324 * @brief Disable the IO2VM Extended Interrupt Line. 325 * @retval None. 326 */ 327 #define __HAL_PWR_IO2VM_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR3, PWR_EXTI_LINE_PVM_VDDIO2) 328 329 /** 330 * @brief Enable the IO2VM Event Line. 331 * @retval None. 332 */ 333 #define __HAL_PWR_IO2VM_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR3, PWR_EXTI_LINE_PVM_VDDIO2) 334 335 /** 336 * @brief Disable the IO2VM Event Line. 337 * @retval None. 338 */ 339 #define __HAL_PWR_IO2VM_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR3, PWR_EXTI_LINE_PVM_VDDIO2) 340 341 /** 342 * @brief Enable the IO2VM Extended Interrupt Rising Trigger. 343 * @retval None. 344 */ 345 #define __HAL_PWR_IO2VM_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR3, PWR_EXTI_LINE_PVM_VDDIO2) 346 347 /** 348 * @brief Disable the IO2VM Extended Interrupt Rising Trigger. 349 * @retval None. 350 */ 351 #define __HAL_PWR_IO2VM_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR3, PWR_EXTI_LINE_PVM_VDDIO2) 352 353 /** 354 * @brief Enable the IO2VM Extended Interrupt Falling Trigger. 355 * @retval None. 356 */ 357 #define __HAL_PWR_IO2VM_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR3, PWR_EXTI_LINE_PVM_VDDIO2) 358 359 /** 360 * @brief Disable the IO2VM Extended Interrupt Falling Trigger. 361 * @retval None. 362 */ 363 #define __HAL_PWR_IO2VM_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR3, PWR_EXTI_LINE_PVM_VDDIO2) 364 365 /** 366 * @brief Enable the IO2VM Extended Interrupt Rising & Falling Trigger. 367 * @retval None. 368 */ 369 #define __HAL_PWR_IO2VM_EXTI_ENABLE_RISING_FALLING_EDGE() \ 370 do \ 371 { \ 372 __HAL_PWR_IO2VM_EXTI_ENABLE_RISING_EDGE(); \ 373 __HAL_PWR_IO2VM_EXTI_ENABLE_FALLING_EDGE(); \ 374 } while(0) 375 376 /** 377 * @brief Disable the IO2VM Extended Interrupt Rising & Falling Trigger. 378 * @retval None. 379 */ 380 #define __HAL_PWR_IO2VM_EXTI_DISABLE_RISING_FALLING_EDGE() \ 381 do \ 382 { \ 383 __HAL_PWR_IO2VM_EXTI_DISABLE_RISING_EDGE(); \ 384 __HAL_PWR_IO2VM_EXTI_DISABLE_FALLING_EDGE(); \ 385 } while(0) 386 387 /** 388 * @brief Generate a Software Interrupt on IO2VM EXTI Line. 389 * @retval None 390 */ 391 #define __HAL_PWR_IO2VM_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER3, PWR_EXTI_LINE_PVM_VDDIO2) 392 393 /** 394 * @brief Check whether the specified IO2VM EXTI flag is set or not. 395 * @retval EXTI IO2VM Line Status. 396 */ 397 #define __HAL_PWR_IO2VM_EXTI_GET_FLAG() ((EXTI->RPR3 | EXTI->FPR3) & PWR_EXTI_LINE_PVM_VDDIO2) 398 399 /** 400 * @brief Clear the IO2VM interrupt Rising flag. 401 * @retval None. 402 */ 403 #define __HAL_PWR_IO2VM_EXTI_CLEAR_RISING_FLAG() WRITE_REG(EXTI->RPR3, PWR_EXTI_LINE_PVM_VDDIO2) 404 405 /** 406 * @brief Clear the IO2VM interrupt Falling flag. 407 * @retval None 408 */ 409 #define __HAL_PWR_IO2VM_EXTI_CLEAR_FALLING_FLAG() WRITE_REG(EXTI->FPR3, PWR_EXTI_LINE_PVM_VDDIO2) 410 411 /** 412 * @brief Enable the IO3VM Extended Interrupt Line. 413 * @retval None. 414 */ 415 #define __HAL_PWR_IO3VM_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR3, PWR_EXTI_LINE_PVM_VDDIO3) 416 417 /** 418 * @brief Disable the IO3VM Extended Interrupt Line. 419 * @retval None. 420 */ 421 #define __HAL_PWR_IO3VM_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR3, PWR_EXTI_LINE_PVM_VDDIO3) 422 423 /** 424 * @brief Enable the IO3VM Event Line. 425 * @retval None. 426 */ 427 #define __HAL_PWR_IO3VM_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR3, PWR_EXTI_LINE_PVM_VDDIO3) 428 429 /** 430 * @brief Disable the IO3VM Event Line. 431 * @retval None. 432 */ 433 #define __HAL_PWR_IO3VM_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR3, PWR_EXTI_LINE_PVM_VDDIO3) 434 435 /** 436 * @brief Enable the IO3VM Extended Interrupt Rising Trigger. 437 * @retval None. 438 */ 439 #define __HAL_PWR_IO3VM_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR3, PWR_EXTI_LINE_PVM_VDDIO3) 440 441 /** 442 * @brief Disable the IO3VM Extended Interrupt Rising Trigger. 443 * @retval None. 444 */ 445 #define __HAL_PWR_IO3VM_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR3, PWR_EXTI_LINE_PVM_VDDIO3) 446 447 /** 448 * @brief Enable the IO3VM Extended Interrupt Falling Trigger. 449 * @retval None. 450 */ 451 #define __HAL_PWR_IO3VM_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR3, PWR_EXTI_LINE_PVM_VDDIO3) 452 453 /** 454 * @brief Disable the IO3VM Extended Interrupt Falling Trigger. 455 * @retval None. 456 */ 457 #define __HAL_PWR_IO3VM_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR3, PWR_EXTI_LINE_PVM_VDDIO3) 458 459 /** 460 * @brief Enable the IO3VM Extended Interrupt Rising & Falling Trigger. 461 * @retval None. 462 */ 463 #define __HAL_PWR_IO3VM_EXTI_ENABLE_RISING_FALLING_EDGE() \ 464 do \ 465 { \ 466 __HAL_PWR_IO3VM_EXTI_ENABLE_RISING_EDGE(); \ 467 __HAL_PWR_IO3VM_EXTI_ENABLE_FALLING_EDGE(); \ 468 } while(0) 469 470 /** 471 * @brief Disable the IO3VM Extended Interrupt Rising & Falling Trigger. 472 * @retval None. 473 */ 474 #define __HAL_PWR_IO3VM_EXTI_DISABLE_RISING_FALLING_EDGE() \ 475 do \ 476 { \ 477 __HAL_PWR_IO3VM_EXTI_DISABLE_RISING_EDGE(); \ 478 __HAL_PWR_IO3VM_EXTI_DISABLE_FALLING_EDGE(); \ 479 } while(0) 480 481 /** 482 * @brief Generate a Software Interrupt on IO3VM EXTI Line. 483 * @retval None 484 */ 485 #define __HAL_PWR_IO3VM_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER3, PWR_EXTI_LINE_PVM_VDDIO3) 486 487 /** 488 * @brief Check whether the specified IO3VM EXTI flag is set or not. 489 * @retval EXTI IO3VM Line Status. 490 */ 491 #define __HAL_PWR_IO3VM_EXTI_GET_FLAG() ((EXTI->RPR3 | EXTI->FPR3) & PWR_EXTI_LINE_PVM_VDDIO3) 492 493 /** 494 * @brief Clear the IO3VM interrupt Rising flag. 495 * @retval None. 496 */ 497 #define __HAL_PWR_IO3VM_EXTI_CLEAR_RISING_FLAG() WRITE_REG(EXTI->RPR3, PWR_EXTI_LINE_PVM_VDDIO3) 498 499 /** 500 * @brief Clear the IO3VM interrupt Falling flag. 501 * @retval None 502 */ 503 #define __HAL_PWR_IO3VM_EXTI_CLEAR_FALLING_FLAG() WRITE_REG(EXTI->FPR3, PWR_EXTI_LINE_PVM_VDDIO3) 504 505 /** 506 * @brief Enable the IO4VM Extended Interrupt Line. 507 * @retval None. 508 */ 509 #define __HAL_PWR_IO4VM_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR3, PWR_EXTI_LINE_PVM_VDDIO4) 510 511 /** 512 * @brief Disable the IO4VM Extended Interrupt Line. 513 * @retval None. 514 */ 515 #define __HAL_PWR_IO4VM_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR3, PWR_EXTI_LINE_PVM_VDDIO4) 516 517 /** 518 * @brief Enable the IO4VM Event Line. 519 * @retval None. 520 */ 521 #define __HAL_PWR_IO4VM_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR3, PWR_EXTI_LINE_PVM_VDDIO4) 522 523 /** 524 * @brief Disable the IO4VM Event Line. 525 * @retval None. 526 */ 527 #define __HAL_PWR_IO4VM_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR3, PWR_EXTI_LINE_PVM_VDDIO4) 528 529 /** 530 * @brief Enable the IO4VM Extended Interrupt Rising Trigger. 531 * @retval None. 532 */ 533 #define __HAL_PWR_IO4VM_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR3, PWR_EXTI_LINE_PVM_VDDIO4) 534 535 /** 536 * @brief Disable the IO4VM Extended Interrupt Rising Trigger. 537 * @retval None. 538 */ 539 #define __HAL_PWR_IO4VM_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR3, PWR_EXTI_LINE_PVM_VDDIO4) 540 541 /** 542 * @brief Enable the IO4VM Extended Interrupt Falling Trigger. 543 * @retval None. 544 */ 545 #define __HAL_PWR_IO4VM_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR3, PWR_EXTI_LINE_PVM_VDDIO4) 546 547 /** 548 * @brief Disable the IO4VM Extended Interrupt Falling Trigger. 549 * @retval None. 550 */ 551 #define __HAL_PWR_IO4VM_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR3, PWR_EXTI_LINE_PVM_VDDIO4) 552 553 /** 554 * @brief Enable the IO4VM Extended Interrupt Rising & Falling Trigger. 555 * @retval None. 556 */ 557 #define __HAL_PWR_IO4VM_EXTI_ENABLE_RISING_FALLING_EDGE() \ 558 do \ 559 { \ 560 __HAL_PWR_IO4VM_EXTI_ENABLE_RISING_EDGE(); \ 561 __HAL_PWR_IO4VM_EXTI_ENABLE_FALLING_EDGE(); \ 562 } while(0) 563 564 /** 565 * @brief Disable the IO4VM Extended Interrupt Rising & Falling Trigger. 566 * @retval None. 567 */ 568 #define __HAL_PWR_IO4VM_EXTI_DISABLE_RISING_FALLING_EDGE() \ 569 do \ 570 { \ 571 __HAL_PWR_IO4VM_EXTI_DISABLE_RISING_EDGE(); \ 572 __HAL_PWR_IO4VM_EXTI_DISABLE_FALLING_EDGE(); \ 573 } while(0) 574 575 /** 576 * @brief Generate a Software Interrupt on IO4VM EXTI Line. 577 * @retval None 578 */ 579 #define __HAL_PWR_IO4VM_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER3, PWR_EXTI_LINE_PVM_VDDIO4) 580 581 /** 582 * @brief Check whether the specified IO4VM EXTI flag is set or not. 583 * @retval EXTI IO4VM Line Status. 584 */ 585 #define __HAL_PWR_IO4VM_EXTI_GET_FLAG() ((EXTI->RPR3 | EXTI->FPR3) & PWR_EXTI_LINE_PVM_VDDIO4) 586 587 /** 588 * @brief Clear the IO4VM interrupt Rising flag. 589 * @retval None. 590 */ 591 #define __HAL_PWR_IO4VM_EXTI_CLEAR_RISING_FLAG() WRITE_REG(EXTI->RPR3, PWR_EXTI_LINE_PVM_VDDIO4) 592 593 /** 594 * @brief Clear the IO4VM interrupt Falling flag. 595 * @retval None 596 */ 597 #define __HAL_PWR_IO4VM_EXTI_CLEAR_FALLING_FLAG() WRITE_REG(EXTI->FPR3, PWR_EXTI_LINE_PVM_VDDIO4) 598 599 /** 600 * @brief Enable the IO5VM Extended Interrupt Line. 601 * @retval None. 602 */ 603 #define __HAL_PWR_IO5VM_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR3, PWR_EXTI_LINE_PVM_VDDIO5) 604 605 /** 606 * @brief Disable the IO5VM Extended Interrupt Line. 607 * @retval None. 608 */ 609 #define __HAL_PWR_IO5VM_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR3, PWR_EXTI_LINE_PVM_VDDIO5) 610 611 /** 612 * @brief Enable the IO5VM Event Line. 613 * @retval None. 614 */ 615 #define __HAL_PWR_IO5VM_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR3, PWR_EXTI_LINE_PVM_VDDIO5) 616 617 /** 618 * @brief Disable the IO5VM Event Line. 619 * @retval None. 620 */ 621 #define __HAL_PWR_IO5VM_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR3, PWR_EXTI_LINE_PVM_VDDIO5) 622 623 /** 624 * @brief Enable the IO5VM Extended Interrupt Rising Trigger. 625 * @retval None. 626 */ 627 #define __HAL_PWR_IO5VM_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR3, PWR_EXTI_LINE_PVM_VDDIO5) 628 629 /** 630 * @brief Disable the IO5VM Extended Interrupt Rising Trigger. 631 * @retval None. 632 */ 633 #define __HAL_PWR_IO5VM_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR3, PWR_EXTI_LINE_PVM_VDDIO5) 634 635 /** 636 * @brief Enable the IO5VM Extended Interrupt Falling Trigger. 637 * @retval None. 638 */ 639 #define __HAL_PWR_IO5VM_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR3, PWR_EXTI_LINE_PVM_VDDIO5) 640 641 /** 642 * @brief Disable the IO5VM Extended Interrupt Falling Trigger. 643 * @retval None. 644 */ 645 #define __HAL_PWR_IO5VM_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR3, PWR_EXTI_LINE_PVM_VDDIO5) 646 647 /** 648 * @brief Enable the IO5VM Extended Interrupt Rising & Falling Trigger. 649 * @retval None. 650 */ 651 #define __HAL_PWR_IO5VM_EXTI_ENABLE_RISING_FALLING_EDGE() \ 652 do \ 653 { \ 654 __HAL_PWR_IO5VM_EXTI_ENABLE_RISING_EDGE(); \ 655 __HAL_PWR_IO5VM_EXTI_ENABLE_FALLING_EDGE(); \ 656 } while(0) 657 658 /** 659 * @brief Disable the IO5VM Extended Interrupt Rising & Falling Trigger. 660 * @retval None. 661 */ 662 #define __HAL_PWR_IO5VM_EXTI_DISABLE_RISING_FALLING_EDGE() \ 663 do \ 664 { \ 665 __HAL_PWR_IO5VM_EXTI_DISABLE_RISING_EDGE(); \ 666 __HAL_PWR_IO5VM_EXTI_DISABLE_FALLING_EDGE(); \ 667 } while(0) 668 669 /** 670 * @brief Generate a Software Interrupt on IO5VM EXTI Line. 671 * @retval None 672 */ 673 #define __HAL_PWR_IO5VM_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER3, PWR_EXTI_LINE_PVM_VDDIO5) 674 675 /** 676 * @brief Check whether the specified IO5VM EXTI flag is set or not. 677 * @retval EXTI IO5VM Line Status. 678 */ 679 #define __HAL_PWR_IO5VM_EXTI_GET_FLAG() ((EXTI->RPR3 | EXTI->FPR3) & PWR_EXTI_LINE_PVM_VDDIO5) 680 681 /** 682 * @brief Clear the IO5VM interrupt Rising flag. 683 * @retval None. 684 */ 685 #define __HAL_PWR_IO5VM_EXTI_CLEAR_RISING_FLAG() WRITE_REG(EXTI->RPR3, PWR_EXTI_LINE_PVM_VDDIO5) 686 687 /** 688 * @brief Clear the IO5VM interrupt Falling flag. 689 * @retval None 690 */ 691 #define __HAL_PWR_IO5VM_EXTI_CLEAR_FALLING_FLAG() WRITE_REG(EXTI->FPR3, PWR_EXTI_LINE_PVM_VDDIO5) 692 693 /** 694 * @brief Enable the ADCVM Extended Interrupt Line. 695 * @retval None. 696 */ 697 #define __HAL_PWR_ADCVM_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR3, PWR_EXTI_LINE_PVM_VDDA) 698 699 /** 700 * @brief Disable the ADCVM Extended Interrupt Line. 701 * @retval None. 702 */ 703 #define __HAL_PWR_ADCVM_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR3, PWR_EXTI_LINE_PVM_VDDA) 704 705 /** 706 * @brief Enable the ADCVM Event Line. 707 * @retval None. 708 */ 709 #define __HAL_PWR_ADCVM_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR3, PWR_EXTI_LINE_PVM_VDDA) 710 711 /** 712 * @brief Disable the ADCVM Event Line. 713 * @retval None. 714 */ 715 #define __HAL_PWR_ADCVM_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR3, PWR_EXTI_LINE_PVM_VDDA) 716 717 /** 718 * @brief Enable the ADCVM Extended Interrupt Rising Trigger. 719 * @retval None. 720 */ 721 #define __HAL_PWR_ADCVM_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR3, PWR_EXTI_LINE_PVM_VDDA) 722 723 /** 724 * @brief Disable the ADCVM Extended Interrupt Rising Trigger. 725 * @retval None. 726 */ 727 #define __HAL_PWR_ADCVM_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR3, PWR_EXTI_LINE_PVM_VDDA) 728 729 /** 730 * @brief Enable the ADCVM Extended Interrupt Falling Trigger. 731 * @retval None. 732 */ 733 #define __HAL_PWR_ADCVM_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR3, PWR_EXTI_LINE_PVM_VDDA) 734 735 /** 736 * @brief Disable the ADCVM Extended Interrupt Falling Trigger. 737 * @retval None. 738 */ 739 #define __HAL_PWR_ADCVM_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR3, PWR_EXTI_LINE_PVM_VDDA) 740 741 /** 742 * @brief Enable the ADCVM Extended Interrupt Rising & Falling Trigger. 743 * @retval None. 744 */ 745 #define __HAL_PWR_ADCVM_EXTI_ENABLE_RISING_FALLING_EDGE() \ 746 do \ 747 { \ 748 __HAL_PWR_ADCVM_EXTI_ENABLE_RISING_EDGE(); \ 749 __HAL_PWR_ADCVM_EXTI_ENABLE_FALLING_EDGE(); \ 750 } while(0) 751 752 /** 753 * @brief Disable the ADCVM Extended Interrupt Rising & Falling Trigger. 754 * @retval None. 755 */ 756 #define __HAL_PWR_ADCVM_EXTI_DISABLE_RISING_FALLING_EDGE() \ 757 do \ 758 { \ 759 __HAL_PWR_ADCVM_EXTI_DISABLE_RISING_EDGE(); \ 760 __HAL_PWR_ADCVM_EXTI_DISABLE_FALLING_EDGE(); \ 761 } while(0) 762 763 /** 764 * @brief Generate a Software Interrupt on ADCVM EXTI Line. 765 * @retval None 766 */ 767 #define __HAL_PWR_ADCVM_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER3, PWR_EXTI_LINE_PVM_VDDA) 768 769 /** 770 * @brief Check whether the specified ADCVM EXTI flag is set or not. 771 * @retval EXTI ADCVM Line Status. 772 */ 773 #define __HAL_PWR_ADCVM_EXTI_GET_FLAG() ((EXTI->RPR3 | EXTI->FPR3) & PWR_EXTI_LINE_PVM_VDDA) 774 775 /** 776 * @brief Clear the ADCVM interrupt Rising flag. 777 * @retval None. 778 */ 779 #define __HAL_PWR_ADCVM_EXTI_CLEAR_RISING_FLAG() WRITE_REG(EXTI->RPR3, PWR_EXTI_LINE_PVM_VDDA) 780 781 /** 782 * @brief Clear the ADCVM interrupt Falling flag. 783 * @retval None 784 */ 785 #define __HAL_PWR_ADCVM_EXTI_CLEAR_FALLING_FLAG() WRITE_REG(EXTI->FPR3, PWR_EXTI_LINE_PVM_VDDA) 786 787 /** 788 * @brief Enable the VddCORE monitoring Extended Interrupt Line. 789 * @retval None. 790 */ 791 #define __HAL_PWR_VCOREVM_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR3, PWR_EXTI_LINE_VCOREVM) 792 793 /** 794 * @brief Disable the VddCORE monitoring Extended Interrupt Line. 795 * @retval None. 796 */ 797 #define __HAL_PWR_VCOREVM_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR3, PWR_EXTI_LINE_VCOREVM) 798 799 /** 800 * @brief Enable the VddCORE monitoring Event Line. 801 * @retval None. 802 */ 803 #define __HAL_PWR_VCOREVM_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR3, PWR_EXTI_LINE_VCOREVM) 804 805 /** 806 * @brief Disable the VddCORE monitoring Event Line. 807 * @retval None. 808 */ 809 #define __HAL_PWR_VCOREVM_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR3, PWR_EXTI_LINE_VCOREVM) 810 811 /** 812 * @brief Enable the VddCORE monitoring Extended Interrupt Rising Trigger. 813 * @retval None. 814 */ 815 #define __HAL_PWR_VCOREVM_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR3, PWR_EXTI_LINE_VCOREVM) 816 817 /** 818 * @brief Disable the VddCORE monitoring Extended Interrupt Rising Trigger. 819 * @retval None. 820 */ 821 #define __HAL_PWR_VCOREVM_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR3, PWR_EXTI_LINE_VCOREVM) 822 823 /** 824 * @brief Enable the VddCORE monitoring Extended Interrupt Falling Trigger. 825 * @retval None. 826 */ 827 #define __HAL_PWR_VCOREVM_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR3, PWR_EXTI_LINE_VCOREVM) 828 829 /** 830 * @brief Disable the VddCORE monitoring Extended Interrupt Falling Trigger. 831 * @retval None. 832 */ 833 #define __HAL_PWR_VCOREVM_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR3, PWR_EXTI_LINE_VCOREVM) 834 835 /** 836 * @brief Enable the VddCORE monitoring Extended Interrupt Rising & Falling Trigger. 837 * @retval None. 838 */ 839 #define __HAL_PWR_VCOREVM_EXTI_ENABLE_RISING_FALLING_EDGE() \ 840 do \ 841 { \ 842 __HAL_PWR_VCOREVM_EXTI_ENABLE_RISING_EDGE(); \ 843 __HAL_PWR_VCOREVM_EXTI_ENABLE_FALLING_EDGE(); \ 844 } while(0) 845 846 /** 847 * @brief Disable the VddCORE monitoring Extended Interrupt Rising & Falling Trigger. 848 * @retval None. 849 */ 850 #define __HAL_PWR_VCOREVM_EXTI_DISABLE_RISING_FALLING_EDGE() \ 851 do \ 852 { \ 853 __HAL_PWR_VCOREVM_EXTI_DISABLE_RISING_EDGE(); \ 854 __HAL_PWR_VCOREVM_EXTI_DISABLE_FALLING_EDGE(); \ 855 } while(0) 856 857 /** 858 * @brief Generate a Software Interrupt on VddCORE monitoring EXTI Line. 859 * @retval None 860 */ 861 #define __HAL_PWR_VCOREVM_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER3, PWR_EXTI_LINE_VCOREVM) 862 863 /** 864 * @brief Check whether the specified VddCORE monitoring EXTI flag is set or not. 865 * @retval EXTI VddCORE monitoring Line Status. 866 */ 867 #define __HAL_PWR_VCOREVM_EXTI_GET_FLAG() ((EXTI->RPR3 | EXTI->FPR3) & PWR_EXTI_LINE_VCOREVM) 868 869 /** 870 * @brief Clear the VddCORE monitoring interrupt Rising flag. 871 * @retval None. 872 */ 873 #define __HAL_PWR_VCOREVM_EXTI_CLEAR_RISING_FLAG() WRITE_REG(EXTI->RPR3, PWR_EXTI_LINE_VCOREVM) 874 875 /** 876 * @brief Clear the VddCORE monitoring interrupt Falling flag. 877 * @retval None 878 */ 879 #define __HAL_PWR_VCOREVM_EXTI_CLEAR_FALLING_FLAG() WRITE_REG(EXTI->FPR3, PWR_EXTI_LINE_VCOREVM) 880 /** 881 * @} 882 */ 883 884 /* Exported functions --------------------------------------------------------*/ 885 886 /** @addtogroup PWREx_Exported_Functions PWR Extended Exported Functions 887 * @{ 888 */ 889 890 /** @addtogroup PWREx_Exported_Functions_Group1 Power Supply Control Functions 891 * @{ 892 */ 893 /* Power supply control functions */ 894 HAL_StatusTypeDef HAL_PWREx_ConfigSupply(uint32_t SupplySource); 895 uint32_t HAL_PWREx_GetSupplyConfig(void); 896 897 /* Power voltage scaling functions */ 898 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling); 899 uint32_t HAL_PWREx_GetVoltageRange(void); 900 void HAL_PWREx_ControlStopModeVoltageScaling(uint32_t VoltageScaling); 901 uint32_t HAL_PWREx_GetStopModeVoltageRange(void); 902 903 904 /** @addtogroup PWREx_Exported_Functions_Group2 Wakeup Pins configuration functions 905 * @{ 906 */ 907 /* Wakeup Pins control functions */ 908 void HAL_PWREx_EnableWakeUpPin(const PWREx_WakeupPinTypeDef *sPinParams); 909 /** 910 * @} 911 */ 912 913 914 /** @addtogroup PWREx_Exported_Functions_Group3 Memories Retention Functions 915 * @{ 916 */ 917 void HAL_PWREx_EnableBkupRAMRetention(void); 918 void HAL_PWREx_DisableBkupRAMRetention(void); 919 void HAL_PWREx_EnableTCMRetention(void); 920 void HAL_PWREx_DisableTCMRetention(void); 921 void HAL_PWREx_EnableTCMFLXRetention(void); 922 void HAL_PWREx_DisableTCMFLXRetention(void); 923 /** 924 * @} 925 */ 926 927 /** @addtogroup PWREx_Exported_Functions_Group4 Low Power Control Functions 928 * @{ 929 */ 930 void HAL_PWREx_SetPulseLow(uint32_t Pulselowtime); 931 uint32_t HAL_PWREx_GetPulseLow(void); 932 void HAL_PWREx_EnableSMPSPWM(void); 933 void HAL_PWREx_DisableSMPSPWM(void); 934 void HAL_PWREx_EnablePullDownOutput(void); 935 void HAL_PWREx_DisablePullDownOutput(void); 936 /** 937 * @} 938 */ 939 940 /** @addtogroup PWREx_Exported_Functions_Group5 Power Monitoring functions 941 * @{ 942 */ 943 /* Power VBAT/Temperature monitoring functions */ 944 void HAL_PWREx_EnableMonitoring(void); 945 void HAL_PWREx_DisableMonitoring(void); 946 uint32_t HAL_PWREx_GetTemperatureLevel(void); 947 uint32_t HAL_PWREx_GetVBATLevel(void); 948 void HAL_PWREx_EnableVDDCOREMonitoring(void); 949 void HAL_PWREx_DisableVDDCOREMonitoring(void); 950 void HAL_PWREx_ConfigVDDCOREVM(const PWR_VddCOREVMTypeDef *pConfigVddCOREVM); 951 uint32_t HAL_PWREx_GetVDDCORELevel(void); 952 void HAL_PWREx_ConfigVddIORange(uint32_t VddIOPort, uint32_t VoltageRange); 953 uint32_t HAL_PWREx_GetVddIORange(uint32_t VddIOPort); 954 void HAL_PWREx_EnableVddIO4RangeSTBY(void); 955 void HAL_PWREx_DisableVddIO4RangeSTBY(void); 956 void HAL_PWREx_EnableVddIO5RangeSTBY(void); 957 void HAL_PWREx_DisableVddIO5RangeSTBY(void); 958 void HAL_PWREx_EnableVddUSB(void); 959 void HAL_PWREx_DisableVddUSB(void); 960 void HAL_PWREx_EnableVddIO2(void); 961 void HAL_PWREx_DisableVddIO2(void); 962 void HAL_PWREx_EnableVddIO3(void); 963 void HAL_PWREx_DisableVddIO3(void); 964 void HAL_PWREx_EnableVddIO4(void); 965 void HAL_PWREx_DisableVddIO4(void); 966 void HAL_PWREx_EnableVddIO5(void); 967 void HAL_PWREx_DisableVddIO5(void); 968 void HAL_PWREx_EnableVddA(void); 969 void HAL_PWREx_DisableVddA(void); 970 void HAL_PWREx_EnableVddUSBVMEN(void); 971 void HAL_PWREx_DisableVddUSBVMEN(void); 972 void HAL_PWREx_EnableVddIO2VMEN(void); 973 void HAL_PWREx_DisableVddIO2VMEN(void); 974 void HAL_PWREx_EnableVddIO3VMEN(void); 975 void HAL_PWREx_DisableVddIO3VMEN(void); 976 void HAL_PWREx_EnableVddIO4VMEN(void); 977 void HAL_PWREx_DisableVddIO4VMEN(void); 978 void HAL_PWREx_EnableVddIO5VMEN(void); 979 void HAL_PWREx_DisableVddIO5VMEN(void); 980 void HAL_PWREx_EnableVddAVMEN(void); 981 void HAL_PWREx_DisableVddAVMEN(void); 982 HAL_StatusTypeDef HAL_PWREx_ConfigPVM(const PWR_PVMTypeDef *pConfigPVM); 983 void HAL_PWREx_PVD_PVM_IRQHandler(void); 984 void HAL_PWREx_VDDCORE_Rising_Callback(void); 985 void HAL_PWREx_VDDCORE_Falling_Callback(void); 986 void HAL_PWREx_USBVM_Rising_Callback(void); 987 void HAL_PWREx_USBVM_Falling_Callback(void); 988 void HAL_PWREx_IO2VM_Rising_Callback(void); 989 void HAL_PWREx_IO2VM_Falling_Callback(void); 990 void HAL_PWREx_IO3VM_Rising_Callback(void); 991 void HAL_PWREx_IO3VM_Falling_Callback(void); 992 void HAL_PWREx_IO4VM_Rising_Callback(void); 993 void HAL_PWREx_IO4VM_Falling_Callback(void); 994 void HAL_PWREx_IO5VM_Rising_Callback(void); 995 void HAL_PWREx_IO5VM_Falling_Callback(void); 996 void HAL_PWREx_ADCVM_Rising_Callback(void); 997 void HAL_PWREx_ADCVM_Falling_Callback(void); 998 /** 999 * @} 1000 */ 1001 1002 /** 1003 * @} 1004 */ 1005 1006 /* Private types -------------------------------------------------------------*/ 1007 /* Private variables ---------------------------------------------------------*/ 1008 /* Private constants ---------------------------------------------------------*/ 1009 1010 1011 /** @defgroup PWREx_VDDCOREVM_EXTI PWR VddCORE monitoring extended interrupts and event lines defines 1012 * @{ 1013 */ 1014 #define PWR_EXTI_LINE_VCOREVM EXTI_IMR3_IM68 /*!< VddCORE monitoring EXTI Line */ 1015 /** 1016 * @} 1017 */ 1018 1019 /** @defgroup PWREx_PVM_EXTI PWR PVM extended interrupts and event lines defines 1020 * @{ 1021 */ 1022 #define PWR_EXTI_LINE_PVM_VDDIO2 EXTI_IMR3_IM69 /*!< PVM VDDIO2 EXTI Line */ 1023 #define PWR_EXTI_LINE_PVM_VDDIO3 EXTI_IMR3_IM70 /*!< PVM VDDIO3 EXTI Line */ 1024 #define PWR_EXTI_LINE_PVM_VDDIO4 EXTI_IMR3_IM71 /*!< PVM VDDIO4 EXTI Line */ 1025 #define PWR_EXTI_LINE_PVM_VDDIO5 EXTI_IMR3_IM72 /*!< PVM VDDIO5 EXTI Line */ 1026 #define PWR_EXTI_LINE_PVM_VDDUSB EXTI_IMR3_IM73 /*!< PVM VDD USB EXTI Line */ 1027 #define PWR_EXTI_LINE_PVM_VDDA EXTI_IMR3_IM74 /*!< PVM VDD ADC EXTI Line */ 1028 /** 1029 * @} 1030 */ 1031 1032 /** @defgroup PWREx_PVM_Type PWR Extended Voltage Monitoring Type 1033 * @{ 1034 */ 1035 #define PWR_VDDUSB_VM (0U) /*!< Independent USB voltage monitor */ 1036 #define PWR_VDDIO2_VM (1U) /*!< Independent VDDIO2 voltage monitor */ 1037 #define PWR_VDDIO3_VM (2U) /*!< Independent VDDIO3 voltage monitor */ 1038 #define PWR_VDDIO4_VM (3U) /*!< Independent VDDIO4 voltage monitor */ 1039 #define PWR_VDDIO5_VM (4U) /*!< Independent VDDIO5 voltage monitor */ 1040 #define PWR_VDDA_VM (5U) /*!< Independent VDDA voltage monitor */ 1041 /** 1042 * @} 1043 */ 1044 1045 /* Private macros ------------------------------------------------------------*/ 1046 /** @defgroup PWREx_Private_Macros PWREx Private Macros 1047 * @{ 1048 */ 1049 /** @defgroup PWREx_IS_PWR_Definitions PWREx Private macros to check input parameters 1050 * @{ 1051 */ 1052 /* Check PWR regulator configuration parameter */ 1053 #define IS_PWR_SUPPLY(__SOURCE__) (((__SOURCE__) == PWR_SMPS_SUPPLY) ||\ 1054 ((__SOURCE__) == PWR_EXTERNAL_SOURCE_SUPPLY)) 1055 1056 /* Check low power regulator parameter */ 1057 #define IS_PWR_REGULATOR(__REGULATOR__) ((__REGULATOR__) == PWR_MAINREGULATOR_ON) 1058 1059 /* Check voltage scale level parameter */ 1060 #define IS_PWR_REGULATOR_VOLTAGE(__VOLTAGE__) (((__VOLTAGE__) == PWR_REGULATOR_VOLTAGE_SCALE0) || \ 1061 ((__VOLTAGE__) == PWR_REGULATOR_VOLTAGE_SCALE1)) 1062 1063 /* Check PWR regulator configuration in STOP mode parameter */ 1064 #define IS_PWR_STOP_MODE_REGULATOR_VOLTAGE(__VOLTAGE__) (((__VOLTAGE__) == PWR_REGULATOR_STOP_VOLTAGE_SCALE3) ||\ 1065 ((__VOLTAGE__) == PWR_REGULATOR_STOP_VOLTAGE_SCALE5)) 1066 1067 /* Check PWR pulse low time configuration parameter */ 1068 #define IS_PWR_PULSE_LOW_TIME(__LOWTIME__) ((__LOWTIME__) <= 31U) 1069 1070 /* Check VDDCORE voltage detector low-level parameter */ 1071 #define IS_PWR_VDDCOREVM_LEVEL(__LEVEL__) (((__LEVEL__) == PWR_VDDCORE_THRESHOLD_VOS0) || \ 1072 ((__LEVEL__) == PWR_VDDCORE_THRESHOLD_VOS1)) 1073 1074 /* Check VddCORE VM mode check parameter */ 1075 #define IS_PWR_VDDCOREVM_MODE(__MODE__) \ 1076 (((__MODE__) == PWR_VDDCOREVM_MODE_NORMAL) ||\ 1077 ((__MODE__) == PWR_VDDCOREVM_MODE_IT_RISING) ||\ 1078 ((__MODE__) == PWR_VDDCOREVM_MODE_IT_FALLING) ||\ 1079 ((__MODE__) == PWR_VDDCOREVM_MODE_IT_RISING_FALLING) ||\ 1080 ((__MODE__) == PWR_VDDCOREVM_MODE_EVENT_RISING) ||\ 1081 ((__MODE__) == PWR_VDDCOREVM_MODE_EVENT_FALLING) ||\ 1082 ((__MODE__) == PWR_VDDCOREVM_MODE_EVENT_RISING_FALLING)) 1083 1084 /* Check PVM type parameter */ 1085 #define IS_PWR_PVM_TYPE(__TYPE__) \ 1086 (((__TYPE__) == PWR_VDDUSB_VM) ||\ 1087 ((__TYPE__) == PWR_VDDIO2_VM) ||\ 1088 ((__TYPE__) == PWR_VDDIO3_VM) ||\ 1089 ((__TYPE__) == PWR_VDDIO4_VM) ||\ 1090 ((__TYPE__) == PWR_VDDIO5_VM) ||\ 1091 ((__TYPE__) == PWR_VDDA_VM)) 1092 1093 /* Check PVM mode check parameter */ 1094 #define IS_PWR_PVM_MODE(__MODE__) \ 1095 (((__MODE__) == PWR_PVM_MODE_NORMAL) ||\ 1096 ((__MODE__) == PWR_PVM_MODE_IT_RISING) ||\ 1097 ((__MODE__) == PWR_PVM_MODE_IT_FALLING) ||\ 1098 ((__MODE__) == PWR_PVM_MODE_IT_RISING_FALLING) ||\ 1099 ((__MODE__) == PWR_PVM_MODE_EVENT_RISING) ||\ 1100 ((__MODE__) == PWR_PVM_MODE_EVENT_FALLING) ||\ 1101 ((__MODE__) == PWR_PVM_MODE_EVENT_RISING_FALLING)) 1102 1103 /* Check the VddIO parameter */ 1104 #define IS_PWR_VDDIO(__VDDIO__) (((__VDDIO__) == PWR_VDDIO) || \ 1105 ((__VDDIO__) == PWR_VDDIO2) || \ 1106 ((__VDDIO__) == PWR_VDDIO3) || \ 1107 ((__VDDIO__) == PWR_VDDIO4) || \ 1108 ((__VDDIO__) == PWR_VDDIO5)) 1109 1110 /* Check the VddIO Range parameter */ 1111 #define IS_PWR_VDDIO_RANGE(__RANGE__) (((__RANGE__) == PWR_VDDIO_RANGE_3V3) || \ 1112 ((__RANGE__) == PWR_VDDIO_RANGE_1V8)) 1113 1114 /** 1115 * @} 1116 */ 1117 1118 /** 1119 * @} 1120 */ 1121 1122 /** 1123 * @} 1124 */ 1125 1126 /** 1127 * @} 1128 */ 1129 1130 /** 1131 * @} 1132 */ 1133 1134 1135 #ifdef __cplusplus 1136 } 1137 #endif /* __cplusplus */ 1138 1139 1140 #endif /* STM32N6xx_HAL_PWR_EX_H */ 1141 1142
