1 /**
2   ******************************************************************************
3   * @file    stm32wb0x_hal_pwr_ex.h
4   * @author  MCD Application Team
5   * @brief   Header file of PWR HAL Extended module.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2024 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32WB0x_HAL_PWR_EX_H
21 #define STM32WB0x_HAL_PWR_EX_H
22 
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26 
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32wb0x_hal_def.h"
29 
30 /** @addtogroup STM32WB0x_HAL_Driver
31   * @{
32   */
33 
34 /** @addtogroup PWREx
35   * @{
36   */
37 /* Exported types ------------------------------------------------------------*/
38 /* Exported constants --------------------------------------------------------*/
39 
40 /** @defgroup PWREx_Exported_Constants  PWR Extended Exported Constants
41   * @{
42   */
43 
44 /** @defgroup PWREx_WakeUp_Pins  PWR Wake-up pins
45   * @{
46   */
47 #if !defined(PWR_CR6_EWU20)
48 #define PWR_WAKEUP_CR3_ALL        (0x00000FFFU)
49 #define PWR_WAKEUP_CR6_ALL        (0x000000FFU << 16)
50 #define PWR_WAKEUP_ALL            0x00FF0FFFU               /*!< Enable all the wakeup source                   */
51 #define PWR_WAKEUP_PIN_RTC        PWR_CR3_EIWL              /*!< Enable wakeup on Internal event (RTC)          */
52 #define PWR_WAKEUP_PIN_LPUART     PWR_CR3_EIWL2             /*!< Enable wakeup on Internal event 2 (LPUART)     */
53 #define PWR_WAKEUP_BLEHOST        PWR_CR3_EWBLEHCPU         /*!< Enable wakeup on BLE Host CPU event            */
54 #define PWR_WAKEUP_BLE            PWR_CR3_EWBLE             /*!< Enable wakeup on BLE event                     */
55 #define PWR_WAKEUP_PA11           PWR_CR3_EWU11             /*!< Enable wakeup on PA11 I/O event                */
56 #define PWR_WAKEUP_PA10           PWR_CR3_EWU10             /*!< Enable wakeup on PA10 I/O event                */
57 #define PWR_WAKEUP_PA9            PWR_CR3_EWU9              /*!< Enable wakeup on PA9 I/O event                 */
58 #define PWR_WAKEUP_PA8            PWR_CR3_EWU8              /*!< Enable wakeup on PA8 I/O event                 */
59 #define PWR_WAKEUP_PA3            (PWR_CR6_EWU15 << 16)     /*!< Enable wakeup on PA3 I/O event                 */
60 #define PWR_WAKEUP_PA2            (PWR_CR6_EWU14 << 16)     /*!< Enable wakeup on PA2 I/O event                 */
61 #define PWR_WAKEUP_PA1            (PWR_CR6_EWU13 << 16)     /*!< Enable wakeup on PA1 I/O event                 */
62 #define PWR_WAKEUP_PA0            (PWR_CR6_EWU12 << 16)     /*!< Enable wakeup on PA0 I/O event                 */
63 #define PWR_WAKEUP_PB7            PWR_CR3_EWU7              /*!< Enable wakeup on PB7 I/O event                 */
64 #define PWR_WAKEUP_PB6            PWR_CR3_EWU6              /*!< Enable wakeup on PB6 I/O event                 */
65 #define PWR_WAKEUP_PB5            PWR_CR3_EWU5              /*!< Enable wakeup on PB5 I/O event                 */
66 #define PWR_WAKEUP_PB4            PWR_CR3_EWU4              /*!< Enable wakeup on PB4 I/O event                 */
67 #define PWR_WAKEUP_PB3            PWR_CR3_EWU3              /*!< Enable wakeup on PB3 I/O event                 */
68 #define PWR_WAKEUP_PB2            PWR_CR3_EWU2              /*!< Enable wakeup on PB2 I/O event                 */
69 #define PWR_WAKEUP_PB1            PWR_CR3_EWU1              /*!< Enable wakeup on PB1 I/O event                 */
70 #define PWR_WAKEUP_PB0            PWR_CR3_EWU0              /*!< Enable wakeup on PB0 I/O event                 */
71 #define PWR_WAKEUP_PB15           (PWR_CR6_EWU19 << 16)     /*!< Enable wakeup on PB15 I/O event                */
72 #define PWR_WAKEUP_PB14           (PWR_CR6_EWU18 << 16)     /*!< Enable wakeup on PB14 I/O event                */
73 #define PWR_WAKEUP_PB13           (PWR_CR6_EWU17 << 16)     /*!< Enable wakeup on PB13 I/O event                */
74 #define PWR_WAKEUP_PB12           (PWR_CR6_EWU16 << 16)     /*!< Enable wakeup on PB12 I/O event                */
75 #else
76 #define PWR_WAKEUP_CR3_ALL        0x00000FFFU
77 #define PWR_WAKEUP_CR6_ALL        (0x0000FFFFU << 16)
78 #define PWR_WAKEUP_ALL            0xFFFF0FFFU               /*!< Enable all the wakeup source                   */
79 #define PWR_WAKEUP_PIN_RTC        PWR_CR3_EIWL              /*!< Enable wakeup on Internal event (RTC)          */
80 #define PWR_WAKEUP_BLEHOST        PWR_CR3_EWBLEHCPU         /*!< Enable wakeup on BLE Host CPU event            */
81 #define PWR_WAKEUP_BLE            PWR_CR3_EWBLE             /*!< Enable wakeup on BLE event                     */
82 #define PWR_WAKEUP_PA15           (PWR_CR6_EWU27 << 16)     /*!< Enable wakeup on PA15 I/O event                */
83 #define PWR_WAKEUP_PA14           (PWR_CR6_EWU26 << 16)     /*!< Enable wakeup on PA14 I/O event                */
84 #define PWR_WAKEUP_PA13           (PWR_CR6_EWU25 << 16)     /*!< Enable wakeup on PA13 I/O event                */
85 #define PWR_WAKEUP_PA12           (PWR_CR6_EWU24 << 16)     /*!< Enable wakeup on PA12 I/O event                */
86 #define PWR_WAKEUP_PA11           PWR_CR3_EWU11             /*!< Enable wakeup on PA11 I/O event                */
87 #define PWR_WAKEUP_PA10           PWR_CR3_EWU10             /*!< Enable wakeup on PA10 I/O event                */
88 #define PWR_WAKEUP_PA9            PWR_CR3_EWU9              /*!< Enable wakeup on PA9 I/O event                 */
89 #define PWR_WAKEUP_PA8            PWR_CR3_EWU8              /*!< Enable wakeup on PA8 I/O event                 */
90 #define PWR_WAKEUP_PA7            (PWR_CR6_EWU19 << 16)     /*!< Enable wakeup on LP-PA7 I/O event              */
91 #define PWR_WAKEUP_PA6            (PWR_CR6_EWU18 << 16)     /*!< Enable wakeup on LP-PA6 I/O event              */
92 #define PWR_WAKEUP_PA5            (PWR_CR6_EWU17 << 16)     /*!< Enable wakeup on LP-PA5 I/O event              */
93 #define PWR_WAKEUP_PA4            (PWR_CR6_EWU16 << 16)     /*!< Enable wakeup on LP-PA4 I/O event              */
94 #define PWR_WAKEUP_PA3            (PWR_CR6_EWU15 << 16)     /*!< Enable wakeup on PA3 I/O event                 */
95 #define PWR_WAKEUP_PA2            (PWR_CR6_EWU14 << 16)     /*!< Enable wakeup on PA2 I/O event                 */
96 #define PWR_WAKEUP_PA1            (PWR_CR6_EWU13 << 16)     /*!< Enable wakeup on PA1 I/O event                 */
97 #define PWR_WAKEUP_PA0            (PWR_CR6_EWU12 << 16)     /*!< Enable wakeup on PA0 I/O event                 */
98 #define PWR_WAKEUP_PB11           (PWR_CR6_EWU23 << 16)     /*!< Enable wakeup on PB11 I/O event                */
99 #define PWR_WAKEUP_PB10           (PWR_CR6_EWU22 << 16)     /*!< Enable wakeup on PB10 I/O event                */
100 #define PWR_WAKEUP_PB9            (PWR_CR6_EWU21 << 16)     /*!< Enable wakeup on PB9 I/O event                 */
101 #define PWR_WAKEUP_PB8            (PWR_CR6_EWU20 << 16)     /*!< Enable wakeup on PB8 I/O event                 */
102 #define PWR_WAKEUP_PB7            PWR_CR3_EWU7              /*!< Enable wakeup on PB7 I/O event                 */
103 #define PWR_WAKEUP_PB6            PWR_CR3_EWU6              /*!< Enable wakeup on PB6 I/O event                 */
104 #define PWR_WAKEUP_PB5            PWR_CR3_EWU5              /*!< Enable wakeup on PB5 I/O event                 */
105 #define PWR_WAKEUP_PB4            PWR_CR3_EWU4              /*!< Enable wakeup on PB4 I/O event                 */
106 #define PWR_WAKEUP_PB3            PWR_CR3_EWU3              /*!< Enable wakeup on PB3 I/O event                 */
107 #define PWR_WAKEUP_PB2            PWR_CR3_EWU2              /*!< Enable wakeup on PB2 I/O event                 */
108 #define PWR_WAKEUP_PB1            PWR_CR3_EWU1              /*!< Enable wakeup on PB1 I/O event                 */
109 #define PWR_WAKEUP_PB0            PWR_CR3_EWU0              /*!< Enable wakeup on PB0 I/O event                 */
110 #endif /* !defined PWR_CR6_EWU20 */
111 
112 /**
113   * @}
114   */
115 
116 /** @defgroup PWREx_GPIO_Bit_Number GPIO bit number I/O setting in shutdown mode
117   * @{
118   */
119 #define PWR_GPIO_BIT_0   PWR_PUCRA_PA0    /*!< GPIO port I/O pin 0  */
120 #define PWR_GPIO_BIT_1   PWR_PUCRA_PA1    /*!< GPIO port I/O pin 1  */
121 #define PWR_GPIO_BIT_2   PWR_PUCRB_PB2    /*!< GPIO port I/O pin 2  */
122 #define PWR_GPIO_BIT_3   PWR_PUCRB_PB3    /*!< GPIO port I/O pin 3  */
123 #define PWR_GPIO_BIT_4   PWR_PUCRB_PB4    /*!< GPIO port I/O pin 4  */
124 #define PWR_GPIO_BIT_5   PWR_PUCRB_PB5    /*!< GPIO port I/O pin 5  */
125 #define PWR_GPIO_BIT_6   PWR_PUCRB_PB6    /*!< GPIO port I/O pin 6  */
126 #define PWR_GPIO_BIT_7   PWR_PUCRB_PB7    /*!< GPIO port I/O pin 7  */
127 #define PWR_GPIO_BIT_8   PWR_PUCRA_PA8    /*!< GPIO port I/O pin 8  */
128 #define PWR_GPIO_BIT_9   PWR_PUCRA_PA9    /*!< GPIO port I/O pin 9  */
129 #define PWR_GPIO_BIT_10  PWR_PUCRA_PA10   /*!< GPIO port I/O pin 10 */
130 #define PWR_GPIO_BIT_11  PWR_PUCRA_PA11   /*!< GPIO port I/O pin 11 */
131 #define PWR_GPIO_BIT_12  PWR_PUCRB_PB12   /*!< GPIO port I/O pin 12 */
132 #define PWR_GPIO_BIT_13  PWR_PUCRB_PB13   /*!< GPIO port I/O pin 13 */
133 #define PWR_GPIO_BIT_14  PWR_PUCRB_PB14   /*!< GPIO port I/O pin 14 */
134 #define PWR_GPIO_BIT_15  PWR_PUCRB_PB15   /*!< GPIO port I/O pin 15 */
135 /**
136   * @}
137   */
138 
139 /** @defgroup PWREx_Flag  PWR Status Flags
140   *        Elements values convention: 0000 0000 XXXY YYYYb
141   *           - Y YYYY  : Flag position in the XXX register (5 bits)
142   *           - XXX  : Status register (3 bits)
143   *                 - 001: SR1 register
144   *                 - 010: SR2 register
145   *                 - 011: SR3 register
146   *                 - 100: EXTSRR register
147   * @{
148   */
149 /*--------------------------------SR1-------------------------------*/
150 #define PWR_FLAG_WUF0                       (PWR_FLAG_REG_SR1 | PWR_SR1_WUF0_Pos)       /*!< Wakeup event on wakeup pin PB0 */
151 #define PWR_FLAG_WUF1                       (PWR_FLAG_REG_SR1 | PWR_SR1_WUF1_Pos)       /*!< Wakeup event on wakeup pin PB1 */
152 #define PWR_FLAG_WUF2                       (PWR_FLAG_REG_SR1 | PWR_SR1_WUF2_Pos)       /*!< Wakeup event on wakeup pin PB2 */
153 #define PWR_FLAG_WUF3                       (PWR_FLAG_REG_SR1 | PWR_SR1_WUF3_Pos)       /*!< Wakeup event on wakeup pin PB3 */
154 #define PWR_FLAG_WUF4                       (PWR_FLAG_REG_SR1 | PWR_SR1_WUF4_Pos)       /*!< Wakeup event on wakeup pin PB4 */
155 #define PWR_FLAG_WUF5                       (PWR_FLAG_REG_SR1 | PWR_SR1_WUF5_Pos)       /*!< Wakeup event on wakeup pin PB5 */
156 #define PWR_FLAG_WUF6                       (PWR_FLAG_REG_SR1 | PWR_SR1_WUF6_Pos)       /*!< Wakeup event on wakeup pin PB6 */
157 #define PWR_FLAG_WUF7                       (PWR_FLAG_REG_SR1 | PWR_SR1_WUF7_Pos)       /*!< Wakeup event on wakeup pin PB7 */
158 #define PWR_FLAG_WUF8                       (PWR_FLAG_REG_SR1 | PWR_SR1_WUF8_Pos)       /*!< Wakeup event on wakeup pin PA8 */
159 #define PWR_FLAG_WUF9                       (PWR_FLAG_REG_SR1 | PWR_SR1_WUF9_Pos)       /*!< Wakeup event on wakeup pin PA9 */
160 #define PWR_FLAG_WUF10                      (PWR_FLAG_REG_SR1 | PWR_SR1_WUF10_Pos)      /*!< Wakeup event on wakeup pin PA10 */
161 #define PWR_FLAG_WUF11                      (PWR_FLAG_REG_SR1 | PWR_SR1_WUF11_Pos)      /*!< Wakeup event on wakeup pin PA11 */
162 #define PWR_FLAG_WBLEF                      (PWR_FLAG_REG_SR1 | PWR_SR1_WBLEF_Pos)      /*!< Bluetooth LE WakeUp Flag */
163 #define PWR_FLAG_BHWF                       (PWR_FLAG_REG_SR1 | PWR_SR1_WBLEHCPUF_Pos)  /*!< Bluetooth LE Host CPU WakeUp Flag */
164 #define PWR_FLAG_WUFI                       (PWR_FLAG_REG_SR1 | PWR_SR1_IWUF_Pos)       /*!< Wakeup on internal wakeup line */
165 #if defined(PWR_CR3_EIWL2)
166 #define PWR_FLAG_IWUF2                      (PWR_FLAG_REG_SR1 | PWR_SR1_IWUF2_Pos)      /*!< Wakeup on internal wakeup 2 line */
167 #define PWR_FLAG_SR1_ALL                    0x0000FFFFU
168 #else
169 #define PWR_FLAG_SR1_ALL                    0x0000BFFFU
170 #endif /* PWR_CR3_EIWL2 */
171 
172 /*--------------------------------SR2-------------------------------*/
173 #define PWR_FLAG_SMPSBYPR                   (PWR_FLAG_REG_SR2 | PWR_SR2_SMPSBYPR_Pos)   /*!< SMPS in SMPS PRECHARGE mode */
174 #define PWR_FLAG_SMPSENR                    (PWR_FLAG_REG_SR2 | PWR_SR2_SMPSENR_Pos)    /*!< SMPS in RUN mode Flag */
175 
176 #define PWR_FLAG_SMPSRDYF                   (PWR_FLAG_REG_SR2 | PWR_SR2_SMPSRDY_Pos)    /*!< SMPS Ready Flag */
177 
178 #define PWR_FLAG_REGLPS                     (PWR_FLAG_REG_SR2 | PWR_SR2_REGLPS_Pos)     /*!< Low-power regulator start flag */
179 #if defined(PWR_SR2_REGMS)
180 #define PWR_FLAG_REGMS                      (PWR_FLAG_REG_SR2 | PWR_SR2_REGMS_Pos)      /*!< Wakeup on internal wakeup 2 line */
181 #endif /* PWR_SR2_REGMS */
182 
183 #define PWR_FLAG_PVDO                       (PWR_FLAG_REG_SR2 | PWR_SR2_PVDO_Pos)       /*!< Power Voltage Detector output flag */
184 
185 /*------------------------------SR3---------------------------*/
186 #define PWR_FLAG_WUF12                      (PWR_FLAG_REG_SR3 | PWR_SR3_WUF12_Pos)       /*!< Wakeup event on wakeup pin PA0 */
187 #define PWR_FLAG_WUF13                      (PWR_FLAG_REG_SR3 | PWR_SR3_WUF13_Pos)       /*!< Wakeup event on wakeup pin PA1 */
188 #define PWR_FLAG_WUF14                      (PWR_FLAG_REG_SR3 | PWR_SR3_WUF14_Pos)       /*!< Wakeup event on wakeup pin PA2 */
189 #define PWR_FLAG_WUF15                      (PWR_FLAG_REG_SR3 | PWR_SR3_WUF15_Pos)       /*!< Wakeup event on wakeup pin PA3 */
190 #define PWR_FLAG_WUF16                      (PWR_FLAG_REG_SR3 | PWR_SR3_WUF16_Pos)       /*!< Wakeup event on wakeup pin PB12 */
191 #define PWR_FLAG_WUF17                      (PWR_FLAG_REG_SR3 | PWR_SR3_WUF17_Pos)       /*!< Wakeup event on wakeup pin PB13 */
192 #define PWR_FLAG_WUF18                      (PWR_FLAG_REG_SR3 | PWR_SR3_WUF18_Pos)       /*!< Wakeup event on wakeup pin PB14 */
193 #define PWR_FLAG_WUF19                      (PWR_FLAG_REG_SR3 | PWR_SR3_WUF19_Pos)       /*!< Wakeup event on wakeup pin PB15 */
194 #if defined(PWR_CR6_EWU20)
195 #define PWR_FLAG_WUF20                      (PWR_FLAG_REG_SR3 | PWR_SR3_WUF20_Pos)       /*!< Wakeup event on wakeup pin 20 */
196 #endif /* PWR_CR6_EWU20 */
197 #if defined(PWR_CR6_EWU21)
198 #define PWR_FLAG_WUF21                      (PWR_FLAG_REG_SR3 | PWR_SR3_WUF21_Pos)       /*!< Wakeup event on wakeup pin 21 */
199 #endif /* PWR_CR6_EWU21 */
200 #if defined (PWR_CR6_EWU22)
201 #define PWR_FLAG_WUF22                      (PWR_FLAG_REG_SR3 | PWR_SR3_WUF22_Pos)       /*!< Wakeup event on wakeup pin 22 */
202 #endif /* PWR_CR6_EWU22 */
203 #if defined(PWR_CR6_EWU23)
204 #define PWR_FLAG_WUF23                      (PWR_FLAG_REG_SR3 | PWR_SR3_WUF23_Pos)       /*!< Wakeup event on wakeup pin 23 */
205 #endif /* PWR_CR6_EWU23 */
206 #if defined(PWR_CR6_EWU24)
207 #define PWR_FLAG_WUF24                      (PWR_FLAG_REG_SR3 | PWR_SR3_WUF24_Pos)       /*!< Wakeup event on wakeup pin 24 */
208 #endif /* PWR_CR6_EWU24 */
209 #if defined (PWR_CR6_EWU25)
210 #define PWR_FLAG_WUF25                      (PWR_FLAG_REG_SR3 | PWR_SR3_WUF25_Pos)       /*!< Wakeup event on wakeup pin 25 */
211 #endif /* PWR_CR6_EWU25 */
212 #if defined(PWR_CR6_EWU26)
213 #define PWR_FLAG_WUF26                      (PWR_FLAG_REG_SR3 | PWR_SR3_WUF26_Pos)       /*!< Wakeup event on wakeup pin 26 */
214 #endif /* PWR_CR6_EWU26 */
215 #if defined (PWR_CR6_EWU27)
216 #define PWR_FLAG_WUF27                      (PWR_FLAG_REG_SR3 | PWR_SR3_WUF27_Pos)       /*!< Wakeup event on wakeup pin 27 */
217 #endif /* PWR_CR6_EWU27 */
218 #if defined(PWR_CR6_EWU20)
219 #define PWR_FLAG_SR3_ALL                    0x0000FFFFU
220 #else
221 #define PWR_FLAG_SR3_ALL                    0x000000FFU
222 #endif /* PWR_CR6_EWU20 */
223 #define PWR_WU_FLAG_ALL                     (PWR_FLAG_SR1_ALL | PWR_FLAG_SR3_ALL)
224 /*------------------------------EXTSRR---------------------------*/
225 #define PWR_FLAG_DEEPSTOPF                  (PWR_FLAG_REG_EXTSRR | PWR_EXTSRR_DEEPSTOPF_Pos)    /*!< System DEEPTSTOP Flag */
226 #define PWR_FLAG_RFPHASEF                   (PWR_FLAG_REG_EXTSRR | PWR_EXTSRR_RFPHASEF_Pos)     /*!< RFPHASE Flag */
227 /**
228   * @}
229   */
230 
231 /** @defgroup PWREx_PIN_Polarity PWREx Pin Polarity configuration
232   * @{
233   */
234 #define PWR_WUP_RISIEDG          0x00000000U
235 #define PWR_WUP_FALLEDG          0x00000001U
236 /**
237   * @}
238   */
239 
240 /** @defgroup PWR_RAMRET RAM Retention enable
241   * @{
242   */
243 #define PWR_RAMRET_1    PWR_CR2_RAMRET1
244 #if defined(PWR_CR2_RAMRET2)
245 #define PWR_RAMRET_2    PWR_CR2_RAMRET2
246 #endif /* PWR_CR2_RAMRET2 */
247 #if defined(PWR_CR2_RAMRET3)
248 #define PWR_RAMRET_3    PWR_CR2_RAMRET3
249 #endif /* PWR_CR2_RAMRET2 */
250 
251 /**
252   * @}
253   */
254 
255 /** @defgroup PWREx_GPIO GPIO port
256   * @{
257   */
258 #define PWR_GPIO_A         0x00000000U      /*!< GPIO port A */
259 #define PWR_GPIO_B         0x00000001U      /*!< GPIO port B */
260 /**
261   * @}
262   */
263 
264 /** @defgroup PWREx_PIN_Pull PWREx Pin Pull configuration
265   * @{
266   */
267 #define PWR_PIN_NO_PULL                (0x0U)
268 #define PWR_PIN_PULL_UP                (0x1U)
269 #define PWR_PIN_PULL_DOWN              (0x2U)
270 /**
271   * @}
272   */
273 
274 /** @defgroup PWREx_GPIO_PullUp_Port PWR Extended GPIO Pull-Up Port
275   * @{
276   */
277 #define PWR_GPIO_PULLUP_PORT_A         (0x00U)                                 /*!< GPIO port A */
278 #define PWR_GPIO_PULLUP_PORT_B         (0x01U)                                 /*!< GPIO port B */
279 /**
280   * @}
281   */
282 
283 /** @defgroup PWREx_GPIO_PullDown_Port PWR Extended GPIO Pull-Down Port
284   * @{
285   */
286 #define PWR_GPIO_PULLDOWN_PORT_A       (0x00U)                                 /*!< GPIO port A */
287 #define PWR_GPIO_PULLDOWN_PORT_B       (0x01U)                                 /*!< GPIO port B */
288 
289 /**
290   * @}
291   */
292 
293 /** @defgroup PWREx_SMPS_OPERATING_MODES SMPS step down converter operating modes
294   * @{
295   */
296 #define PWR_SMPS_ON         0x000000000U                  /*!< SMPS step down ON */
297 #define PWR_SMPS_OFF        PWR_CR5_NOSMPS                /*!< SMPS step down OFF */
298 #define PWR_SMPS_BYPASS     PWR_SMPS_PRECHARGE         /*!< SMPS is disabled and bypassed in precharge mode */
299 
300 /**
301   * @}
302   */
303 
304 /** @defgroup PWR_LL_SMPS_PRECHARGE_MODE SMPS PRECHARGE Mode
305   * @{
306   */
307 #define PWR_NO_SMPS_PRECHARGE    (0x000000000U)           /*!< SMPS not in pecharge mode */
308 #define PWR_SMPS_PRECHARGE       PWR_CR5_SMPSFBYP         /*!< SMPS is disabled and bypassed in precharge mode */
309 /**
310   * @}
311   */
312 
313 /** @defgroup PWR_LL_SMPS_BOM SMPS BOM
314   * @{
315   */
316 #define PWR_SMPS_BOM1       (0x000000000U)                /*!< SMPS BOM1 1.5 uH */
317 #define PWR_SMPS_BOM2       PWR_CR5_SMPSBOMSEL_0          /*!< SMPS BOM2 2.2 uH */
318 #define PWR_SMPS_BOM3       PWR_CR5_SMPSBOMSEL_1          /*!< SMPS BOM3 10 uH  */
319 /**
320   * @}
321   */
322 
323 /** @defgroup PWREx_SMPS_OUTPUT_VOLTAGE_LEVEL SMPS step down converter output voltage scaling voltage level
324   * @{
325   */
326 /* Note: SMPS voltage is trimmed during device production to control
327          the actual voltage level variation from device to device. */
328 #define PWR_SMPS_OUTPUT_VOLTAGE_1V20    (0x000000000U)                                             /*!< SMPS step down converter supply output voltage 1.20V */
329 #define PWR_SMPS_OUTPUT_VOLTAGE_1V25    (PWR_CR5_SMPSLVL_0)                                        /*!< SMPS step down converter supply output voltage 1.25V */
330 #define PWR_SMPS_OUTPUT_VOLTAGE_1V30    (PWR_CR5_SMPSLVL_1)                                        /*!< SMPS step down converter supply output voltage 1.30V */
331 #define PWR_SMPS_OUTPUT_VOLTAGE_1V35    (PWR_CR5_SMPSLVL_1|PWR_CR5_SMPSLVL_0)                      /*!< SMPS step down converter supply output voltage 1.35V */
332 #define PWR_SMPS_OUTPUT_VOLTAGE_1V40    (PWR_CR5_SMPSLVL_2)                                        /*!< SMPS step down converter supply output voltage 1.40V */
333 #define PWR_SMPS_OUTPUT_VOLTAGE_1V45    (PWR_CR5_SMPSLVL_2|PWR_CR5_SMPSLVL_0)                      /*!< SMPS step down converter supply output voltage 1.45V */
334 #define PWR_SMPS_OUTPUT_VOLTAGE_1V50    (PWR_CR5_SMPSLVL_2|PWR_CR5_SMPSLVL_1)                      /*!< SMPS step down converter supply output voltage 1.50V */
335 #define PWR_SMPS_OUTPUT_VOLTAGE_1V55    (PWR_CR5_SMPSLVL_2|PWR_CR5_SMPSLVL_1|PWR_CR5_SMPSLVL_0)    /*!< SMPS step down converter supply output voltage 1.55V */
336 #define PWR_SMPS_OUTPUT_VOLTAGE_1V60    (PWR_CR5_SMPSLVL_3)                                        /*!< SMPS step down converter supply output voltage 1.60V */
337 #define PWR_SMPS_OUTPUT_VOLTAGE_1V65    (PWR_CR5_SMPSLVL_3|PWR_CR5_SMPSLVL_0)                      /*!< SMPS step down converter supply output voltage 1.65V */
338 #define PWR_SMPS_OUTPUT_VOLTAGE_1V70    (PWR_CR5_SMPSLVL_3|PWR_CR5_SMPSLVL_1)                      /*!< SMPS step down converter supply output voltage 1.70V */
339 #define PWR_SMPS_OUTPUT_VOLTAGE_1V75    (PWR_CR5_SMPSLVL_3|PWR_CR5_SMPSLVL_1|PWR_CR5_SMPSLVL_0)    /*!< SMPS step down converter supply output voltage 1.75V */
340 #define PWR_SMPS_OUTPUT_VOLTAGE_1V80    (PWR_CR5_SMPSLVL_3|PWR_CR5_SMPSLVL_2)                      /*!< SMPS step down converter supply output voltage 1.80V */
341 #define PWR_SMPS_OUTPUT_VOLTAGE_1V85    (PWR_CR5_SMPSLVL_3|PWR_CR5_SMPSLVL_2|PWR_CR5_SMPSLVL_0)    /*!< SMPS step down converter supply output voltage 1.85V */
342 #define PWR_SMPS_OUTPUT_VOLTAGE_1V90    (PWR_CR5_SMPSLVL_3|PWR_CR5_SMPSLVL_2|PWR_CR5_SMPSLVL_1)    /*!< SMPS step down converter supply output voltage 1.90V */
343 #define PWR_SMPS_OUTPUT_VOLTAGE_1V95    (PWR_CR5_SMPSLVL)                                          /*!< SMPS step down converter supply output voltage 1.95V */
344 /**
345   * @}
346   */
347 
348 /** @defgroup PWREx_FLAG_REG PWR status register
349   * @{
350   */
351 #define PWR_FLAG_REG_SR1         (0x20UL)                                                                         /*!< Bitfield to indicate PWR flag located in register PWR_SR1 */
352 #define PWR_FLAG_REG_SR2         (0x40UL)                                                                         /*!< Bitfield to indicate PWR flag located in register PWR_SR2 */
353 #define PWR_FLAG_REG_SR3         (0x60UL)                                                                         /*!< Bitfield to indicate PWR flag located in register PWR_SR3 */
354 #define PWR_FLAG_REG_EXTSRR      (0x80UL)                                                                         /*!< Bitfield to indicate PWR flag located in register PWR_EXTSRR */
355 #define PWR_FLAG_REG_MASK        (PWR_FLAG_REG_SR1 | PWR_FLAG_REG_SR2 | PWR_FLAG_REG_SR3 | PWR_FLAG_REG_EXTSRR)   /*!< Bitfield mask to indicate PWR flag location in PWR register */
356 
357 /**
358   * @}
359   */
360 /**
361   * @}
362   */
363 /* Private define ------------------------------------------------------------*/
364 /* Exported macros -----------------------------------------------------------*/
365 /* Private macros --------------------------------------------------------*/
366 /** @defgroup  PWREx_Private_Macros   PWR Extended Private Macros
367   * @{
368   */
369 
370 #if defined(PWR_CR6_EWU20)
371 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PA15)    ||\
372                                 ((PIN) == PWR_WAKEUP_PA14)    ||\
373                                 ((PIN) == PWR_WAKEUP_PA13)    ||\
374                                 ((PIN) == PWR_WAKEUP_PA12)    ||\
375                                 ((PIN) == PWR_WAKEUP_PA11)    ||\
376                                 ((PIN) == PWR_WAKEUP_PA10)    ||\
377                                 ((PIN) == PWR_WAKEUP_PA9)     ||\
378                                 ((PIN) == PWR_WAKEUP_PA8)     ||\
379                                 ((PIN) == PWR_WAKEUP_PA7)     ||\
380                                 ((PIN) == PWR_WAKEUP_PA6)     ||\
381                                 ((PIN) == PWR_WAKEUP_PA5)     ||\
382                                 ((PIN) == PWR_WAKEUP_PA4)     ||\
383                                 ((PIN) == PWR_WAKEUP_PA3)     ||\
384                                 ((PIN) == PWR_WAKEUP_PA2)     ||\
385                                 ((PIN) == PWR_WAKEUP_PA1)     ||\
386                                 ((PIN) == PWR_WAKEUP_PA0)     ||\
387                                 ((PIN) == PWR_WAKEUP_PB11)    ||\
388                                 ((PIN) == PWR_WAKEUP_PB10)    ||\
389                                 ((PIN) == PWR_WAKEUP_PB9)     ||\
390                                 ((PIN) == PWR_WAKEUP_PB8)     ||\
391                                 ((PIN) == PWR_WAKEUP_PB7)     ||\
392                                 ((PIN) == PWR_WAKEUP_PB6)     ||\
393                                 ((PIN) == PWR_WAKEUP_PB5)     ||\
394                                 ((PIN) == PWR_WAKEUP_PB4)     ||\
395                                 ((PIN) == PWR_WAKEUP_PB3)     ||\
396                                 ((PIN) == PWR_WAKEUP_PB2)     ||\
397                                 ((PIN) == PWR_WAKEUP_PB1)     ||\
398                                 ((PIN) == PWR_WAKEUP_PB0)     ||\
399                                 ((PIN) == PWR_WAKEUP_CR3_ALL) ||\
400                                 ((PIN) == PWR_WAKEUP_CR6_ALL) ||\
401                                 ((PIN) == PWR_WAKEUP_ALL))
402 #else
403 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PA11)    ||\
404                                 ((PIN) == PWR_WAKEUP_PA10)    ||\
405                                 ((PIN) == PWR_WAKEUP_PA9)     ||\
406                                 ((PIN) == PWR_WAKEUP_PA8)     ||\
407                                 ((PIN) == PWR_WAKEUP_PA3)     ||\
408                                 ((PIN) == PWR_WAKEUP_PA2)     ||\
409                                 ((PIN) == PWR_WAKEUP_PA1)     ||\
410                                 ((PIN) == PWR_WAKEUP_PA0)     ||\
411                                 ((PIN) == PWR_WAKEUP_PB15)    ||\
412                                 ((PIN) == PWR_WAKEUP_PB14)    ||\
413                                 ((PIN) == PWR_WAKEUP_PB13)    ||\
414                                 ((PIN) == PWR_WAKEUP_PB12)    ||\
415                                 ((PIN) == PWR_WAKEUP_PB7)     ||\
416                                 ((PIN) == PWR_WAKEUP_PB6)     ||\
417                                 ((PIN) == PWR_WAKEUP_PB5)     ||\
418                                 ((PIN) == PWR_WAKEUP_PB4)     ||\
419                                 ((PIN) == PWR_WAKEUP_PB3)     ||\
420                                 ((PIN) == PWR_WAKEUP_PB2)     ||\
421                                 ((PIN) == PWR_WAKEUP_PB1)     ||\
422                                 ((PIN) == PWR_WAKEUP_PB0)     ||\
423                                 ((PIN) == PWR_WAKEUP_CR3_ALL) ||\
424                                 ((PIN) == PWR_WAKEUP_CR6_ALL) ||\
425                                 ((PIN) == PWR_WAKEUP_ALL))
426 
427 #endif /* PWR_CR6_EWU20 */
428 
429 #define IS_PWR_WAKEUP_PIN_POLARITY(POLARITY)  (((POLARITY) == PWR_WUP_RISIEDG) ||\
430                                                ((POLARITY) == PWR_WUP_FALLEDG))
431 
432 /* Check wake up pin pull configuration parameter */
433 #define IS_PWR_WAKEUP_PIN_PULL(PULL) (((PULL) == PWR_PIN_NO_PULL)    ||\
434                                       ((PULL) == PWR_PIN_PULL_UP)    ||\
435                                       ((PULL) == PWR_PIN_PULL_DOWN))
436 
437 #define IS_PWR_GPIO_BIT_NUMBER(BIT_NUMBER) (((BIT_NUMBER) & GPIO_PIN_MASK) != (uint32_t)0x00)
438 
439 #define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\
440                            ((GPIO) == PWR_GPIO_B))
441 
442 #define IS_PWR_SMPS_MODE(SMPS_MODE) (((SMPS_MODE) == PWR_SMPS_ON       )    ||\
443                                      ((SMPS_MODE) == PWR_SMPS_OFF      )    ||\
444                                      ((SMPS_MODE) == PWR_SMPS_PRECHARGE))
445 
446 #define IS_PWR_SMPS_OUTPUT_VOLTAGE(SMPS_OUTPUT_VOLTAGE) (((SMPS_OUTPUT_VOLTAGE) == PWR_SMPS_OUTPUT_VOLTAGE_1V20) ||\
447                                                          ((SMPS_OUTPUT_VOLTAGE) == PWR_SMPS_OUTPUT_VOLTAGE_1V25) ||\
448                                                          ((SMPS_OUTPUT_VOLTAGE) == PWR_SMPS_OUTPUT_VOLTAGE_1V30) ||\
449                                                          ((SMPS_OUTPUT_VOLTAGE) == PWR_SMPS_OUTPUT_VOLTAGE_1V35) ||\
450                                                          ((SMPS_OUTPUT_VOLTAGE) == PWR_SMPS_OUTPUT_VOLTAGE_1V40) ||\
451                                                          ((SMPS_OUTPUT_VOLTAGE) == PWR_SMPS_OUTPUT_VOLTAGE_1V45) ||\
452                                                          ((SMPS_OUTPUT_VOLTAGE) == PWR_SMPS_OUTPUT_VOLTAGE_1V50) ||\
453                                                          ((SMPS_OUTPUT_VOLTAGE) == PWR_SMPS_OUTPUT_VOLTAGE_1V55) ||\
454                                                          ((SMPS_OUTPUT_VOLTAGE) == PWR_SMPS_OUTPUT_VOLTAGE_1V60) ||\
455                                                          ((SMPS_OUTPUT_VOLTAGE) == PWR_SMPS_OUTPUT_VOLTAGE_1V65) ||\
456                                                          ((SMPS_OUTPUT_VOLTAGE) == PWR_SMPS_OUTPUT_VOLTAGE_1V70) ||\
457                                                          ((SMPS_OUTPUT_VOLTAGE) == PWR_SMPS_OUTPUT_VOLTAGE_1V75) ||\
458                                                          ((SMPS_OUTPUT_VOLTAGE) == PWR_SMPS_OUTPUT_VOLTAGE_1V80) ||\
459                                                          ((SMPS_OUTPUT_VOLTAGE) == PWR_SMPS_OUTPUT_VOLTAGE_1V85) ||\
460                                                          ((SMPS_OUTPUT_VOLTAGE) == PWR_SMPS_OUTPUT_VOLTAGE_1V90) ||\
461                                                          ((SMPS_OUTPUT_VOLTAGE) == PWR_SMPS_OUTPUT_VOLTAGE_1V95))
462 
463 #define IS_PWR_SMPS_BOM(BOM) (((BOM) == PWR_SMPS_BOM1)      ||\
464                               ((BOM) == PWR_SMPS_BOM2)      ||\
465                               ((BOM) == PWR_SMPS_BOM3))
466 
467 /**
468   * @}
469   */
470 
471 /** @addtogroup PWREx_Exported_Functions
472   * @{
473   */
474 /* Peripheral Control functions  **********************************************/
475 void              HAL_PWREx_EnableInternalWakeUpLine(void);
476 void              HAL_PWREx_DisableInternalWakeUpLine(void);
477 void              HAL_PWREx_EnableInternalWakeUpLineLpuart(void);
478 void              HAL_PWREx_DisableInternalWakeUpLineLpuart(void);
479 
480 
481 void              HAL_PWREx_EnableBleHostCpuWakeUp(void);
482 void              HAL_PWREx_DisableBleHostCpuWakeUp(void);
483 void              HAL_PWREx_EnableBleWakeUp(void);
484 void              HAL_PWREx_DisableBleWakeUp(void);
485 
486 HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber);
487 HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber);
488 HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber);
489 HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber);
490 void              HAL_PWREx_EnablePullUpPullDownConfig(void);
491 void              HAL_PWREx_DisablePullUpPullDownConfig(void);
492 
493 void              HAL_PWREx_EnableSRAMRetention(uint32_t banks);
494 void              HAL_PWREx_DisableSRAMRetention(uint32_t banks);
495 
496 void              HAL_PWREx_EnableGPIORetention(void);
497 void              HAL_PWREx_DisableGPIORetention(void);
498 
499 void              HAL_PWREx_EnableDBGRetention(void);
500 void              HAL_PWREx_DisableDBGRetention(void);
501 
502 HAL_StatusTypeDef HAL_PWREx_ConfigSMPS(uint32_t OutputVoltage, uint32_t BOM);
503 void              HAL_PWREx_SMPS_SetMode(uint32_t OperatingMode);
504 uint32_t          HAL_PWREx_SMPS_GetMode(void);
505 
506 /* Low Power modes configuration functions ************************************/
507 void              HAL_PWREx_EnterSHUTDOWNMode(void);
508 
509 /**
510   * @}
511   */
512 
513 /**
514   * @}
515   */
516 
517 /**
518   * @}
519   */
520 
521 /**
522   * @}
523   */
524 
525 #ifdef __cplusplus
526 }
527 #endif
528 
529 
530 #endif /* STM32WB0x_HAL_PWR_EX_H */
531