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Searched defs:PUF_ORR_RESULT_CODE_MASK (Results 1 – 18 of 18) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h35887 #define PUF_ORR_RESULT_CODE_MASK (0xFFU) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h45682 #define PUF_ORR_RESULT_CODE_MASK (0xFFU) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h45652 #define PUF_ORR_RESULT_CODE_MASK (0xFFU) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h57281 #define PUF_ORR_RESULT_CODE_MASK (0xFFU) macro
DMCXN546_cm33_core1.h57281 #define PUF_ORR_RESULT_CODE_MASK (0xFFU) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h57281 #define PUF_ORR_RESULT_CODE_MASK (0xFFU) macro
DMCXN547_cm33_core1.h57281 #define PUF_ORR_RESULT_CODE_MASK (0xFFU) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi4.h59518 #define PUF_ORR_RESULT_CODE_MASK (0xFFU) macro
DMIMXRT798S_cm33_core0.h59603 #define PUF_ORR_RESULT_CODE_MASK (0xFFU) macro
DMIMXRT798S_ezhv.h59485 #define PUF_ORR_RESULT_CODE_MASK (0xFFU) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_ezhv.h56316 #define PUF_ORR_RESULT_CODE_MASK (0xFFU) macro
DMIMXRT735S_cm33_core0.h56378 #define PUF_ORR_RESULT_CODE_MASK (0xFFU) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core0.h59603 #define PUF_ORR_RESULT_CODE_MASK (0xFFU) macro
DMIMXRT758S_ezhv.h59461 #define PUF_ORR_RESULT_CODE_MASK (0xFFU) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h58016 #define PUF_ORR_RESULT_CODE_MASK (0xFFU) macro
DMCXN947_cm33_core0.h58016 #define PUF_ORR_RESULT_CODE_MASK (0xFFU) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h58016 #define PUF_ORR_RESULT_CODE_MASK (0xFFU) macro
DMCXN946_cm33_core1.h58016 #define PUF_ORR_RESULT_CODE_MASK (0xFFU) macro