1 /* --COPYRIGHT--,BSD
2 * Copyright (c) 2017, Texas Instruments Incorporated
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 *
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * --/COPYRIGHT--*/
32 /* Standard Includes */
33 #include <stdint.h>
34
35 /* DriverLib Includes */
36 #include <ti/devices/msp432p4xx/driverlib/pss.h>
37 #include <ti/devices/msp432p4xx/driverlib/interrupt.h>
38 #include <ti/devices/msp432p4xx/driverlib/debug.h>
39 #include <ti/devices/msp432p4xx/driverlib/cpu.h>
40
__PSSUnlock()41 static void __PSSUnlock()
42 {
43 PSS->KEY = PSS_KEY_VALUE;
44 }
45
__PSSLock()46 static void __PSSLock()
47 {
48 PSS->KEY = 0;
49 }
50
51
PSS_enableForcedDCDCOperation(void)52 void PSS_enableForcedDCDCOperation(void)
53 {
54 __PSSUnlock();
55
56 BITBAND_PERI(PSS->CTL0, PSS_CTL0_DCDC_FORCE_OFS) = 1;
57
58 __PSSLock();
59 }
60
PSS_disableForcedDCDCOperation(void)61 void PSS_disableForcedDCDCOperation(void)
62 {
63 __PSSUnlock();
64
65 BITBAND_PERI(PSS->CTL0, PSS_CTL0_DCDC_FORCE_OFS) = 0;
66
67 __PSSLock();
68
69 }
70
PSS_enableHighSidePinToggle(bool activeLow)71 void PSS_enableHighSidePinToggle(bool activeLow)
72 {
73 __PSSUnlock();
74
75 if (activeLow)
76 PSS->CTL0 |= (PSS_CTL0_SVMHOE | PSS_CTL0_SVMHOUTPOLAL);
77 else
78 {
79 BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVMHOUTPOLAL_OFS) = 0;
80 BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVMHOE_OFS) = 1;
81 }
82
83 __PSSLock();
84 }
85
PSS_disableHighSidePinToggle(void)86 void PSS_disableHighSidePinToggle(void)
87 {
88 __PSSUnlock();
89
90 BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVMHOE_OFS) = 0;
91
92 __PSSLock();
93 }
94
PSS_enableHighSide(void)95 void PSS_enableHighSide(void)
96 {
97 __PSSUnlock();
98
99 BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVSMHOFF_OFS) = 0;
100
101 __PSSLock();
102 }
103
PSS_disableHighSide(void)104 void PSS_disableHighSide(void)
105 {
106 __PSSUnlock();
107
108 BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVSMHOFF_OFS) = 1;
109
110 __PSSLock();
111 }
112
PSS_setHighSidePerformanceMode(uint_fast8_t powerMode)113 void PSS_setHighSidePerformanceMode(uint_fast8_t powerMode)
114 {
115 __PSSUnlock();
116
117 if (powerMode == PSS_FULL_PERFORMANCE_MODE)
118 BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVSMHLP_OFS) = 0;
119 else
120 BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVSMHLP_OFS) = 1;
121
122 __PSSLock();
123 }
124
PSS_getHighSidePerformanceMode(void)125 uint_fast8_t PSS_getHighSidePerformanceMode(void)
126 {
127 if (BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVSMHLP_OFS))
128 return PSS_NORMAL_PERFORMANCE_MODE;
129 else
130 return PSS_FULL_PERFORMANCE_MODE;
131 }
132
PSS_enableHighSideMonitor(void)133 void PSS_enableHighSideMonitor(void)
134 {
135 __PSSUnlock();
136
137 BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVSMHS_OFS) = 1;
138
139 __PSSLock();
140 }
141
PSS_disableHighSideMonitor(void)142 void PSS_disableHighSideMonitor(void)
143 {
144 __PSSUnlock();
145
146 BITBAND_PERI(PSS->CTL0, PSS_CTL0_SVSMHS_OFS) = 0;
147
148 __PSSLock();
149 }
150
PSS_setHighSideVoltageTrigger(uint_fast8_t triggerVoltage)151 void PSS_setHighSideVoltageTrigger(uint_fast8_t triggerVoltage)
152 {
153 __PSSUnlock();
154
155 ASSERT(!(triggerVoltage & 0xF8))
156
157 PSS->CTL0 &= ~PSS_CTL0_SVSMHTH_MASK;
158 PSS->CTL0 |= (triggerVoltage & 0x07) << PSS_CTL0_SVSMHTH_OFS;
159
160 __PSSLock();
161 }
162
PSS_getHighSideVoltageTrigger(void)163 uint_fast8_t PSS_getHighSideVoltageTrigger(void)
164 {
165 return (uint_fast8_t)((PSS->CTL0 & PSS_CTL0_SVSMHTH_MASK)
166 >> PSS_CTL0_SVSMHTH_OFS);
167 }
168
PSS_enableInterrupt(void)169 void PSS_enableInterrupt(void)
170 {
171 __PSSUnlock();
172 BITBAND_PERI(PSS->IE,PSS_IE_SVSMHIE_OFS) = 1;
173 __PSSLock();
174 }
175
PSS_disableInterrupt(void)176 void PSS_disableInterrupt(void)
177 {
178 __PSSUnlock();
179 BITBAND_PERI(PSS->IE,PSS_IE_SVSMHIE_OFS) = 0;
180 __PSSLock();
181 }
182
PSS_getInterruptStatus(void)183 uint32_t PSS_getInterruptStatus(void)
184 {
185 return PSS->IFG;
186 }
187
PSS_clearInterruptFlag(void)188 void PSS_clearInterruptFlag(void)
189 {
190 __PSSUnlock();
191 BITBAND_PERI(PSS->CLRIFG,PSS_CLRIFG_CLRSVSMHIFG_OFS) = 0;
192 __PSSLock();
193 }
194
PSS_registerInterrupt(void (* intHandler)(void))195 void PSS_registerInterrupt(void (*intHandler)(void))
196 {
197 //
198 // Register the interrupt handler, returning an error if an error occurs.
199 //
200 Interrupt_registerInterrupt(INT_PSS, intHandler);
201
202 //
203 // Enable the system control interrupt.
204 //
205 Interrupt_enableInterrupt(INT_PSS);
206 }
207
PSS_unregisterInterrupt(void)208 void PSS_unregisterInterrupt(void)
209 {
210 //
211 // Disable the interrupt.
212 //
213 Interrupt_disableInterrupt(INT_PSS);
214
215 //
216 // Unregister the interrupt handler.
217 //
218 Interrupt_unregisterInterrupt(INT_PSS);
219 }
220