| /hal_nxp-3.6.0/s32/drivers/s32ze/BaseNXP/header/ |
| D | S32Z2_LMEM64.h | 79 …__IO uint32_t PSCLCR; /**< PS bus Cache line control register, offset: … member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK80F25615/ |
| D | MK80F25615.h | 14780 …__IO uint32_t PSCLCR; /**< Cache line control register, offset: 0x804 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK82F25615/ |
| D | MK82F25615.h | 14774 …__IO uint32_t PSCLCR; /**< Cache line control register, offset: 0x804 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK27FA15/ |
| D | MK27FA15.h | 14219 …__IO uint32_t PSCLCR; /**< Cache line control register, offset: 0x804 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MK28FA15/ |
| D | MK28FA15.h | 14221 …__IO uint32_t PSCLCR; /**< Cache line control register, offset: 0x804 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MD6/ |
| D | MIMX8MD6_cm4.h | 38387 …__IO uint32_t PSCLCR; /**< Cache line control register, offset: 0x804 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MD7/ |
| D | MIMX8MD7_cm4.h | 38387 …__IO uint32_t PSCLCR; /**< Cache line control register, offset: 0x804 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MQ5/ |
| D | MIMX8MQ5_cm4.h | 38387 …__IO uint32_t PSCLCR; /**< Cache line control register, offset: 0x804 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MQ7/ |
| D | MIMX8MQ7_cm4.h | 38387 …__IO uint32_t PSCLCR; /**< Cache line control register, offset: 0x804 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MQ6/ |
| D | MIMX8MQ6_cm4.h | 38387 …__IO uint32_t PSCLCR; /**< Cache line control register, offset: 0x804 */ member
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| /hal_nxp-3.6.0/imx/devices/MCIMX6X/ |
| D | MCIMX6X_M4.h | 25440 …__IO uint32_t PSCLCR; /**< Cache line control register, offset: 0… member
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| /hal_nxp-3.6.0/imx/devices/MCIMX7D/ |
| D | MCIMX7D_M4.h | 29486 …__IO uint32_t PSCLCR; /**< Cache line control register, offset: 0… member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1165/ |
| D | MIMXRT1165_cm4.h | 54655 …__IO uint32_t PSCLCR; /**< PS bus Cache line control register, offset: … member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM6/ |
| D | MIMX8MM6_cm4.h | 40536 …__IO uint32_t PSCLCR; /**< Cache line control register, offset: 0x804 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM5/ |
| D | MIMX8MM5_cm4.h | 40536 …__IO uint32_t PSCLCR; /**< Cache line control register, offset: 0x804 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1166/ |
| D | MIMXRT1166_cm4.h | 58565 …__IO uint32_t PSCLCR; /**< PS bus Cache line control register, offset: … member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM1/ |
| D | MIMX8MM1_cm4.h | 40536 …__IO uint32_t PSCLCR; /**< Cache line control register, offset: 0x804 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM2/ |
| D | MIMX8MM2_cm4.h | 40536 …__IO uint32_t PSCLCR; /**< Cache line control register, offset: 0x804 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM3/ |
| D | MIMX8MM3_cm4.h | 40536 …__IO uint32_t PSCLCR; /**< Cache line control register, offset: 0x804 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM4/ |
| D | MIMX8MM4_cm4.h | 40536 …__IO uint32_t PSCLCR; /**< Cache line control register, offset: 0x804 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1175/ |
| D | MIMXRT1175_cm4.h | 65839 …__IO uint32_t PSCLCR; /**< PS bus Cache line control register, offset: … member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1173/ |
| D | MIMXRT1173_cm4.h | 69746 …__IO uint32_t PSCLCR; /**< PS bus Cache line control register, offset: … member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1176/ |
| D | MIMXRT1176_cm4.h | 69749 …__IO uint32_t PSCLCR; /**< PS bus Cache line control register, offset: … member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8DX1/ |
| D | MIMX8DX1_cm4.h | 72137 …__IO uint32_t PSCLCR; /**< Cache line control register, offset: 0x804 */ member
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| /hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8QX1/ |
| D | MIMX8QX1_cm4.h | 72138 …__IO uint32_t PSCLCR; /**< Cache line control register, offset: 0x804 */ member
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