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Searched defs:PRS_VDAC0_OPA1 (Results 1 – 25 of 69) sorted by relevance

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/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_prs_signals.h117 #define PRS_VDAC0_OPA1 ((24 << 8) + 3) /**< PRS OPA1 warmedup or outputvalid based on … macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_prs_signals.h117 #define PRS_VDAC0_OPA1 ((24 << 8) + 3) /**< PRS OPA1 warmedup or outputvalid based on … macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_prs_signals.h120 #define PRS_VDAC0_OPA1 ((24 << 8) + 3) /**< PRS OPA1 warmedup or outputvalid based on … macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_prs_signals.h120 #define PRS_VDAC0_OPA1 ((24 << 8) + 3) /**< PRS OPA1 warmedup or outputvalid based on … macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_prs_signals.h120 #define PRS_VDAC0_OPA1 ((24 << 8) + 3) /**< PRS OPA1 warmedup or outputvalid based on … macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_prs_signals.h114 #define PRS_VDAC0_OPA1 ((23 << 8) + 3) /**< PRS OPA1 warmed up. output is valid. */ macro
Defm32gg12b110f1024iq64.h932 #define PRS_VDAC0_OPA1 ((23 << 8) + 3) /**< PRS OPA1 warmed up. output is valid. */ macro
Defm32gg12b130f512gm64.h932 #define PRS_VDAC0_OPA1 ((23 << 8) + 3) /**< PRS OPA1 warmed up. output is valid. */ macro
Defm32gg12b130f512gq64.h932 #define PRS_VDAC0_OPA1 ((23 << 8) + 3) /**< PRS OPA1 warmed up. output is valid. */ macro
Defm32gg12b130f512im64.h932 #define PRS_VDAC0_OPA1 ((23 << 8) + 3) /**< PRS OPA1 warmed up. output is valid. */ macro
Defm32gg12b130f512iq64.h932 #define PRS_VDAC0_OPA1 ((23 << 8) + 3) /**< PRS OPA1 warmed up. output is valid. */ macro
Defm32gg12b110f1024gm64.h932 #define PRS_VDAC0_OPA1 ((23 << 8) + 3) /**< PRS OPA1 warmed up. output is valid. */ macro
Defm32gg12b110f1024gq64.h932 #define PRS_VDAC0_OPA1 ((23 << 8) + 3) /**< PRS OPA1 warmed up. output is valid. */ macro
Defm32gg12b110f1024im64.h932 #define PRS_VDAC0_OPA1 ((23 << 8) + 3) /**< PRS OPA1 warmed up. output is valid. */ macro
Defm32gg12b390f1024gl112.h899 #define PRS_VDAC0_OPA1 ((23 << 8) + 3) /**< PRS OPA1 warmed up. output is valid. */ macro
Defm32gg12b390f512gl112.h899 #define PRS_VDAC0_OPA1 ((23 << 8) + 3) /**< PRS OPA1 warmed up. output is valid. */ macro
Defm32gg12b510f1024gl120.h940 #define PRS_VDAC0_OPA1 ((23 << 8) + 3) /**< PRS OPA1 warmed up. output is valid. */ macro
Defm32gg12b510f1024gm64.h940 #define PRS_VDAC0_OPA1 ((23 << 8) + 3) /**< PRS OPA1 warmed up. output is valid. */ macro
Defm32gg12b510f1024gl112.h940 #define PRS_VDAC0_OPA1 ((23 << 8) + 3) /**< PRS OPA1 warmed up. output is valid. */ macro
Defm32gg12b530f512im64.h940 #define PRS_VDAC0_OPA1 ((23 << 8) + 3) /**< PRS OPA1 warmed up. output is valid. */ macro
Defm32gg12b530f512iq64.h940 #define PRS_VDAC0_OPA1 ((23 << 8) + 3) /**< PRS OPA1 warmed up. output is valid. */ macro
/hal_silabs-3.5.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_prs_signals.h122 #define PRS_VDAC0_OPA1 ((23 << 8) + 3) /**< PRS OPA1 warmed up. output is valid. */ macro
Defm32gg11b120f2048im64.h956 #define PRS_VDAC0_OPA1 ((23 << 8) + 3) /**< PRS OPA1 warmed up. output is valid. */ macro
Defm32gg11b110f2048gm64.h956 #define PRS_VDAC0_OPA1 ((23 << 8) + 3) /**< PRS OPA1 warmed up. output is valid. */ macro
Defm32gg11b110f2048gq64.h956 #define PRS_VDAC0_OPA1 ((23 << 8) + 3) /**< PRS OPA1 warmed up. output is valid. */ macro

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