1 /* 2 * Copyright 2021 NXP 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 #ifndef _FSL_PM_CONFIG_H_ 8 #define _FSL_PM_CONFIG_H_ 9 10 #include "fsl_pm_device_config.h" 11 12 #ifndef FSL_PM_SUPPORT_NOTIFICATION 13 #define FSL_PM_SUPPORT_NOTIFICATION (0) 14 #endif /* FSL_PM_SUPPORT_NOTIFICATION */ 15 16 #ifndef FSL_PM_SUPPORT_WAKEUP_SOURCE_MANAGER 17 #define FSL_PM_SUPPORT_WAKEUP_SOURCE_MANAGER (0) 18 #endif /* FSL_PM_SUPPORT_WAKEUP_SOURCE_MANAGER */ 19 20 #ifndef FSL_PM_SUPPORT_LP_TIMER_CONTROLLER 21 #define FSL_PM_SUPPORT_LP_TIMER_CONTROLLER (0) 22 #endif /* FSL_PM_SUPPORT_LP_TIMER_CONTROLLER */ 23 24 /*! 25 * @brief If defined FSL_PM_SUPPORT_ALWAYS_ON_SECTION and set the macro to 1, then some critical 26 * data of the power manager will be placed into the RAM section that is always powered on. 27 * If this macro is not defined or this macro is set as 0, then upper software should use some 28 * memory related constraint to guarantee some critical data of the system are retained in the selected power mode. 29 */ 30 #ifndef FSL_PM_SUPPORT_ALWAYS_ON_SECTION 31 #define FSL_PM_SUPPORT_ALWAYS_ON_SECTION (0) 32 #endif /* FSL_PM_SUPPORT_ALWAYS_ON_SECTION */ 33 34 #ifndef PM_CONSTRAINT_COUNT 35 #define PM_CONSTRAINT_COUNT (0U) 36 #endif /* PM_CONSTRAINT_COUNT */ 37 38 #ifndef PM_LP_STATE_COUNT 39 #define PM_LP_STATE_COUNT (0U) 40 #endif 41 42 #ifndef PM_RESC_GROUP_ARRAY_SIZE 43 #define PM_RESC_GROUP_ARRAY_SIZE ((PM_CONSTRAINT_COUNT) / 8U + 1U) 44 #endif /* PM_RESC_GROUP_ARRAY_SIZE */ 45 46 #ifndef PM_RESC_MASK_ARRAY_SIZE 47 #define PM_RESC_MASK_ARRAY_SIZE ((PM_CONSTRAINT_COUNT) / 32U + 1U) 48 #endif /* PM_RESC_MASK_ARRAY_SIZE */ 49 50 #define PM_RESOURCE_OFF (0U) 51 #define PM_RESOURCE_PARTABLE_ON1 (1U) 52 #define PM_RESOURCE_PARTABLE_ON2 (2U) 53 #define PM_RESOURCE_FULL_ON (4U) 54 55 /* The whole counter for constraint is allocated as 8-bits width. */ 56 #define PM_PARTABLE_ON1_COUNTER_SIZE (3U) 57 #define PM_PARTABLE_ON1_COUNTER_MASK (0x7U) 58 #define PM_PARTABLE_ON2_COUNTER_SIZE (3U) 59 #define PM_PARTABLE_ON2_COUNTER_MASK (0x38U) 60 #define PM_FULL_ON_COUNTER_SIZE (2U) 61 #define PM_FULL_ON_COUNTER_MASK (0xC0U) 62 63 #ifndef PM_ENCODE_RESC 64 #define PM_ENCODE_RESC(opMode, rescShift) ((((uint32_t)(opMode)) << 8UL) | (rescShift)) 65 #endif /* PM_ENCODE_RESC */ 66 67 #ifndef PM_DECODE_RESC 68 #define PM_DECODE_RESC(resConstraint) \ 69 opMode = (uint32_t)(((uint32_t)resConstraint) >> 8UL); \ 70 rescShift = (uint32_t)(((uint32_t)resConstraint) & 0xFFUL) 71 #endif /* PM_DECODE_RESC */ 72 73 #ifndef PM_ENCODE_WAKEUP_SOURCE_ID 74 #define PM_ENCODE_WAKEUP_SOURCE_ID(id) (id) 75 #endif /* PM_ENCODE_WAKEUP_SOURCE_ID */ 76 77 #ifndef PM_DECODE_WAKEUP_SOURCE_ID 78 #define PM_DECODE_WAKEUP_SOURCE_ID(wsId) (wsId) 79 #endif /* PM_DECODE_WAKEUP_SOURCE_ID */ 80 81 #endif /* _FSL_PM_CONFIG_H_ */ 82
