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Searched defs:PMU_REG_3P0_OUTPUT_TRG_MASK (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h22720 #define PMU_REG_3P0_OUTPUT_TRG_MASK (0x1F00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h25330 #define PMU_REG_3P0_OUTPUT_TRG_MASK (0x1F00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h29373 #define PMU_REG_3P0_OUTPUT_TRG_MASK (0x1F00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h29394 #define PMU_REG_3P0_OUTPUT_TRG_MASK (0x1F00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h30445 #define PMU_REG_3P0_OUTPUT_TRG_MASK (0x1F00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h31842 #define PMU_REG_3P0_OUTPUT_TRG_MASK (0x1F00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h33152 #define PMU_REG_3P0_OUTPUT_TRG_MASK (0x1F00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h33693 #define PMU_REG_3P0_OUTPUT_TRG_MASK (0x1F00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h32584 #define PMU_REG_3P0_OUTPUT_TRG_MASK (0x1F00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h35226 #define PMU_REG_3P0_OUTPUT_TRG_MASK (0x1F00U) macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h35219 #define PMU_REG_3P0_OUTPUT_TRG_MASK (0x1F00U) macro
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h28674 #define PMU_REG_3P0_OUTPUT_TRG_MASK 0x1F00u macro