1 /***************************************************************************/ /** 2 * @file rsi_wisemcu_hardware_setup.h 3 ******************************************************************************* 4 * # License 5 * <b>Copyright 2024 Silicon Laboratories Inc. www.silabs.com</b> 6 ******************************************************************************* 7 * 8 * SPDX-License-Identifier: Zlib 9 * 10 * The licensor of this software is Silicon Laboratories Inc. 11 * 12 * This software is provided 'as-is', without any express or implied 13 * warranty. In no event will the authors be held liable for any damages 14 * arising from the use of this software. 15 * 16 * Permission is granted to anyone to use this software for any purpose, 17 * including commercial applications, and to alter it and redistribute it 18 * freely, subject to the following restrictions: 19 * 20 * 1. The origin of this software must not be misrepresented; you must not 21 * claim that you wrote the original software. If you use this software 22 * in a product, an acknowledgment in the product documentation would be 23 * appreciated but is not required. 24 * 2. Altered source versions must be plainly marked as such, and must not be 25 * misrepresented as being the original software. 26 * 3. This notice may not be removed or altered from any source distribution. 27 * 28 ******************************************************************************/ 29 30 #ifndef __RSI_HW_SETUP_H__ 31 #define __RSI_HW_SETUP_H__ 32 /*Includes*/ 33 34 // 35 #include "rsi_power_save.h" 36 #include "base_types.h" 37 38 /*Configure the PMU and XTAL good times */ 39 #define PMU_GOOD_TIME 0x34 /* 900 us*/ 40 #define XTAL_GOOD_TIME 31 /*Duration in us*/ 41 42 #ifdef SLI_SI91X_MCU_COMMON_FLASH_MODE 43 #define NWPAON_MEM_HOST_ACCESS_CTRL_SET_1 (*(volatile uint32_t *)(0x41300000 + 0x0)) 44 #define NWPAON_MEM_HOST_ACCESS_CTRL_CLEAR_1 (*(volatile uint32_t *)(0x41300000 + 0x4)) 45 #define M4SS_TASS_CTRL_SET_REG (*(volatile uint32_t *)(0x24048400 + 0x34)) 46 #define M4SS_TASS_CTRL_CLR_REG (*(volatile uint32_t *)(0x24048400 + 0x38)) 47 #define M4SS_REF_CLK_MUX_CTRL BIT(24) 48 #define TASS_REF_CLK_MUX_CTRL BIT(25) 49 #define M4SS_CTRL_TASS_AON_PWR_DMN_RST_BYPASS BIT(2) 50 #endif 51 52 #ifdef CHIP_9118 53 /*Macro to be used for configuring the 'rams_in_use' parameter in 'sl_si91x_configure_ram_retention()' function*/ 54 #define WISEMCU_0KB_RAM_IN_USE \ 55 (RAM_BANK_0 | RAM_BANK_1 | RAM_BANK_2 | RAM_BANK_3 | RAM_BANK_4 | RAM_BANK_5 | RAM_BANK_6 | RAM_BANK_7 | RAM_BANK_8 \ 56 | RAM_BANK_9 | RAM_BANK_10 | RAM_BANK_11 | RAM_BANK_12 | RAM_BANK_13) 57 #define WISEMCU_16KB_RAM_IN_USE \ 58 (RAM_BANK_0 | RAM_BANK_1 | RAM_BANK_2 | RAM_BANK_7 | RAM_BANK_8 | RAM_BANK_9 | RAM_BANK_10 | RAM_BANK_11 \ 59 | RAM_BANK_12 | RAM_BANK_13) 60 #define WISEMCU_48KB_RAM_IN_USE \ 61 (RAM_BANK_0 | RAM_BANK_1 | RAM_BANK_2 | RAM_BANK_8 | RAM_BANK_9 | RAM_BANK_10 | RAM_BANK_11 | RAM_BANK_12 \ 62 | RAM_BANK_13) 63 #define WISEMCU_112KB_RAM_IN_USE \ 64 (RAM_BANK_0 | RAM_BANK_1 | RAM_BANK_2 | RAM_BANK_9 | RAM_BANK_10 | RAM_BANK_11 | RAM_BANK_12 | RAM_BANK_13) 65 #define WISEMCU_128KB_RAM_IN_USE \ 66 (RAM_BANK_0 | RAM_BANK_1 | RAM_BANK_2 | RAM_BANK_10 | RAM_BANK_11 | RAM_BANK_12 | RAM_BANK_13) 67 #define WISEMCU_144KB_RAM_IN_USE (RAM_BANK_1 | RAM_BANK_2 | RAM_BANK_10 | RAM_BANK_11 | RAM_BANK_12 | RAM_BANK_13) 68 #define WISEMCU_176KB_RAM_IN_USE (RAM_BANK_2 | RAM_BANK_10 | RAM_BANK_11 | RAM_BANK_12 | RAM_BANK_13) 69 #define WISEMCU_192KB_RAM_IN_USE (RAM_BANK_10 | RAM_BANK_11 | RAM_BANK_12 | RAM_BANK_13) 70 #define WISEMCU_208KB_RAM_IN_USE (RAM_BANK_11 | RAM_BANK_12 | RAM_BANK_13) 71 #define WISEMCU_240KB_RAM_IN_USE (RAM_BANK_12 | RAM_BANK_13) 72 #define WISEMCU_320KB_RAM_IN_USE (RAM_BANK_13) 73 #define WISEMCU_384KB_RAM_IN_USE (0) 74 #endif 75 76 #if defined(SLI_SI917) || defined(SLI_SI915) 77 /*Macro to be used for configuring the 'rams_in_use' parameter in 'sl_si91x_configure_ram_retention()' function*/ 78 #define WISEMCU_0KB_RAM_IN_USE \ 79 (RAM_BANK_0 | RAM_BANK_1 | RAM_BANK_2 | RAM_BANK_3 | RAM_BANK_4 | RAM_BANK_5 | RAM_BANK_6 | RAM_BANK_7 | RAM_BANK_8 \ 80 | RAM_BANK_9) 81 #define WISEMCU_16KB_RAM_IN_USE (RAM_BANK_4 | RAM_BANK_5 | RAM_BANK_6 | RAM_BANK_7 | RAM_BANK_8 | RAM_BANK_9) 82 #define WISEMCU_64KB_RAM_IN_USE (RAM_BANK_6 | RAM_BANK_7 | RAM_BANK_8 | RAM_BANK_9) 83 #define WISEMCU_128KB_RAM_IN_USE (RAM_BANK_7 | RAM_BANK_8 | RAM_BANK_9) 84 #define WISEMCU_192KB_RAM_IN_USE (RAM_BANK_8 | RAM_BANK_9) 85 #define WISEMCU_256KB_RAM_IN_USE (RAM_BANK_9) 86 #define WISEMCU_320KB_RAM_IN_USE (0U) 87 88 /*Macros are used for antenna front switch-end controls */ 89 #define FRONT_END_SWITCH_SEL0 0 90 #define FRONT_END_SWITCH_SEL1 BIT(29) 91 #define FRONT_END_SWITCH_SEL2 BIT(30) 92 #define FRONT_END_SWITCH_SEL3 (BIT(29) | BIT(30)) 93 void RSI_Wireless_GPIO_Frontend_Switch_Controls(void); 94 #endif 95 /*Macro used to define the PTE CRC value of the Firmware 17 Boards*/ 96 #define FIRMWARE_17_PTE_CRC_VALUE 0 97 98 /*Macro to be used for configuring the 'rams_retention_during_sleep' parameter in 'sl_si91x_configure_ram_retention()' function*/ 99 #define WISEMCU_RETAIN_DEFAULT_RAM_DURING_SLEEP (1) 100 #define WISEMCU_RETAIN_16K_RAM_DURING_SLEEP (M4ULP_RAM16K_RETENTION_MODE_EN) 101 #define WISEMCU_RETAIN_128K_RAM_DURING_SLEEP (M4ULP_RAM16K_RETENTION_MODE_EN | M4ULP_RAM_RETENTION_MODE_EN) 102 #define WISEMCU_RETAIN_192K_RAM_DURING_SLEEP \ 103 (M4ULP_RAM16K_RETENTION_MODE_EN | M4ULP_RAM_RETENTION_MODE_EN | M4SS_RAM_RETENTION_MODE_EN) 104 #define WISEMCU_RETAIN_384K_RAM_DURING_SLEEP \ 105 (M4ULP_RAM16K_RETENTION_MODE_EN | M4ULP_RAM_RETENTION_MODE_EN | M4SS_RAM_RETENTION_MODE_EN | TA_RAM_RETENTION_MODE_EN) 106 #define WISEMCU_RETAIN_M4SS_RAM_DURING_SLEEP (M4SS_RAM_RETENTION_MODE_EN) 107 #define WISEMCU_RETAIN_ULPSS_RAM_DURING_SLEEP (ULPSS_RAM_RETENTION_MODE_EN) 108 #define WISEMCU_RETAIN_TASS_RAM_DURING_SLEEP (TA_RAM_RETENTION_MODE_EN) 109 #define WISEMCU_RETAIN_M4ULP_RAM_DURING_SLEEP (M4ULP_RAM_RETENTION_MODE_EN) 110 111 /*Function proto-types*/ 112 void sli_si91x_configure_wireless_frontend_controls(uint32_t switch_sel); 113 void sl_si91x_hardware_setup(void); 114 void sl_si91x_trigger_sleep(SLEEP_TYPE_T sleepType, 115 uint8_t lf_clk_mode, 116 uint32_t stack_address, 117 uint32_t jump_cb_address, 118 uint32_t vector_offset, 119 uint32_t mode); 120 void sl_si91x_configure_ram_retention(uint32_t rams_in_use, uint32_t rams_retention_during_sleep); 121 122 /*End of file not truncated*/ 123 #endif
