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Searched defs:PLL1LOCK (Results 1 – 11 of 11) sorted by relevance

/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8UD3/
DMIMX8UD3_cm33.h5440 …__IO uint32_t PLL1LOCK; /**< PLL LOCK Configuration Register, offset: 0x6… member
DMIMX8UD3_dsp0.h5093 …__IO uint32_t PLL1LOCK; /**< PLL LOCK Configuration Register, offset: 0x6… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8UD7/
DMIMX8UD7_cm33.h5440 …__IO uint32_t PLL1LOCK; /**< PLL LOCK Configuration Register, offset: 0x6… member
DMIMX8UD7_dsp1.h5090 …__IO uint32_t PLL1LOCK; /**< PLL LOCK Configuration Register, offset: 0x6… member
DMIMX8UD7_dsp0.h5093 …__IO uint32_t PLL1LOCK; /**< PLL LOCK Configuration Register, offset: 0x6… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8UD5/
DMIMX8UD5_cm33.h5440 …__IO uint32_t PLL1LOCK; /**< PLL LOCK Configuration Register, offset: 0x6… member
DMIMX8UD5_dsp0.h5093 …__IO uint32_t PLL1LOCK; /**< PLL LOCK Configuration Register, offset: 0x6… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8US3/
DMIMX8US3_cm33.h5440 …__IO uint32_t PLL1LOCK; /**< PLL LOCK Configuration Register, offset: 0x6… member
DMIMX8US3_dsp0.h5093 …__IO uint32_t PLL1LOCK; /**< PLL LOCK Configuration Register, offset: 0x6… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8US5/
DMIMX8US5_cm33.h5440 …__IO uint32_t PLL1LOCK; /**< PLL LOCK Configuration Register, offset: 0x6… member
DMIMX8US5_dsp0.h5093 …__IO uint32_t PLL1LOCK; /**< PLL LOCK Configuration Register, offset: 0x6… member