Searched defs:PLL0CFG (Results 1 – 11 of 11) sorted by relevance
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/ |
| D | MIMX8UD7_dsp1.h | 5076 __IO uint32_t PLL0CFG; /**< PLL0 Register Enable, offset: 0x510 */ member
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| D | MIMX8UD7_dsp0.h | 5159 __IO uint32_t PLL0CFG; /**< PLL0 Register Enable, offset: 0x510 */ member
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| D | MIMX8UD7_cm33.h | 5506 __IO uint32_t PLL0CFG; /**< PLL0 Register Enable, offset: 0x510 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/ |
| D | MIMX8UD3_cm33.h | 5506 __IO uint32_t PLL0CFG; /**< PLL0 Register Enable, offset: 0x510 */ member
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| D | MIMX8UD3_dsp0.h | 5159 __IO uint32_t PLL0CFG; /**< PLL0 Register Enable, offset: 0x510 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD5/ |
| D | MIMX8UD5_cm33.h | 5506 __IO uint32_t PLL0CFG; /**< PLL0 Register Enable, offset: 0x510 */ member
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| D | MIMX8UD5_dsp0.h | 5159 __IO uint32_t PLL0CFG; /**< PLL0 Register Enable, offset: 0x510 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US5/ |
| D | MIMX8US5_dsp0.h | 5159 __IO uint32_t PLL0CFG; /**< PLL0 Register Enable, offset: 0x510 */ member
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| D | MIMX8US5_cm33.h | 5506 __IO uint32_t PLL0CFG; /**< PLL0 Register Enable, offset: 0x510 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US3/ |
| D | MIMX8US3_dsp0.h | 5159 __IO uint32_t PLL0CFG; /**< PLL0 Register Enable, offset: 0x510 */ member
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| D | MIMX8US3_cm33.h | 5506 __IO uint32_t PLL0CFG; /**< PLL0 Register Enable, offset: 0x510 */ member
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