1 /*
2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2023 NXP
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 #include "fsl_pint.h"
9
10 /* Component ID definition, used by tools. */
11 #ifndef FSL_COMPONENT_ID
12 #define FSL_COMPONENT_ID "platform.drivers.pint"
13 #endif
14
15 /*******************************************************************************
16 * Definitions
17 ******************************************************************************/
18
19 #ifndef FSL_FEATURE_PINT_NUMBER_OF_INSTANCE
20 #define FSL_FEATURE_PINT_NUMBER_OF_INSTANCE (1U)
21 #endif
22
23 #if defined(GPIOINT_RSTS_N)
24 #define PINT_RESETS_ARRAY GPIOINT_RSTS_N
25 #elif defined(PINT_RSTS)
26 #define PINT_RESETS_ARRAY PINT_RSTS
27 #elif defined(GPIO_RSTS_N)
28 #define PINT_RESETS_ARRAY GPIO_RSTS_N
29 #endif
30
31 /*******************************************************************************
32 * Variables
33 ******************************************************************************/
34
35 /*! @brief Array to map PINT instance number to base pointer. */
36 static PINT_Type *const s_pintBases[] = PINT_BASE_PTRS;
37
38 #if defined(PINT_RESETS_ARRAY)
39 /*! @brief Reset array */
40 static const reset_ip_name_t s_pintResets[] = PINT_RESETS_ARRAY;
41 #endif
42
43 #if (defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS)
44 /*! @brief Irq number array */
45 static const IRQn_Type s_pintIRQ[FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS +
46 FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS] = PINT_IRQS;
47
48 /*! @brief Callback function array for SECPINT(s). */
49 static pint_cb_t s_secpintCallback[FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS];
50 #else
51 /*! @brief Irq number array */
52 static const IRQn_Type s_pintIRQ[FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS] = PINT_IRQS;
53 #endif /* FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS */
54
55 /*! @brief Callback function array for PINT(s). */
56 static pint_cb_t s_pintCallback[FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS];
57
58 /*******************************************************************************
59 * Code
60 ******************************************************************************/
61 /*!
62 * @brief Returns an instance number given a base address.
63 *
64 * If an invalid base address is passed, debug builds will assert. Release builds will just return
65 * instance number 0.
66 *
67 * @param base The PINT peripheral base address.
68 * @return PINT instance number starting from 0.
69 */
PINT_GetInstance(PINT_Type * base)70 static uint32_t PINT_GetInstance(PINT_Type *base)
71 {
72 uint32_t instance;
73 for (instance = 0; instance < ARRAY_SIZE(s_pintBases); ++instance)
74 {
75 if (MSDK_REG_SECURE_ADDR(s_pintBases[instance]) == MSDK_REG_SECURE_ADDR(base))
76 {
77 break;
78 }
79 }
80
81 assert(instance < ARRAY_SIZE(s_pintBases));
82
83 return instance;
84 }
85
86 /*!
87 * brief Initialize PINT peripheral.
88
89 * This function initializes the PINT peripheral and enables the clock.
90 *
91 * param base Base address of the PINT peripheral.
92 *
93 * retval None.
94 */
PINT_Init(PINT_Type * base)95 void PINT_Init(PINT_Type *base)
96 {
97 uint32_t pmcfg = 0;
98 uint8_t pintcount = 0;
99 uint32_t instance;
100 uint32_t i;
101 assert(base != NULL);
102
103 instance = PINT_GetInstance(base);
104
105 if (instance < FSL_FEATURE_PINT_NUMBER_OF_INSTANCE)
106 {
107 pintcount = FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS;
108 /* Clear PINT callback array */
109 for (i = 0; i < (uint32_t)FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS; i++)
110 {
111 s_pintCallback[i] = NULL;
112 }
113 }
114 else
115 {
116 #if (defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS)
117 pintcount = FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS;
118 /* Clear SECPINT callback array */
119 for (i = 0; i < (uint32_t)FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS; i++)
120 {
121 s_secpintCallback[i] = NULL;
122 }
123 #endif /* FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS */
124 }
125
126 /* Disable all bit slices for pint*/
127 for (i = 0; i < pintcount; i++)
128 {
129 pmcfg = pmcfg | ((uint32_t)kPINT_PatternMatchNever << (PININT_BITSLICE_CFG_START + (i * 3U)));
130 }
131
132 #if defined(FSL_FEATURE_CLOCK_HAS_GPIOINT_CLOCK_SOURCE) && (FSL_FEATURE_CLOCK_HAS_GPIOINT_CLOCK_SOURCE == 1)
133
134 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
135 /* Enable the clock. */
136 CLOCK_EnableClock(kCLOCK_GpioInt);
137 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
138 #if defined(PINT_RESETS_ARRAY)
139 RESET_ReleasePeripheralReset(s_pintResets[instance]);
140 #endif /* PINT_RESETS_ARRAY */
141
142 #elif defined(FSL_FEATURE_CLOCK_HAS_GPIOINT_CLOCK_SOURCE) && (FSL_FEATURE_CLOCK_HAS_GPIOINT_CLOCK_SOURCE == 0)
143
144 if (instance < FSL_FEATURE_PINT_NUMBER_OF_INSTANCE)
145 {
146 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
147 CLOCK_EnableClock(kCLOCK_Gpio0);
148 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
149 }
150 else
151 {
152 #if (defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS)
153 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
154 CLOCK_EnableClock(kCLOCK_Gpio_Sec);
155 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
156 #endif /* FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS */
157 }
158
159 #if defined(PINT_RESETS_ARRAY)
160 RESET_ReleasePeripheralReset(s_pintResets[instance]);
161 #endif /* PINT_RESETS_ARRAY */
162
163 #else
164
165 if (instance < FSL_FEATURE_PINT_NUMBER_OF_INSTANCE)
166 {
167 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
168 CLOCK_EnableClock(kCLOCK_Pint);
169 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
170 }
171 else
172 {
173 /* if need config SECURE PINT device,then enable secure pint interrupt clock */
174 #if (defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS)
175 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
176 CLOCK_EnableClock(kCLOCK_Gpio_Sec_Int);
177 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
178 #endif /* FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS */
179 }
180
181 #if defined(PINT_RESETS_ARRAY)
182 RESET_ReleasePeripheralReset(s_pintResets[instance]);
183 #endif /* PINT_RESETS_ARRAY */
184
185 #endif /* FSL_FEATURE_CLOCK_HAS_GPIOINT_CLOCK_SOURCE */
186
187 /* Disable all pattern match bit slices */
188 base->PMCFG = pmcfg;
189 }
190
191 /*!
192 * brief Configure PINT peripheral pin interrupt.
193
194 * This function configures a given pin interrupt.
195 *
196 * param base Base address of the PINT peripheral.
197 * param intr Pin interrupt.
198 * param enable Selects detection logic.
199 * param callback Callback.
200 *
201 * retval None.
202 */
PINT_PinInterruptConfig(PINT_Type * base,pint_pin_int_t intr,pint_pin_enable_t enable,pint_cb_t callback)203 void PINT_PinInterruptConfig(PINT_Type *base, pint_pin_int_t intr, pint_pin_enable_t enable, pint_cb_t callback)
204 {
205 assert(base != NULL);
206 uint32_t instance = PINT_GetInstance(base);
207
208 /* Clear Rise and Fall flags first */
209 PINT_PinInterruptClrRiseFlag(base, intr);
210 PINT_PinInterruptClrFallFlag(base, intr);
211
212 /* Security PINT uses additional callback array */
213 if (instance < FSL_FEATURE_PINT_NUMBER_OF_INSTANCE)
214 {
215 s_pintCallback[intr] = callback;
216 }
217 else
218 {
219 #if (defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS)
220 s_secpintCallback[intr] = callback;
221 #endif
222 }
223
224 /* select level or edge sensitive */
225 base->ISEL = (base->ISEL & ~(1UL << (uint32_t)intr)) |
226 ((((uint32_t)enable & PINT_PIN_INT_LEVEL) != 0U) ? (1UL << (uint32_t)intr) : 0U);
227
228 /* enable rising or level interrupt */
229 if (((unsigned)enable & (PINT_PIN_INT_LEVEL | PINT_PIN_INT_RISE)) != 0U)
230 {
231 base->SIENR = 1UL << (uint32_t)intr;
232 }
233 else
234 {
235 base->CIENR = 1UL << (uint32_t)intr;
236 }
237
238 /* Enable falling or select high level */
239 if (((unsigned)enable & PINT_PIN_INT_FALL_OR_HIGH_LEVEL) != 0U)
240 {
241 base->SIENF = 1UL << (uint32_t)intr;
242 }
243 else
244 {
245 base->CIENF = 1UL << (uint32_t)intr;
246 }
247 }
248
249 /*!
250 * brief Get PINT peripheral pin interrupt configuration.
251
252 * This function returns the configuration of a given pin interrupt.
253 *
254 * param base Base address of the PINT peripheral.
255 * param pintr Pin interrupt.
256 * param enable Pointer to store the detection logic.
257 * param callback Callback.
258 *
259 * retval None.
260 */
PINT_PinInterruptGetConfig(PINT_Type * base,pint_pin_int_t pintr,pint_pin_enable_t * enable,pint_cb_t * callback)261 void PINT_PinInterruptGetConfig(PINT_Type *base, pint_pin_int_t pintr, pint_pin_enable_t *enable, pint_cb_t *callback)
262 {
263 uint32_t instance = PINT_GetInstance(base);
264 uint32_t mask;
265 bool level;
266
267 assert(base != NULL);
268
269 *enable = kPINT_PinIntEnableNone;
270 level = false;
271
272 mask = 1UL << (uint32_t)pintr;
273 if ((base->ISEL & mask) != 0U)
274 {
275 /* Pin interrupt is level sensitive */
276 level = true;
277 }
278
279 if ((base->IENR & mask) != 0U)
280 {
281 if (level)
282 {
283 /* Level interrupt is enabled */
284 *enable = kPINT_PinIntEnableLowLevel;
285 }
286 else
287 {
288 /* Rising edge interrupt */
289 *enable = kPINT_PinIntEnableRiseEdge;
290 }
291 }
292
293 if ((base->IENF & mask) != 0U)
294 {
295 if (level)
296 {
297 /* Level interrupt is active high */
298 *enable = kPINT_PinIntEnableHighLevel;
299 }
300 else
301 {
302 /* Either falling or both edge */
303 if (*enable == kPINT_PinIntEnableRiseEdge)
304 {
305 /* Rising and faling edge */
306 *enable = kPINT_PinIntEnableBothEdges;
307 }
308 else
309 {
310 /* Falling edge */
311 *enable = kPINT_PinIntEnableFallEdge;
312 }
313 }
314 }
315
316 /* Security PINT uses additional callback array */
317 if (instance < FSL_FEATURE_PINT_NUMBER_OF_INSTANCE)
318 {
319 *callback = s_pintCallback[pintr];
320 }
321 else
322 {
323 #if (defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS)
324 *callback = s_secpintCallback[pintr];
325 #endif
326 }
327 }
328
329 /*!
330 * brief Configure PINT pattern match.
331
332 * This function configures a given pattern match bit slice.
333 *
334 * param base Base address of the PINT peripheral.
335 * param bslice Pattern match bit slice number.
336 * param cfg Pointer to bit slice configuration.
337 *
338 * retval None.
339 */
PINT_PatternMatchConfig(PINT_Type * base,pint_pmatch_bslice_t bslice,pint_pmatch_cfg_t * cfg)340 void PINT_PatternMatchConfig(PINT_Type *base, pint_pmatch_bslice_t bslice, pint_pmatch_cfg_t *cfg)
341 {
342 uint32_t src_shift;
343 uint32_t cfg_shift;
344 uint32_t pmcfg;
345 uint32_t tmp_src_shift = PININT_BITSLICE_SRC_MASK;
346 uint32_t tmp_cfg_shift = PININT_BITSLICE_CFG_MASK;
347 uint32_t instance = PINT_GetInstance(base);
348
349 assert(base != NULL);
350
351 src_shift = PININT_BITSLICE_SRC_START + ((uint32_t)bslice * 3UL);
352 cfg_shift = PININT_BITSLICE_CFG_START + ((uint32_t)bslice * 3UL);
353
354 /* Input source selection for selected bit slice */
355 base->PMSRC = (base->PMSRC & ~(tmp_src_shift << src_shift)) | ((uint32_t)(cfg->bs_src) << src_shift);
356
357 /* Bit slice configuration */
358 pmcfg = base->PMCFG;
359 pmcfg = (pmcfg & ~(tmp_cfg_shift << cfg_shift)) | ((uint32_t)(cfg->bs_cfg) << cfg_shift);
360
361 /* If end point is true, enable the bits */
362 if ((uint32_t)bslice != 7UL)
363 {
364 if (cfg->end_point)
365 {
366 pmcfg |= (1UL << (uint32_t)bslice);
367 }
368 else
369 {
370 pmcfg &= ~(1UL << (uint32_t)bslice);
371 }
372 }
373
374 base->PMCFG = pmcfg;
375
376 /* Save callback pointer */
377 if (instance < FSL_FEATURE_PINT_NUMBER_OF_INSTANCE)
378 {
379 if ((uint32_t)bslice < (uint32_t)FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS)
380 {
381 s_pintCallback[bslice] = cfg->callback;
382 }
383 }
384 else
385 {
386 #if (defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS)
387 if ((uint32_t)bslice < (uint32_t)FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS)
388 {
389 s_secpintCallback[bslice] = cfg->callback;
390 }
391 #endif
392 }
393 }
394
395 /*!
396 * brief Get PINT pattern match configuration.
397
398 * This function returns the configuration of a given pattern match bit slice.
399 *
400 * param base Base address of the PINT peripheral.
401 * param bslice Pattern match bit slice number.
402 * param cfg Pointer to bit slice configuration.
403 *
404 * retval None.
405 */
PINT_PatternMatchGetConfig(PINT_Type * base,pint_pmatch_bslice_t bslice,pint_pmatch_cfg_t * cfg)406 void PINT_PatternMatchGetConfig(PINT_Type *base, pint_pmatch_bslice_t bslice, pint_pmatch_cfg_t *cfg)
407 {
408 uint32_t src_shift;
409 uint32_t cfg_shift;
410 uint32_t tmp_src_shift = PININT_BITSLICE_SRC_MASK;
411 uint32_t tmp_cfg_shift = PININT_BITSLICE_CFG_MASK;
412 uint32_t instance = PINT_GetInstance(base);
413
414 assert(base != NULL);
415
416 src_shift = PININT_BITSLICE_SRC_START + ((uint32_t)bslice * 3UL);
417 cfg_shift = PININT_BITSLICE_CFG_START + ((uint32_t)bslice * 3UL);
418
419 cfg->bs_src = (pint_pmatch_input_src_t)(uint32_t)((base->PMSRC & (tmp_src_shift << src_shift)) >> src_shift);
420 cfg->bs_cfg = (pint_pmatch_bslice_cfg_t)(uint32_t)((base->PMCFG & (tmp_cfg_shift << cfg_shift)) >> cfg_shift);
421
422 if ((uint32_t)bslice == 7U)
423 {
424 cfg->end_point = true;
425 }
426 else
427 {
428 cfg->end_point = (((base->PMCFG & (1UL << (uint32_t)bslice)) >> (uint32_t)bslice) != 0U) ? true : false;
429 }
430
431 if (instance < FSL_FEATURE_PINT_NUMBER_OF_INSTANCE)
432 {
433 if ((uint32_t)bslice < (uint32_t)FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS)
434 {
435 cfg->callback = s_pintCallback[bslice];
436 }
437 }
438 else
439 {
440 #if (defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS)
441 if ((uint32_t)bslice < (uint32_t)FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS)
442 {
443 cfg->callback = s_secpintCallback[bslice];
444 }
445 #endif
446 }
447 }
448
449 /*!
450 * brief Reset pattern match detection logic.
451
452 * This function resets the pattern match detection logic if any of the product term is matching.
453 *
454 * param base Base address of the PINT peripheral.
455 *
456 * retval pmstatus Each bit position indicates the match status of corresponding bit slice.
457 * = 0 Match was detected. = 1 Match was not detected.
458 */
PINT_PatternMatchResetDetectLogic(PINT_Type * base)459 uint32_t PINT_PatternMatchResetDetectLogic(PINT_Type *base)
460 {
461 uint32_t pmctrl;
462 uint32_t pmstatus;
463 uint32_t pmsrc;
464
465 pmctrl = base->PMCTRL;
466 pmstatus = pmctrl >> PINT_PMCTRL_PMAT_SHIFT;
467 if (pmstatus != 0UL)
468 {
469 /* Reset Pattern match engine detection logic */
470 pmsrc = base->PMSRC;
471 base->PMSRC = pmsrc;
472 }
473 return (pmstatus);
474 }
475
476 /*!
477 * @brief Clear Selected pin interrupt status only when the pin was triggered by edge-sensitive.
478
479 * This function clears the selected pin interrupt status.
480 *
481 * @param base Base address of the PINT peripheral.
482 * @param pintr Pin interrupt.
483 *
484 * @retval None.
485 */
PINT_PinInterruptClrStatus(PINT_Type * base,pint_pin_int_t pintr)486 void PINT_PinInterruptClrStatus(PINT_Type *base, pint_pin_int_t pintr)
487 {
488 uint32_t pinIntMode = base->ISEL & (1UL << (uint32_t)pintr);
489 uint32_t pinIntStatus = base->IST & (1UL << (uint32_t)pintr);
490
491 /* Edge sensitive and pin interrupt that is currently requesting an interrupt. */
492 if ((pinIntMode == 0x0UL) && (pinIntStatus != 0x0UL))
493 {
494 base->IST = (1UL << (uint32_t)pintr);
495 }
496 }
497
498 /*!
499 * @brief Clear all pin interrupts status only when pins were triggered by edge-sensitive.
500
501 * This function clears the status of all pin interrupts.
502 *
503 * @param base Base address of the PINT peripheral.
504 *
505 * @retval None.
506 */
PINT_PinInterruptClrStatusAll(PINT_Type * base)507 void PINT_PinInterruptClrStatusAll(PINT_Type *base)
508 {
509 uint32_t instance = PINT_GetInstance(base);
510 uint32_t pinIntMode = 0;
511 uint32_t pinIntStatus = 0;
512 uint32_t pinIntCount = 0;
513 uint32_t mask = 0;
514 uint32_t i;
515
516 if (instance < FSL_FEATURE_PINT_NUMBER_OF_INSTANCE)
517 {
518 pinIntCount = (uint32_t)FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS;
519 }
520 else
521 {
522 #if (defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS)
523 pinIntCount = (uint32_t)FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS;
524 #endif /* FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS */
525 }
526
527 for (i = 0; i < pinIntCount; i++)
528 {
529 pinIntMode = base->ISEL & (1UL << i);
530 pinIntStatus = base->IST & (1UL << i);
531
532 /* Edge sensitive and pin interrupt that is currently requesting an interrupt. */
533 if ((pinIntMode == 0x0UL) && (pinIntStatus != 0x0UL))
534 {
535 mask |= 1UL << i;
536 }
537 }
538
539 base->IST = mask;
540 }
541
542 /*!
543 * brief Enable callback.
544
545 * This function enables the interrupt for the selected PINT peripheral. Although the pin(s) are monitored
546 * as soon as they are enabled, the callback function is not enabled until this function is called.
547 *
548 * param base Base address of the PINT peripheral.
549 *
550 * retval None.
551 */
PINT_EnableCallback(PINT_Type * base)552 void PINT_EnableCallback(PINT_Type *base)
553 {
554 uint32_t instance = PINT_GetInstance(base);
555 uint32_t i;
556
557 assert(base != NULL);
558
559 if (instance < FSL_FEATURE_PINT_NUMBER_OF_INSTANCE)
560 {
561 #if defined(FSL_FEATURE_PINT_INTERRUPT_COMBINE) && (FSL_FEATURE_PINT_INTERRUPT_COMBINE == 1)
562 for (i = 0; i < (uint32_t)FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS; i++)
563 {
564 PINT_PinInterruptClrStatus(base, (pint_pin_int_t)i);
565 }
566 NVIC_ClearPendingIRQ(s_pintIRQ[0]);
567 (void)EnableIRQ(s_pintIRQ[0]);
568 #else
569 for (i = 0; i < (uint32_t)FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS; i++)
570 {
571 PINT_PinInterruptClrStatus(base, (pint_pin_int_t)i);
572 NVIC_ClearPendingIRQ(s_pintIRQ[i]);
573 (void)EnableIRQ(s_pintIRQ[i]);
574 }
575 #endif
576 }
577 else
578 {
579 #if (defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS)
580 for (i = 0; i < (uint32_t)FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS; i++)
581 {
582 PINT_PinInterruptClrStatus(base, (pint_pin_int_t)i);
583 NVIC_ClearPendingIRQ(s_pintIRQ[i + (uint32_t)FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS]);
584 (void)EnableIRQ(s_pintIRQ[i + (uint32_t)FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS]);
585 }
586 #endif /* FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS */
587 }
588 }
589
590 /*!
591 * brief enable callback by pin index.
592
593 * This function enables callback by pin index instead of enabling all pins.
594 *
595 * param base Base address of the peripheral.
596 * param pinIdx pin index.
597 *
598 * retval None.
599 */
PINT_EnableCallbackByIndex(PINT_Type * base,pint_pin_int_t pintIdx)600 void PINT_EnableCallbackByIndex(PINT_Type *base, pint_pin_int_t pintIdx)
601 {
602 assert(base != NULL);
603
604 PINT_PinInterruptClrStatus(base, (pint_pin_int_t)pintIdx);
605
606 #if (defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS)
607 /* Get the right security pint irq index in array */
608 if ((base == SECPINT) && ((uint32_t)pintIdx < (uint32_t)FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS))
609 {
610 pintIdx =
611 (pint_pin_int_t)(uint32_t)((uint32_t)pintIdx + (uint32_t)FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS);
612 }
613 #endif /* FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS */
614
615 #if defined(FSL_FEATURE_PINT_INTERRUPT_COMBINE) && (FSL_FEATURE_PINT_INTERRUPT_COMBINE == 1)
616 NVIC_ClearPendingIRQ(s_pintIRQ[0]);
617 (void)EnableIRQ(s_pintIRQ[0]);
618 #else
619 NVIC_ClearPendingIRQ(s_pintIRQ[pintIdx]);
620 (void)EnableIRQ(s_pintIRQ[pintIdx]);
621 #endif
622 }
623
624 /*!
625 * brief Disable callback.
626
627 * This function disables the interrupt for the selected PINT peripheral. Although the pins are still
628 * being monitored but the callback function is not called.
629 *
630 * param base Base address of the peripheral.
631 *
632 * retval None.
633 */
PINT_DisableCallback(PINT_Type * base)634 void PINT_DisableCallback(PINT_Type *base)
635 {
636 uint32_t instance = PINT_GetInstance(base);
637 uint32_t i;
638
639 assert(base != NULL);
640
641 if (instance < FSL_FEATURE_PINT_NUMBER_OF_INSTANCE)
642 {
643 #if defined(FSL_FEATURE_PINT_INTERRUPT_COMBINE) && (FSL_FEATURE_PINT_INTERRUPT_COMBINE == 1)
644 (void)DisableIRQ(s_pintIRQ[0]);
645 for (i = 0; i < (uint32_t)FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS; i++)
646 {
647 PINT_PinInterruptClrStatus(base, (pint_pin_int_t)i);
648 }
649 NVIC_ClearPendingIRQ(s_pintIRQ[0]);
650 #else
651 for (i = 0; i < (uint32_t)FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS; i++)
652 {
653 (void)DisableIRQ(s_pintIRQ[i]);
654 PINT_PinInterruptClrStatus(base, (pint_pin_int_t)i);
655 NVIC_ClearPendingIRQ(s_pintIRQ[i]);
656 }
657 #endif
658 }
659 else
660 {
661 #if (defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS)
662 for (i = 0; i < (uint32_t)FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS; i++)
663 {
664 (void)DisableIRQ(s_pintIRQ[i + (uint32_t)FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS]);
665 PINT_PinInterruptClrStatus(base, (pint_pin_int_t)i);
666 NVIC_ClearPendingIRQ(s_pintIRQ[i + (uint32_t)FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS]);
667 }
668 #endif /* FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS */
669 }
670 }
671
672 /*!
673 * brief disable callback by pin index.
674
675 * This function disables callback by pin index instead of disabling all pins.
676 *
677 * param base Base address of the peripheral.
678 * param pinIdx pin index.
679 *
680 * retval None.
681 */
PINT_DisableCallbackByIndex(PINT_Type * base,pint_pin_int_t pintIdx)682 void PINT_DisableCallbackByIndex(PINT_Type *base, pint_pin_int_t pintIdx)
683 {
684 uint32_t instance = PINT_GetInstance(base);
685
686 assert(base != NULL);
687
688 if (instance < FSL_FEATURE_PINT_NUMBER_OF_INSTANCE)
689 {
690 #if defined(FSL_FEATURE_PINT_INTERRUPT_COMBINE) && (FSL_FEATURE_PINT_INTERRUPT_COMBINE == 1)
691 (void)DisableIRQ(s_pintIRQ[0]);
692 PINT_PinInterruptClrStatus(base, (pint_pin_int_t)pintIdx);
693 NVIC_ClearPendingIRQ(s_pintIRQ[0]);
694 #else
695 (void)DisableIRQ(s_pintIRQ[pintIdx]);
696 PINT_PinInterruptClrStatus(base, (pint_pin_int_t)pintIdx);
697 NVIC_ClearPendingIRQ(s_pintIRQ[pintIdx]);
698 #endif
699 }
700 else
701 {
702 #if (defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS)
703 (void)DisableIRQ(s_pintIRQ[(uint32_t)pintIdx + (uint32_t)FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS]);
704 PINT_PinInterruptClrStatus(base, (pint_pin_int_t)pintIdx);
705 NVIC_ClearPendingIRQ(s_pintIRQ[(uint32_t)pintIdx + (uint32_t)FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS]);
706 #endif
707 }
708 }
709
710 /*!
711 * brief Deinitialize PINT peripheral.
712
713 * This function disables the PINT clock.
714 *
715 * param base Base address of the PINT peripheral.
716 *
717 * retval None.
718 */
PINT_Deinit(PINT_Type * base)719 void PINT_Deinit(PINT_Type *base)
720 {
721 uint32_t instance = PINT_GetInstance(base);
722 uint32_t i;
723
724 assert(base != NULL);
725
726 /* Cleanup */
727 PINT_DisableCallback(base);
728 if (instance < FSL_FEATURE_PINT_NUMBER_OF_INSTANCE)
729 {
730 /* Clear PINT callback array */
731 for (i = 0; i < (uint32_t)FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS; i++)
732 {
733 s_pintCallback[i] = NULL;
734 }
735 }
736 else
737 {
738 #if (defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS)
739 /* Clear SECPINT callback array */
740 for (i = 0; i < (uint32_t)FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS; i++)
741 {
742 s_secpintCallback[i] = NULL;
743 }
744 #endif /* FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS */
745 }
746
747 #if defined(FSL_FEATURE_CLOCK_HAS_GPIOINT_CLOCK_SOURCE) && (FSL_FEATURE_CLOCK_HAS_GPIOINT_CLOCK_SOURCE == 1)
748
749 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
750 CLOCK_DisableClock(kCLOCK_GpioInt);
751 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
752
753 #elif defined(FSL_FEATURE_CLOCK_HAS_GPIOINT_CLOCK_SOURCE) && (FSL_FEATURE_CLOCK_HAS_GPIOINT_CLOCK_SOURCE == 0)
754
755 if (instance < FSL_FEATURE_PINT_NUMBER_OF_INSTANCE)
756 {
757 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
758 CLOCK_DisableClock(kCLOCK_Gpio0);
759 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
760 }
761 else
762 {
763 #if (defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS)
764 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
765 CLOCK_DisableClock(kCLOCK_Gpio_Sec);
766 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
767 #endif /* FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS */
768 }
769
770 #else
771
772 if (instance < FSL_FEATURE_PINT_NUMBER_OF_INSTANCE)
773 {
774 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
775 CLOCK_DisableClock(kCLOCK_Pint);
776 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
777 }
778 else
779 {
780 /* if need config SECURE PINT device,then enable secure pint interrupt clock */
781 #if (defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS)
782 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
783 CLOCK_DisableClock(kCLOCK_Gpio_Sec_Int);
784 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
785 #endif /* FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS */
786 }
787 #endif /* FSL_FEATURE_CLOCK_HAS_GPIOINT_CLOCK_SOURCE */
788 }
789 #if (defined(FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS) && FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS)
790 /* IRQ handler functions overloading weak symbols in the startup */
791 void SEC_GPIO_INT0_IRQ0_DriverIRQHandler(void);
SEC_GPIO_INT0_IRQ0_DriverIRQHandler(void)792 void SEC_GPIO_INT0_IRQ0_DriverIRQHandler(void)
793 {
794 uint32_t secPintIndex = FSL_FEATURE_PINT_NUMBER_OF_INSTANCE;
795 uint32_t pmstatus = 0;
796
797 /* Reset pattern match detection */
798 pmstatus = PINT_PatternMatchResetDetectLogic(s_pintBases[secPintIndex]);
799 /* Call user function */
800 if (s_secpintCallback[kPINT_SecPinInt0] != NULL)
801 {
802 s_secpintCallback[kPINT_SecPinInt0](kPINT_SecPinInt0, pmstatus);
803 }
804 if ((s_pintBases[secPintIndex]->ISEL & 0x1U) == 0x0U)
805 {
806 /* Edge sensitive: clear Pin interrupt after callback */
807 PINT_PinInterruptClrStatus(s_pintBases[secPintIndex], kPINT_PinInt0);
808 }
809 SDK_ISR_EXIT_BARRIER;
810 }
811
812 #if (FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS > 1U)
813 /* IRQ handler functions overloading weak symbols in the startup */
814 void SEC_GPIO_INT0_IRQ1_DriverIRQHandler(void);
SEC_GPIO_INT0_IRQ1_DriverIRQHandler(void)815 void SEC_GPIO_INT0_IRQ1_DriverIRQHandler(void)
816 {
817 uint32_t secPintIndex = FSL_FEATURE_PINT_NUMBER_OF_INSTANCE;
818 uint32_t pmstatus;
819
820 /* Reset pattern match detection */
821 pmstatus = PINT_PatternMatchResetDetectLogic(s_pintBases[secPintIndex]);
822 /* Call user function */
823 if (s_secpintCallback[kPINT_SecPinInt1] != NULL)
824 {
825 s_secpintCallback[kPINT_SecPinInt1](kPINT_SecPinInt1, pmstatus);
826 }
827 if ((s_pintBases[secPintIndex]->ISEL & 0x1U) == 0x0U)
828 {
829 /* Edge sensitive: clear Pin interrupt after callback */
830 PINT_PinInterruptClrStatus(s_pintBases[secPintIndex], kPINT_PinInt1);
831 }
832 SDK_ISR_EXIT_BARRIER;
833 }
834 #endif /* FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS */
835 #endif /* FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS */
836
837 void PINT0_DriverIRQHandler(void);
PINT0_DriverIRQHandler(void)838 void PINT0_DriverIRQHandler(void)
839 {
840 uint32_t flags = (s_pintBases[0]->IST & PINT_IST_PSTAT_MASK) | PINT_PatternMatchGetStatusAll(s_pintBases[0]);
841 uint32_t pmstatus;
842
843 for (uint8_t i = 0; i < (uint32_t)FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS; i++)
844 {
845 if ((flags & (1UL << i)) != 0UL)
846 {
847 /* Reset pattern match detection */
848 pmstatus = PINT_PatternMatchResetDetectLogic(s_pintBases[0]);
849 /* Call user function */
850 if (s_pintCallback[i] != NULL)
851 {
852 s_pintCallback[i]((pint_pin_int_t)i, pmstatus);
853 }
854 if ((s_pintBases[0]->ISEL & (1UL << i)) == 0x0UL)
855 {
856 /* Edge sensitive: clear Pin interrupt after callback */
857 PINT_PinInterruptClrStatus(s_pintBases[0], (pint_pin_int_t)i);
858 }
859 }
860 }
861
862 SDK_ISR_EXIT_BARRIER;
863 }
864
865 /* IRQ handler functions overloading weak symbols in the startup */
866 void PIN_INT0_DriverIRQHandler(void);
PIN_INT0_DriverIRQHandler(void)867 void PIN_INT0_DriverIRQHandler(void)
868 {
869 uint32_t pmstatus;
870
871 /* Reset pattern match detection */
872 pmstatus = PINT_PatternMatchResetDetectLogic(s_pintBases[0]);
873 /* Call user function */
874 if (s_pintCallback[kPINT_PinInt0] != NULL)
875 {
876 s_pintCallback[kPINT_PinInt0](kPINT_PinInt0, pmstatus);
877 }
878 if ((s_pintBases[0]->ISEL & 0x1U) == 0x0U)
879 {
880 /* Edge sensitive: clear Pin interrupt after callback */
881 PINT_PinInterruptClrStatus(s_pintBases[0], kPINT_PinInt0);
882 }
883 SDK_ISR_EXIT_BARRIER;
884 }
885
886 #if (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 1U)
887 void PIN_INT1_DriverIRQHandler(void);
PIN_INT1_DriverIRQHandler(void)888 void PIN_INT1_DriverIRQHandler(void)
889 {
890 uint32_t pmstatus;
891
892 /* Reset pattern match detection */
893 pmstatus = PINT_PatternMatchResetDetectLogic(s_pintBases[0]);
894 /* Call user function */
895 if (s_pintCallback[kPINT_PinInt1] != NULL)
896 {
897 s_pintCallback[kPINT_PinInt1](kPINT_PinInt1, pmstatus);
898 }
899 if ((s_pintBases[0]->ISEL & 0x2U) == 0x0U)
900 {
901 /* Edge sensitive: clear Pin interrupt after callback */
902 PINT_PinInterruptClrStatus(s_pintBases[0], kPINT_PinInt1);
903 }
904 SDK_ISR_EXIT_BARRIER;
905 }
906 #endif
907
908 #if (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 2U)
909 void PIN_INT2_DriverIRQHandler(void);
PIN_INT2_DriverIRQHandler(void)910 void PIN_INT2_DriverIRQHandler(void)
911 {
912 uint32_t pmstatus;
913
914 /* Reset pattern match detection */
915 pmstatus = PINT_PatternMatchResetDetectLogic(s_pintBases[0]);
916 /* Call user function */
917 if (s_pintCallback[kPINT_PinInt2] != NULL)
918 {
919 s_pintCallback[kPINT_PinInt2](kPINT_PinInt2, pmstatus);
920 }
921 if ((s_pintBases[0]->ISEL & 0x4U) == 0x0U)
922 {
923 /* Edge sensitive: clear Pin interrupt after callback */
924 PINT_PinInterruptClrStatus(s_pintBases[0], kPINT_PinInt2);
925 }
926 SDK_ISR_EXIT_BARRIER;
927 }
928 #endif
929
930 #if (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 3U)
931 void PIN_INT3_DriverIRQHandler(void);
PIN_INT3_DriverIRQHandler(void)932 void PIN_INT3_DriverIRQHandler(void)
933 {
934 uint32_t pmstatus;
935
936 /* Reset pattern match detection */
937 pmstatus = PINT_PatternMatchResetDetectLogic(s_pintBases[0]);
938 /* Call user function */
939 if (s_pintCallback[kPINT_PinInt3] != NULL)
940 {
941 s_pintCallback[kPINT_PinInt3](kPINT_PinInt3, pmstatus);
942 }
943 if ((s_pintBases[0]->ISEL & 0x8U) == 0x0U)
944 {
945 /* Edge sensitive: clear Pin interrupt after callback */
946 PINT_PinInterruptClrStatus(s_pintBases[0], kPINT_PinInt3);
947 }
948 SDK_ISR_EXIT_BARRIER;
949 }
950 #endif
951
952 #if (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 4U)
953 void PIN_INT4_DriverIRQHandler(void);
PIN_INT4_DriverIRQHandler(void)954 void PIN_INT4_DriverIRQHandler(void)
955 {
956 uint32_t pmstatus;
957
958 /* Reset pattern match detection */
959 pmstatus = PINT_PatternMatchResetDetectLogic(s_pintBases[0]);
960 /* Call user function */
961 if (s_pintCallback[kPINT_PinInt4] != NULL)
962 {
963 s_pintCallback[kPINT_PinInt4](kPINT_PinInt4, pmstatus);
964 }
965 if ((s_pintBases[0]->ISEL & 0x10U) == 0x0U)
966 {
967 /* Edge sensitive: clear Pin interrupt after callback */
968 PINT_PinInterruptClrStatus(s_pintBases[0], kPINT_PinInt4);
969 }
970 SDK_ISR_EXIT_BARRIER;
971 }
972 #endif
973
974 #if (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 5U)
975 #if defined(FSL_FEATURE_NVIC_HAS_SHARED_INTERTTUPT_NUMBER) && FSL_FEATURE_NVIC_HAS_SHARED_INTERTTUPT_NUMBER
976 void PIN_INT5_DAC1_IRQHandler(void);
PIN_INT5_DAC1_IRQHandler(void)977 void PIN_INT5_DAC1_IRQHandler(void)
978 #else
979 void PIN_INT5_DriverIRQHandler(void);
980 void PIN_INT5_DriverIRQHandler(void)
981 #endif /* FSL_FEATURE_NVIC_HAS_SHARED_INTERTTUPT_NUMBER */
982 {
983 uint32_t pmstatus;
984
985 /* Reset pattern match detection */
986 pmstatus = PINT_PatternMatchResetDetectLogic(s_pintBases[0]);
987 /* Call user function */
988 if (s_pintCallback[kPINT_PinInt5] != NULL)
989 {
990 s_pintCallback[kPINT_PinInt5](kPINT_PinInt5, pmstatus);
991 }
992 if ((s_pintBases[0]->ISEL & 0x20U) == 0x0U)
993 {
994 /* Edge sensitive: clear Pin interrupt after callback */
995 PINT_PinInterruptClrStatus(s_pintBases[0], kPINT_PinInt5);
996 }
997 SDK_ISR_EXIT_BARRIER;
998 }
999 #endif
1000
1001 #if (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 6U)
1002 #if defined(FSL_FEATURE_NVIC_HAS_SHARED_INTERTTUPT_NUMBER) && FSL_FEATURE_NVIC_HAS_SHARED_INTERTTUPT_NUMBER
1003 void PIN_INT6_USART3_IRQHandler(void);
PIN_INT6_USART3_IRQHandler(void)1004 void PIN_INT6_USART3_IRQHandler(void)
1005 #else
1006 void PIN_INT6_DriverIRQHandler(void);
1007 void PIN_INT6_DriverIRQHandler(void)
1008 #endif /* FSL_FEATURE_NVIC_HAS_SHARED_INTERTTUPT_NUMBER */
1009 {
1010 uint32_t pmstatus;
1011
1012 /* Reset pattern match detection */
1013 pmstatus = PINT_PatternMatchResetDetectLogic(s_pintBases[0]);
1014 /* Call user function */
1015 if (s_pintCallback[kPINT_PinInt6] != NULL)
1016 {
1017 s_pintCallback[kPINT_PinInt6](kPINT_PinInt6, pmstatus);
1018 }
1019 if ((s_pintBases[0]->ISEL & 0x40U) == 0x0U)
1020 {
1021 /* Edge sensitive: clear Pin interrupt after callback */
1022 PINT_PinInterruptClrStatus(s_pintBases[0], kPINT_PinInt6);
1023 }
1024 SDK_ISR_EXIT_BARRIER;
1025 }
1026 #endif
1027
1028 #if (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 7U)
1029 #if defined(FSL_FEATURE_NVIC_HAS_SHARED_INTERTTUPT_NUMBER) && FSL_FEATURE_NVIC_HAS_SHARED_INTERTTUPT_NUMBER
1030 void PIN_INT7_USART4_IRQHandler(void);
PIN_INT7_USART4_IRQHandler(void)1031 void PIN_INT7_USART4_IRQHandler(void)
1032 #else
1033 void PIN_INT7_DriverIRQHandler(void);
1034 void PIN_INT7_DriverIRQHandler(void)
1035 #endif /* FSL_FEATURE_NVIC_HAS_SHARED_INTERTTUPT_NUMBER */
1036 {
1037 uint32_t pmstatus;
1038
1039 /* Reset pattern match detection */
1040 pmstatus = PINT_PatternMatchResetDetectLogic(s_pintBases[0]);
1041 /* Call user function */
1042 if (s_pintCallback[kPINT_PinInt7] != NULL)
1043 {
1044 s_pintCallback[kPINT_PinInt7](kPINT_PinInt7, pmstatus);
1045 }
1046 if ((s_pintBases[0]->ISEL & 0x80U) == 0x0U)
1047 {
1048 /* Edge sensitive: clear Pin interrupt after callback */
1049 PINT_PinInterruptClrStatus(s_pintBases[0], kPINT_PinInt7);
1050 }
1051 SDK_ISR_EXIT_BARRIER;
1052 }
1053 #endif
1054
