| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXC041/ |
| D | MCXC041.h | 1875 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXC242/ |
| D | MCXC242.h | 3485 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKL17Z644/ |
| D | MKL17Z644.h | 3131 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKL27Z644/ |
| D | MKL27Z644.h | 3140 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXC141/ |
| D | MCXC141.h | 3485 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXC144/ |
| D | MCXC144.h | 4076 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXC142/ |
| D | MCXC142.h | 3483 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXC143/ |
| D | MCXC143.h | 4076 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKL25Z4/ |
| D | MKL25Z4.h | 1666 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/ |
| D | MK02F12810.h | 5552 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXC243/ |
| D | MCXC243.h | 4074 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXC244/ |
| D | MCXC244.h | 4076 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/ |
| D | MKV30F12810.h | 5557 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/ |
| D | MKV10Z7.h | 4983 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKM14ZA5/ |
| D | MKM14ZA5.h | 5164 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/ |
| D | MKV31F12810.h | 5588 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/ |
| D | MKV10Z1287.h | 5471 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/ |
| D | MKV11Z7.h | 6259 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F25612/ |
| D | MKV31F25612.h | 6351 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F51212/ |
| D | MKV31F51212.h | 6597 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12810/ |
| D | MK22F12810.h | 6327 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B21A/ |
| D | K32L2B21A.h | 7378 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B31A/ |
| D | K32L2B31A.h | 7378 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B11A/ |
| D | K32L2B11A.h | 7378 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXC444/ |
| D | MCXC444.h | 8784 __IO uint8_t PE2; /**< LLWU Pin Enable 2 register, offset: 0x1 */ member
|
