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Searched defs:PDM_VAD0_ZCD_VADZCDAND_MASK (Results 1 – 25 of 34) sorted by relevance

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/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h43325 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h43327 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h43327 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h43325 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h43327 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_ca53.h43339 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
DMIMX8MN6_cm7.h43325 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h61656 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
DMIMXRT1165_cm4.h62589 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM6/
DMIMX8MM6_ca53.h61287 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
DMIMX8MM6_cm4.h61822 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM5/
DMIMX8MM5_cm4.h61822 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h66499 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
DMIMXRT1166_cm7.h65566 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM1/
DMIMX8MM1_cm4.h61822 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM2/
DMIMX8MM2_cm4.h61822 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM3/
DMIMX8MM3_cm4.h61822 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMX8MM4/
DMIMX8MM4_cm4.h61822 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm7.h72840 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
DMIMXRT1175_cm4.h73773 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h72840 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm7.h76747 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
DMIMXRT1173_cm4.h77680 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h76750 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm4.h77683 #define PDM_VAD0_ZCD_VADZCDAND_MASK (0x10U) macro

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