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Searched defs:PDM_PDMCLKCTRL_FREQ_1333K (Results 1 – 8 of 8) sorted by relevance

/hal_nordic-latest/nrfx/mdk/
Dnrf9160_bitfields.h8969 #define PDM_PDMCLKCTRL_FREQ_1333K (0x0A800000UL) /*!< PDM_CLK = 32 MHz / 24 = 1.333 MHz */ macro
Dnrf9120_bitfields.h9004 #define PDM_PDMCLKCTRL_FREQ_1333K (0x0A800000UL) /*!< PDM_CLK = 32 MHz / 24 = 1.333 MHz */ macro
Dnrf52833_bitfields.h6837 #define PDM_PDMCLKCTRL_FREQ_1333K (0x0A800000UL) /*!< PDM_CLK = 32 MHz / 24 = 1.333 MHz */ macro
Dnrf52840_bitfields.h8587 #define PDM_PDMCLKCTRL_FREQ_1333K (0x0A800000UL) /*!< PDM_CLK = 32 MHz / 24 = 1.333 MHz */ macro
Dnrf5340_application_bitfields.h10704 #define PDM_PDMCLKCTRL_FREQ_1333K (0x0A800000UL) /*!< PDM_CLK = 32 MHz / 24 = 1.333 MHz */ macro
Dnrf9230_engb_types.h59454 …#define PDM_PDMCLKCTRL_FREQ_1333K (0x0A800000UL) /*!< PDM_CLK = 32 MHz / 24 = 1.333 MHz … macro
Dnrf54h20_types.h57708 …#define PDM_PDMCLKCTRL_FREQ_1333K (0x0A800000UL) /*!< PDM_CLK = 32 MHz / 24 = 1.333 MHz … macro
Dnrf9230_enga_types.h58928 …#define PDM_PDMCLKCTRL_FREQ_1333K (0x0A800000UL) /*!< PDM_CLK = 32 MHz / 24 = 1.333 MHz … macro