Searched defs:PCI_CFC_PCIE_DEV_CTL (Results 1 – 11 of 11) sorted by relevance
/hal_nxp-3.6.0/s32/drivers/s32ze/BaseNXP/header/ |
D | S32Z2_NETC_VF2_PCI_HDR_TYPE0.h | 96 …__IO uint16_t PCI_CFC_PCIE_DEV_CTL; /**< PCI PCIe device control register, offset: 0x… member
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D | S32Z2_NETC_VF3_PCI_HDR_TYPE0.h | 96 …__IO uint16_t PCI_CFC_PCIE_DEV_CTL; /**< PCI PCIe device control register, offset: 0x… member
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D | S32Z2_NETC_VF4_PCI_HDR_TYPE0.h | 96 …__IO uint16_t PCI_CFC_PCIE_DEV_CTL; /**< PCI PCIe device control register, offset: 0x… member
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D | S32Z2_NETC_VF1_PCI_HDR_TYPE0.h | 96 …__IO uint16_t PCI_CFC_PCIE_DEV_CTL; /**< PCI PCIe device control register, offset: 0x… member
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D | S32Z2_NETC_VF5_PCI_HDR_TYPE0.h | 96 …__IO uint16_t PCI_CFC_PCIE_DEV_CTL; /**< PCI PCIe device control register, offset: 0x… member
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D | S32Z2_NETC_VF6_PCI_HDR_TYPE0.h | 96 …__IO uint16_t PCI_CFC_PCIE_DEV_CTL; /**< PCI PCIe device control register, offset: 0x… member
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D | S32Z2_NETC_VF7_PCI_HDR_TYPE0.h | 96 …__IO uint16_t PCI_CFC_PCIE_DEV_CTL; /**< PCI PCIe device control register, offset: 0x… member
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D | S32Z2_NETC_F0_PCI_HDR_TYPE0.h | 99 …__IO uint16_t PCI_CFC_PCIE_DEV_CTL; /**< PCI PCIe device control register, offset: 0x… member
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D | S32Z2_NETC_F1_PCI_HDR_TYPE0.h | 99 …__IO uint16_t PCI_CFC_PCIE_DEV_CTL; /**< PCI PCIe device control register, offset: 0x… member
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D | S32Z2_NETC_F2_PCI_HDR_TYPE0.h | 99 …__IO uint16_t PCI_CFC_PCIE_DEV_CTL; /**< PCI PCIe device control register, offset: 0x… member
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D | S32Z2_NETC_F3_PCI_HDR_TYPE0.h | 100 …__IO uint16_t PCI_CFC_PCIE_DEV_CTL; /**< PCI PCIe device control register, offset: 0x… member
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