1 // =========================================================================== 2 // This file is autogenerated, please DO NOT modify! 3 // 4 // Generated on 2024-05-23 12:08:58 5 // by user: developer 6 // on machine: swtools 7 // CWD: /home/developer/.conan/data/loki-lrf/8.11.00.04/library-lprf/eng/build/0c46501566d33cb4afdce9818f8c3e61ffe04c9a/build/lrfbledig/iar/pbe/common 8 // Commandline: /home/developer/.conan/data/loki-lrf/8.11.00.04/library-lprf/eng/build/0c46501566d33cb4afdce9818f8c3e61ffe04c9a/lrfbledig/../tools/topsm/regtxtconv.pl -x /home/developer/.conan/data/f65lokilrfbledig/1.3.19-1/library-lprf/eng/package/5ab84d6acfe1f23c4fae0ab88f26e3a396351ac9/source/ti.com_LOKI_LRFBLEDIG_1.0.xml -f acr --devices CC2340R5:B (2.0) /home/developer/.conan/data/loki-lrf/8.11.00.04/library-lprf/eng/build/0c46501566d33cb4afdce9818f8c3e61ffe04c9a/lrfbledig/pbe/common/doc/pbe_common_ram_regs.txt 9 // C&P friendly: /home/developer/.conan/data/loki-lrf/8.11.00.04/library-lprf/eng/build/0c46501566d33cb4afdce9818f8c3e61ffe04c9a/lrfbledig/../tools/topsm/regtxtconv.pl -x /home/developer/.conan/data/f65lokilrfbledig/1.3.19-1/library-lprf/eng/package/5ab84d6acfe1f23c4fae0ab88f26e3a396351ac9/source/ti.com_LOKI_LRFBLEDIG_1.0.xml -f acr --devices CC2340R5:B (2.0) /home/developer/.conan/data/loki-lrf/8.11.00.04/library-lprf/eng/build/0c46501566d33cb4afdce9818f8c3e61ffe04c9a/lrfbledig/pbe/common/doc/pbe_common_ram_regs.txt 10 // 11 // Relevant file version(s): 12 // 13 // /home/developer/.conan/data/loki-lrf/8.11.00.04/library-lprf/eng/build/0c46501566d33cb4afdce9818f8c3e61ffe04c9a/lrfbledig/../tools/topsm/regtxtconv.pl 14 // rcs-info: (file not managed or unknown revision control system) 15 // git-hash: 68a752a8737845355f7bdb320d25a59eac685840 16 // 17 // /home/developer/.conan/data/loki-lrf/8.11.00.04/library-lprf/eng/build/0c46501566d33cb4afdce9818f8c3e61ffe04c9a/lrfbledig/pbe/common/doc/pbe_common_ram_regs.txt 18 // rcs-info: (file not managed or unknown revision control system) 19 // git-hash: cef3659936323c87a91f6983db5e9f40a1f01b57 20 // 21 // =========================================================================== 22 23 24 #ifndef __PBE_COMMON_RAM_REGS_H 25 #define __PBE_COMMON_RAM_REGS_H 26 27 //****************************************************************************** 28 // REGISTER OFFSETS 29 //****************************************************************************** 30 // 31 #define PBE_COMMON_RAM_O_CMDPAR0 0x00000000U 32 33 // 34 #define PBE_COMMON_RAM_O_CMDPAR1 0x00000002U 35 36 // 37 #define PBE_COMMON_RAM_O_MSGBOX 0x00000004U 38 39 // Reason why PBE ended operation. 40 #define PBE_COMMON_RAM_O_ENDCAUSE 0x00000006U 41 42 // 43 #define PBE_COMMON_RAM_O_FIFOCMDADD 0x00000008U 44 45 //****************************************************************************** 46 // Register: CMDPAR0 47 //****************************************************************************** 48 // Field: [15:0] val 49 // 50 // 51 #define PBE_COMMON_RAM_CMDPAR0_VAL_W 16U 52 #define PBE_COMMON_RAM_CMDPAR0_VAL_M 0xFFFFU 53 #define PBE_COMMON_RAM_CMDPAR0_VAL_S 0U 54 55 //****************************************************************************** 56 // Register: CMDPAR1 57 //****************************************************************************** 58 // Field: [15:0] val 59 // 60 // 61 #define PBE_COMMON_RAM_CMDPAR1_VAL_W 16U 62 #define PBE_COMMON_RAM_CMDPAR1_VAL_M 0xFFFFU 63 #define PBE_COMMON_RAM_CMDPAR1_VAL_S 0U 64 65 //****************************************************************************** 66 // Register: MSGBOX 67 //****************************************************************************** 68 // Field: [15:0] val 69 // 70 // 71 #define PBE_COMMON_RAM_MSGBOX_VAL_W 16U 72 #define PBE_COMMON_RAM_MSGBOX_VAL_M 0xFFFFU 73 #define PBE_COMMON_RAM_MSGBOX_VAL_S 0U 74 75 //****************************************************************************** 76 // Register: ENDCAUSE 77 //****************************************************************************** 78 // Field: [7:0] stat 79 // 80 // 81 #define PBE_COMMON_RAM_ENDCAUSE_STAT_W 8U 82 #define PBE_COMMON_RAM_ENDCAUSE_STAT_M 0x00FFU 83 #define PBE_COMMON_RAM_ENDCAUSE_STAT_S 0U 84 #define PBE_COMMON_RAM_ENDCAUSE_STAT_ENDOK 0x0000U 85 #define PBE_COMMON_RAM_ENDCAUSE_STAT_RXTIMEOUT 0x0001U 86 #define PBE_COMMON_RAM_ENDCAUSE_STAT_NOSYNC 0x0002U 87 #define PBE_COMMON_RAM_ENDCAUSE_STAT_RXERR 0x0003U 88 #define PBE_COMMON_RAM_ENDCAUSE_STAT_CONNECT 0x0004U 89 #define PBE_COMMON_RAM_ENDCAUSE_STAT_MAXNAK 0x0006U 90 #define PBE_COMMON_RAM_ENDCAUSE_STAT_SCANRSP 0x0006U 91 #define PBE_COMMON_RAM_ENDCAUSE_STAT_EOPSTOP 0x0007U 92 #define PBE_COMMON_RAM_ENDCAUSE_STAT_ERR_RXF 0x00F9U 93 #define PBE_COMMON_RAM_ENDCAUSE_STAT_ERR_TXF 0x00FAU 94 #define PBE_COMMON_RAM_ENDCAUSE_STAT_ERR_SYNTH 0x00FBU 95 #define PBE_COMMON_RAM_ENDCAUSE_STAT_ERR_STOP 0x00FCU 96 #define PBE_COMMON_RAM_ENDCAUSE_STAT_ERR_PAR 0x00FDU 97 #define PBE_COMMON_RAM_ENDCAUSE_STAT_ERR_BADOP 0x00FEU 98 #define PBE_COMMON_RAM_ENDCAUSE_STAT_ERR_INTERNAL 0x00FFU 99 100 //****************************************************************************** 101 // Register: FIFOCMDADD 102 //****************************************************************************** 103 // Field: [15:0] val 104 // 105 // 106 #define PBE_COMMON_RAM_FIFOCMDADD_VAL_W 16U 107 #define PBE_COMMON_RAM_FIFOCMDADD_VAL_M 0xFFFFU 108 #define PBE_COMMON_RAM_FIFOCMDADD_VAL_S 0U 109 110 111 #endif // __PBE_COMMON_RAM_REGS_H 112
