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/hal_infineon-latest/mtb-hal-cat1/COMPONENT_CAT1B/include/pin_packages/
Dcyhal_cyw20829_77_bga.h77 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_cyw20829a0_56_qfn.h77 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_cyw20829_56_qfn.h77 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_psc3_e_lqfp_80.h68 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
/hal_infineon-latest/mtb-hal-cat1/COMPONENT_CAT1A/include/pin_packages/
Dcyhal_psoc6_04_64_tqfp.h71 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_psoc6_03_68_qfn.h71 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_psoc6_04_68_qfn.h71 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_psoc6_04_80_m_csp.h75 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_psoc6_04_80_tqfp.h75 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_tviibe1m_100_lqfp.h65 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_psoc6_02_68_qfn.h71 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_psoc6_03_100_tqfp.h71 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_tviibe2m_100_lqfp.h65 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_tviibe4m_100_lqfp.h65 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_psoc6_02_124_bga.h78 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_psoc6_02_128_tqfp.h78 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_tviibe1m_144_lqfp.h69 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_tviibe2m_144_lqfp.h69 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_tviibe4m_144_lqfp.h69 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_psoc6_01_124_bga.h78 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_tviibe1m_176_lqfp.h72 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_tviibe4m_176_lqfp.h72 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
/hal_infineon-latest/mtb-hal-cat1/COMPONENT_CAT1C/include/pin_packages/
Dcyhal_xmc7100_100_teqfp.h65 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
Dcyhal_xmc7100_144_teqfp.h69 P3_0 = CYHAL_GET_GPIO(CYHAL_PORT_3, 0), //!< Port 3 Pin 0 enumerator
/hal_infineon-latest/XMCLib/drivers/inc/
Dxmc4_gpio_map.h114 #define P3_0 XMC_GPIO_PORT3, 0 macro
388 #define P3_0 XMC_GPIO_PORT3, 0 macro
651 #define P3_0 XMC_GPIO_PORT3, 0 macro
871 #define P3_0 XMC_GPIO_PORT3, 0 macro
1153 #define P3_0 XMC_GPIO_PORT3, 0 macro
1426 #define P3_0 XMC_GPIO_PORT3, 0 macro
1865 #define P3_0 XMC_GPIO_PORT3, 0 macro
2285 #define P3_0 XMC_GPIO_PORT3, 0 macro
2767 #define P3_0 XMC_GPIO_PORT3, 0 macro
3087 #define P3_0 XMC_GPIO_PORT3, 0 macro
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