1 /** 2 * \file 3 * 4 * \brief Component description for OPAMP 5 * 6 * Copyright (c) 2016 Atmel Corporation, 7 * a wholly owned subsidiary of Microchip Technology Inc. 8 * 9 * \asf_license_start 10 * 11 * \page License 12 * 13 * Licensed under the Apache License, Version 2.0 (the "License"); 14 * you may not use this file except in compliance with the License. 15 * You may obtain a copy of the Licence at 16 * 17 * http://www.apache.org/licenses/LICENSE-2.0 18 * 19 * Unless required by applicable law or agreed to in writing, software 20 * distributed under the License is distributed on an "AS IS" BASIS, 21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the License for the specific language governing permissions and 23 * limitations under the License. 24 * 25 * \asf_license_stop 26 * 27 */ 28 29 #ifndef _SAML21_OPAMP_COMPONENT_ 30 #define _SAML21_OPAMP_COMPONENT_ 31 32 /* ========================================================================== */ 33 /** SOFTWARE API DEFINITION FOR OPAMP */ 34 /* ========================================================================== */ 35 /** \addtogroup SAML21_OPAMP Operational Amplifier */ 36 /*@{*/ 37 38 #define OPAMP_U2237 39 #define REV_OPAMP 0x110 40 41 /* -------- OPAMP_CTRLA : (OPAMP Offset: 0x00) (R/W 8) Control A -------- */ 42 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 43 typedef union { 44 struct { 45 uint8_t SWRST:1; /*!< bit: 0 Software Reset */ 46 uint8_t ENABLE:1; /*!< bit: 1 Enable */ 47 uint8_t :5; /*!< bit: 2.. 6 Reserved */ 48 uint8_t LPMUX:1; /*!< bit: 7 Low-Power Mux */ 49 } bit; /*!< Structure used for bit access */ 50 uint8_t reg; /*!< Type used for register access */ 51 } OPAMP_CTRLA_Type; 52 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 53 54 #define OPAMP_CTRLA_OFFSET 0x00 /**< \brief (OPAMP_CTRLA offset) Control A */ 55 #define OPAMP_CTRLA_RESETVALUE _U(0x00) /**< \brief (OPAMP_CTRLA reset_value) Control A */ 56 57 #define OPAMP_CTRLA_SWRST_Pos 0 /**< \brief (OPAMP_CTRLA) Software Reset */ 58 #define OPAMP_CTRLA_SWRST (_U(0x1) << OPAMP_CTRLA_SWRST_Pos) 59 #define OPAMP_CTRLA_ENABLE_Pos 1 /**< \brief (OPAMP_CTRLA) Enable */ 60 #define OPAMP_CTRLA_ENABLE (_U(0x1) << OPAMP_CTRLA_ENABLE_Pos) 61 #define OPAMP_CTRLA_LPMUX_Pos 7 /**< \brief (OPAMP_CTRLA) Low-Power Mux */ 62 #define OPAMP_CTRLA_LPMUX (_U(0x1) << OPAMP_CTRLA_LPMUX_Pos) 63 #define OPAMP_CTRLA_MASK _U(0x83) /**< \brief (OPAMP_CTRLA) MASK Register */ 64 65 /* -------- OPAMP_STATUS : (OPAMP Offset: 0x02) (R/ 8) Status -------- */ 66 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 67 typedef union { 68 struct { 69 uint8_t READY0:1; /*!< bit: 0 OPAMP 0 Ready */ 70 uint8_t READY1:1; /*!< bit: 1 OPAMP 1 Ready */ 71 uint8_t READY2:1; /*!< bit: 2 OPAMP 2 Ready */ 72 uint8_t :5; /*!< bit: 3.. 7 Reserved */ 73 } bit; /*!< Structure used for bit access */ 74 struct { 75 uint8_t READY:3; /*!< bit: 0.. 2 OPAMP x Ready */ 76 uint8_t :5; /*!< bit: 3.. 7 Reserved */ 77 } vec; /*!< Structure used for vec access */ 78 uint8_t reg; /*!< Type used for register access */ 79 } OPAMP_STATUS_Type; 80 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 81 82 #define OPAMP_STATUS_OFFSET 0x02 /**< \brief (OPAMP_STATUS offset) Status */ 83 #define OPAMP_STATUS_RESETVALUE _U(0x00) /**< \brief (OPAMP_STATUS reset_value) Status */ 84 85 #define OPAMP_STATUS_READY0_Pos 0 /**< \brief (OPAMP_STATUS) OPAMP 0 Ready */ 86 #define OPAMP_STATUS_READY0 (1 << OPAMP_STATUS_READY0_Pos) 87 #define OPAMP_STATUS_READY1_Pos 1 /**< \brief (OPAMP_STATUS) OPAMP 1 Ready */ 88 #define OPAMP_STATUS_READY1 (1 << OPAMP_STATUS_READY1_Pos) 89 #define OPAMP_STATUS_READY2_Pos 2 /**< \brief (OPAMP_STATUS) OPAMP 2 Ready */ 90 #define OPAMP_STATUS_READY2 (1 << OPAMP_STATUS_READY2_Pos) 91 #define OPAMP_STATUS_READY_Pos 0 /**< \brief (OPAMP_STATUS) OPAMP x Ready */ 92 #define OPAMP_STATUS_READY_Msk (_U(0x7) << OPAMP_STATUS_READY_Pos) 93 #define OPAMP_STATUS_READY(value) (OPAMP_STATUS_READY_Msk & ((value) << OPAMP_STATUS_READY_Pos)) 94 #define OPAMP_STATUS_MASK _U(0x07) /**< \brief (OPAMP_STATUS) MASK Register */ 95 96 /* -------- OPAMP_OPAMPCTRL : (OPAMP Offset: 0x04) (R/W 32) OPAMP n Control -------- */ 97 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 98 typedef union { 99 struct { 100 uint32_t :1; /*!< bit: 0 Reserved */ 101 uint32_t ENABLE:1; /*!< bit: 1 Operational Amplifier Enable */ 102 uint32_t ANAOUT:1; /*!< bit: 2 Analog Output */ 103 uint32_t BIAS:2; /*!< bit: 3.. 4 Bias Selection */ 104 uint32_t :1; /*!< bit: 5 Reserved */ 105 uint32_t RUNSTDBY:1; /*!< bit: 6 Run in Standby */ 106 uint32_t ONDEMAND:1; /*!< bit: 7 On Demand Control */ 107 uint32_t RES2OUT:1; /*!< bit: 8 Resistor ladder To Output */ 108 uint32_t RES2VCC:1; /*!< bit: 9 Resistor ladder To VCC */ 109 uint32_t RES1EN:1; /*!< bit: 10 Resistor 1 Enable */ 110 uint32_t RES1MUX:2; /*!< bit: 11..12 Resistor 1 Mux */ 111 uint32_t POTMUX:3; /*!< bit: 13..15 Potentiometer Selection */ 112 uint32_t MUXPOS:3; /*!< bit: 16..18 Positive Input Mux Selection */ 113 uint32_t :1; /*!< bit: 19 Reserved */ 114 uint32_t MUXNEG:3; /*!< bit: 20..22 Negative Input Mux Selection */ 115 uint32_t :9; /*!< bit: 23..31 Reserved */ 116 } bit; /*!< Structure used for bit access */ 117 uint32_t reg; /*!< Type used for register access */ 118 } OPAMP_OPAMPCTRL_Type; 119 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 120 121 #define OPAMP_OPAMPCTRL_OFFSET 0x04 /**< \brief (OPAMP_OPAMPCTRL offset) OPAMP n Control */ 122 #define OPAMP_OPAMPCTRL_RESETVALUE _U(0x00000000) /**< \brief (OPAMP_OPAMPCTRL reset_value) OPAMP n Control */ 123 124 #define OPAMP_OPAMPCTRL_ENABLE_Pos 1 /**< \brief (OPAMP_OPAMPCTRL) Operational Amplifier Enable */ 125 #define OPAMP_OPAMPCTRL_ENABLE (_U(0x1) << OPAMP_OPAMPCTRL_ENABLE_Pos) 126 #define OPAMP_OPAMPCTRL_ANAOUT_Pos 2 /**< \brief (OPAMP_OPAMPCTRL) Analog Output */ 127 #define OPAMP_OPAMPCTRL_ANAOUT (_U(0x1) << OPAMP_OPAMPCTRL_ANAOUT_Pos) 128 #define OPAMP_OPAMPCTRL_BIAS_Pos 3 /**< \brief (OPAMP_OPAMPCTRL) Bias Selection */ 129 #define OPAMP_OPAMPCTRL_BIAS_Msk (_U(0x3) << OPAMP_OPAMPCTRL_BIAS_Pos) 130 #define OPAMP_OPAMPCTRL_BIAS(value) (OPAMP_OPAMPCTRL_BIAS_Msk & ((value) << OPAMP_OPAMPCTRL_BIAS_Pos)) 131 #define OPAMP_OPAMPCTRL_RUNSTDBY_Pos 6 /**< \brief (OPAMP_OPAMPCTRL) Run in Standby */ 132 #define OPAMP_OPAMPCTRL_RUNSTDBY (_U(0x1) << OPAMP_OPAMPCTRL_RUNSTDBY_Pos) 133 #define OPAMP_OPAMPCTRL_ONDEMAND_Pos 7 /**< \brief (OPAMP_OPAMPCTRL) On Demand Control */ 134 #define OPAMP_OPAMPCTRL_ONDEMAND (_U(0x1) << OPAMP_OPAMPCTRL_ONDEMAND_Pos) 135 #define OPAMP_OPAMPCTRL_RES2OUT_Pos 8 /**< \brief (OPAMP_OPAMPCTRL) Resistor ladder To Output */ 136 #define OPAMP_OPAMPCTRL_RES2OUT (_U(0x1) << OPAMP_OPAMPCTRL_RES2OUT_Pos) 137 #define OPAMP_OPAMPCTRL_RES2VCC_Pos 9 /**< \brief (OPAMP_OPAMPCTRL) Resistor ladder To VCC */ 138 #define OPAMP_OPAMPCTRL_RES2VCC (_U(0x1) << OPAMP_OPAMPCTRL_RES2VCC_Pos) 139 #define OPAMP_OPAMPCTRL_RES1EN_Pos 10 /**< \brief (OPAMP_OPAMPCTRL) Resistor 1 Enable */ 140 #define OPAMP_OPAMPCTRL_RES1EN (_U(0x1) << OPAMP_OPAMPCTRL_RES1EN_Pos) 141 #define OPAMP_OPAMPCTRL_RES1MUX_Pos 11 /**< \brief (OPAMP_OPAMPCTRL) Resistor 1 Mux */ 142 #define OPAMP_OPAMPCTRL_RES1MUX_Msk (_U(0x3) << OPAMP_OPAMPCTRL_RES1MUX_Pos) 143 #define OPAMP_OPAMPCTRL_RES1MUX(value) (OPAMP_OPAMPCTRL_RES1MUX_Msk & ((value) << OPAMP_OPAMPCTRL_RES1MUX_Pos)) 144 #define OPAMP_OPAMPCTRL_POTMUX_Pos 13 /**< \brief (OPAMP_OPAMPCTRL) Potentiometer Selection */ 145 #define OPAMP_OPAMPCTRL_POTMUX_Msk (_U(0x7) << OPAMP_OPAMPCTRL_POTMUX_Pos) 146 #define OPAMP_OPAMPCTRL_POTMUX(value) (OPAMP_OPAMPCTRL_POTMUX_Msk & ((value) << OPAMP_OPAMPCTRL_POTMUX_Pos)) 147 #define OPAMP_OPAMPCTRL_MUXPOS_Pos 16 /**< \brief (OPAMP_OPAMPCTRL) Positive Input Mux Selection */ 148 #define OPAMP_OPAMPCTRL_MUXPOS_Msk (_U(0x7) << OPAMP_OPAMPCTRL_MUXPOS_Pos) 149 #define OPAMP_OPAMPCTRL_MUXPOS(value) (OPAMP_OPAMPCTRL_MUXPOS_Msk & ((value) << OPAMP_OPAMPCTRL_MUXPOS_Pos)) 150 #define OPAMP_OPAMPCTRL_MUXNEG_Pos 20 /**< \brief (OPAMP_OPAMPCTRL) Negative Input Mux Selection */ 151 #define OPAMP_OPAMPCTRL_MUXNEG_Msk (_U(0x7) << OPAMP_OPAMPCTRL_MUXNEG_Pos) 152 #define OPAMP_OPAMPCTRL_MUXNEG(value) (OPAMP_OPAMPCTRL_MUXNEG_Msk & ((value) << OPAMP_OPAMPCTRL_MUXNEG_Pos)) 153 #define OPAMP_OPAMPCTRL_MASK _U(0x0077FFDE) /**< \brief (OPAMP_OPAMPCTRL) MASK Register */ 154 155 /** \brief OPAMP hardware registers */ 156 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 157 typedef struct { 158 __IO OPAMP_CTRLA_Type CTRLA; /**< \brief Offset: 0x00 (R/W 8) Control A */ 159 RoReg8 Reserved1[0x1]; 160 __I OPAMP_STATUS_Type STATUS; /**< \brief Offset: 0x02 (R/ 8) Status */ 161 RoReg8 Reserved2[0x1]; 162 __IO OPAMP_OPAMPCTRL_Type OPAMPCTRL[3]; /**< \brief Offset: 0x04 (R/W 32) OPAMP n Control */ 163 } Opamp; 164 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 165 166 /*@}*/ 167 168 #endif /* _SAML21_OPAMP_COMPONENT_ */ 169
