1 /** 2 ****************************************************************************** 3 * @file stm32g4xx_hal_opamp.h 4 * @author MCD Application Team 5 * @brief Header file of OPAMP HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32G4xx_HAL_OPAMP_H 21 #define STM32G4xx_HAL_OPAMP_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32g4xx_hal_def.h" 29 30 /** @addtogroup STM32G4xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup OPAMP 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup OPAMP_Exported_Types OPAMP Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief OPAMP Init structure definition 45 */ 46 47 typedef struct 48 { 49 uint32_t PowerMode; /*!< Specifies the power mode Normal or High Speed. 50 This parameter must be a value of @ref OPAMP_PowerMode */ 51 52 uint32_t Mode; /*!< Specifies the OPAMP mode 53 This parameter must be a value of @ref OPAMP_Mode 54 mode is either Standalone, Follower or PGA */ 55 56 uint32_t InvertingInput; /*!< Specifies the inverting input in Standalone & Pga modes 57 - In Standalone mode: i.e when mode is OPAMP_STANDALONE_MODE 58 This parameter must be a value of @ref OPAMP_InvertingInput 59 InvertingInput is either VINM0 or VINM1 60 - In PGA mode: i.e when mode is OPAMP_PGA_MODE 61 & in Follower mode i.e when mode is OPAMP_FOLLOWER_MODE 62 This parameter is Not Applicable */ 63 64 uint32_t NonInvertingInput; /*!< Specifies the non inverting input of the opamp: 65 This parameter must be a value of @ref OPAMP_NonInvertingInput 66 NonInvertingInput is either VINP0, VINP1, VINP2 or VINP3 */ 67 68 FunctionalState InternalOutput; /*!< Specifies the configuration of the internal output from OPAMP to ADC. 69 This parameter can be ENABLE or DISABLE 70 Note: When this output is enabled, regular output to I/O is disabled */ 71 72 uint32_t TimerControlledMuxmode; /*!< Specifies if the Timer controlled Mux mode is enabled or disabled 73 This parameter must be a single value of @ref OPAMP_TimerControlledMuxmode 74 or a combination of them to build a more complex switch scheme by 75 using different timers */ 76 77 uint32_t InvertingInputSecondary; /*!< Specifies the inverting input (secondary) of the opamp when 78 TimerControlledMuxmode is enabled 79 i.e. when TimerControlledMuxmode is OPAMP_TIMERCONTROLLEDMUXMODE_ENABLE 80 - In Standalone mode: i.e when mode is OPAMP_STANDALONE_MODE 81 This parameter must be a value of @ref OPAMP_InvertingInputSecondary 82 InvertingInputSecondary is either VINM0 or VINM1 83 - In PGA mode: i.e when mode is OPAMP_PGA_MODE 84 & in Follower mode i.e when mode is OPAMP_FOLLOWER_MODE 85 This parameter must be a value of @ref OPAMP_InvertingInputSecondary 86 and is used to choose secondary mode (PGA or follower) */ 87 88 uint32_t NonInvertingInputSecondary; /*!< Specifies the non inverting input (secondary) of the opamp when 89 TimerControlledMuxmode is enabled 90 i.e. when TimerControlledMuxmode is OPAMP_TIMERCONTROLLEDMUXMODE_ENABLE 91 This parameter must be a value of @ref OPAMP_NonInvertingInputSecondary 92 NonInvertingInput is either VINP0, VINP1, VINP2 or VINP3 */ 93 94 uint32_t PgaConnect; /*!< Specifies the inverting pin in PGA mode 95 i.e. when mode is OPAMP_PGA_MODE 96 This parameter must be a value of @ref OPAMP_PgaConnect 97 Either: not connected, connected to VINM0 98 In this last case, VINM0 can then be used to input signal (negative gain case 99 with or without bias on VINPx) or to input bias (positive gain case with bias) */ 100 101 uint32_t PgaGain; /*!< Specifies the gain in PGA mode 102 i.e. when mode is OPAMP_PGA_MODE. 103 This parameter must be a value of @ref OPAMP_PgaGain 104 (2, 4, 8, 16, 32 or 64) for positive gain & (-1, -3 ,-7, -15, -31 or -63) for negative gain */ 105 106 uint32_t UserTrimming; /*!< Specifies the trimming mode 107 This parameter must be a value of @ref OPAMP_UserTrimming 108 UserTrimming is either factory or user trimming */ 109 110 uint32_t TrimmingValueP; /*!< Specifies the offset trimming value (PMOS) 111 i.e. when UserTrimming is OPAMP_TRIMMING_USER. 112 This parameter must be a number between Min_Data = 1 and Max_Data = 31 */ 113 114 uint32_t TrimmingValueN; /*!< Specifies the offset trimming value (NMOS) 115 i.e. when UserTrimming is OPAMP_TRIMMING_USER. 116 This parameter must be a number between Min_Data = 1 and Max_Data = 31 */ 117 118 } OPAMP_InitTypeDef; 119 120 /** 121 * @brief HAL State structures definition 122 */ 123 124 typedef enum 125 { 126 HAL_OPAMP_STATE_RESET = 0x00000000UL, /*!< OPAMP is not yet Initialized */ 127 128 HAL_OPAMP_STATE_READY = 0x00000001UL, /*!< OPAMP is initialized and ready for use */ 129 HAL_OPAMP_STATE_CALIBBUSY = 0x00000002UL, /*!< OPAMP is enabled in auto calibration mode */ 130 131 HAL_OPAMP_STATE_BUSY = 0x00000004UL, /*!< OPAMP is enabled and running in normal mode */ 132 HAL_OPAMP_STATE_BUSYLOCKED = 0x00000005UL, /*!< OPAMP control register is locked 133 only system reset allows reconfiguring the opamp. */ 134 135 } HAL_OPAMP_StateTypeDef; 136 137 /** 138 * @brief OPAMP Handle Structure definition 139 */ 140 #if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1) 141 typedef struct __OPAMP_HandleTypeDef 142 #else 143 typedef struct 144 #endif 145 { 146 OPAMP_TypeDef *Instance; /*!< OPAMP instance's registers base address */ 147 OPAMP_InitTypeDef Init; /*!< OPAMP required parameters */ 148 HAL_StatusTypeDef Status; /*!< OPAMP peripheral status */ 149 HAL_LockTypeDef Lock; /*!< Locking object */ 150 __IO HAL_OPAMP_StateTypeDef State; /*!< OPAMP communication state */ 151 152 #if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1) 153 void (* MspInitCallback)(struct __OPAMP_HandleTypeDef *hopamp); 154 void (* MspDeInitCallback)(struct __OPAMP_HandleTypeDef *hopamp); 155 #endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */ 156 157 } OPAMP_HandleTypeDef; 158 159 /** 160 * @brief OPAMP_TrimmingValueTypeDef definition 161 */ 162 163 typedef uint32_t OPAMP_TrimmingValueTypeDef; 164 /** 165 * @} 166 */ 167 168 #if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1) 169 /** 170 * @brief HAL OPAMP Callback ID enumeration definition 171 */ 172 typedef enum 173 { 174 HAL_OPAMP_MSPINIT_CB_ID = 0x01UL, /*!< OPAMP MspInit Callback ID */ 175 HAL_OPAMP_MSPDEINIT_CB_ID = 0x02UL, /*!< OPAMP MspDeInit Callback ID */ 176 HAL_OPAMP_ALL_CB_ID = 0x03UL /*!< OPAMP All ID */ 177 } HAL_OPAMP_CallbackIDTypeDef; 178 179 /** 180 * @brief HAL OPAMP Callback pointer definition 181 */ 182 typedef void (*pOPAMP_CallbackTypeDef)(OPAMP_HandleTypeDef *hopamp); 183 #endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */ 184 185 186 /* Exported constants --------------------------------------------------------*/ 187 /** @defgroup OPAMP_Exported_Constants OPAMP Exported Constants 188 * @{ 189 */ 190 /** @defgroup OPAMP_Mode OPAMP Mode 191 * @{ 192 */ 193 #define OPAMP_STANDALONE_MODE (0x00000000UL) /*!< standalone mode */ 194 #define OPAMP_PGA_MODE OPAMP_CSR_VMSEL_1 /*!< PGA mode */ 195 #define OPAMP_FOLLOWER_MODE OPAMP_CSR_VMSEL /*!< follower mode */ 196 /** 197 * @} 198 */ 199 200 /** @defgroup OPAMP_NonInvertingInput OPAMP Non Inverting Input 201 * @{ 202 */ 203 #define OPAMP_NONINVERTINGINPUT_IO0 (0x00000000UL) /*!< Non inverting input connected to I/O VINP0 204 (PA1 for OPAMP1, PA7 for OPAMP2, PB0 for OPAMP3, PB13 for OPAMP4, PB14 for OPAMP5, PB12 for OPAMP6) 205 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 206 #define OPAMP_NONINVERTINGINPUT_IO1 OPAMP_CSR_VPSEL_0 /*!< Non inverting input connected to I/O VINP1 207 (PA3 for OPAMP1, PB14 for OPAMP2, PB13 for OPAMP3, PD11 for OPAMP4, PD12 for OPAMP5, PD9 for OPAMP6) 208 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 209 #define OPAMP_NONINVERTINGINPUT_IO2 OPAMP_CSR_VPSEL_1 /*!< Non inverting input connected to I/O VINP2 210 (PA7 for OPAMP1, PB0 for OPAMP2, PA1 for OPAMP3, PB11 for OPAMP4, PC3 for OPAMP5, PB13 for OPAMP6) 211 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 212 #define OPAMP_NONINVERTINGINPUT_IO3 OPAMP_CSR_VPSEL /*!< Non inverting input connected to I/O VINP3 213 (PD14 for OPAMP2) */ 214 #define OPAMP_NONINVERTINGINPUT_DAC OPAMP_CSR_VPSEL /*!< Non inverting input connected internally to DAC channel 215 (DAC3_CH1 for OPAMP1, DAC3_CH2 for OPAMP3, DAC4_CH1 for OPAMP4, DAC4_CH2 for OPAMP5, DAC3_CH1 for OPAMP6) 216 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 217 /** 218 * @} 219 */ 220 221 /** @defgroup OPAMP_InvertingInput OPAMP Inverting Input 222 * @{ 223 */ 224 #define OPAMP_INVERTINGINPUT_IO0 (0x00000000UL) /*!< Inverting input connected to I/O VINM0 225 (PA3 for OPAMP1, PA5 for OPAMP2, PB2 for OPAMP3, PB10 for OPAMP4, PB15 for OPAMP5, PA1 for OPAMP6) 226 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 227 #define OPAMP_INVERTINGINPUT_IO1 OPAMP_CSR_VMSEL_0 /*!< Inverting input connected to I/0 VINM1 228 (PC5 for OPAMP1, PC5 for OPAMP2, PB10 for OPAMP3, PB8 for OPAMP4, PA3 for OPAMP5, PB1 for OPAMP6) 229 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 230 /** 231 * @} 232 */ 233 234 /** @defgroup OPAMP_TimerControlledMuxmode OPAMP Timer Controlled Mux mode 235 * @note The switch can be controlled either by a single timer or a combination of them, 236 * in this case application has to 'ORed' the values below 237 * ex OPAMP_TIMERCONTROLLEDMUXMODE_TIM1_CH6 | OPAMP_TIMERCONTROLLEDMUXMODE_TIM20_CH6 238 * @{ 239 */ 240 #define OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE (0x00000000UL) /*!< Timer controlled Mux mode disabled */ 241 #define OPAMP_TIMERCONTROLLEDMUXMODE_TIM1_CH6 OPAMP_TCMR_T1CMEN /*!< Timer controlled Mux mode enabled using TIM1 OC6 */ 242 #define OPAMP_TIMERCONTROLLEDMUXMODE_TIM8_CH6 OPAMP_TCMR_T8CMEN /*!< Timer controlled Mux mode enabled using TIM8 OC6 */ 243 #if defined(TIM20) 244 #define OPAMP_TIMERCONTROLLEDMUXMODE_TIM20_CH6 OPAMP_TCMR_T20CMEN /*!< Timer controlled Mux mode enabled using TIM20 OC6 245 Note: On this STM32 series, TIM20 is not available on all devices. Refer to device datasheet for more details */ 246 #endif 247 /** 248 * @} 249 */ 250 251 /** @defgroup OPAMP_NonInvertingInputSecondary OPAMP Non Inverting Input Secondary 252 * @{ 253 */ 254 #define OPAMP_SEC_NONINVERTINGINPUT_IO0 (0x00000000UL) /*!< Secondary non inverting input connected to I/O VINP0 255 (PA1 for OPAMP1, PA7 for OPAMP2, PB0 for OPAMP3, PB13 for OPAMP4, PB14 for OPAMP5, PB12 for OPAMP6) 256 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 257 #define OPAMP_SEC_NONINVERTINGINPUT_IO1 OPAMP_TCMR_VPSSEL_0 /*!< Secondary non inverting input connected to I/O VINP1 258 (PA3 for OPAMP1, PB14 for OPAMP2, PB13 for OPAMP3, PD11 for OPAMP4, PD12 for OPAMP5, PD9 for OPAMP6) 259 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 260 #define OPAMP_SEC_NONINVERTINGINPUT_IO2 OPAMP_TCMR_VPSSEL_1 /*!< Secondary non inverting input connected to I/O VINP2 261 (PA7 for OPAMP1, PB0 for OPAMP2, PA1 for OPAMP3, PB11 for OPAMP4, PC3 for OPAMP5, PB13 for OPAMP6) 262 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 263 #define OPAMP_SEC_NONINVERTINGINPUT_IO3 OPAMP_TCMR_VPSSEL /*!< Secondary non inverting input connected to I/O VINP3 264 (PD14 for OPAMP2) */ 265 #define OPAMP_SEC_NONINVERTINGINPUT_DAC OPAMP_TCMR_VPSSEL /*!< Secondary non inverting input connected internally to DAC channel 266 (DAC3_CH1 for OPAMP1, DAC3_CH2 for OPAMP3, DAC4_CH1 for OPAMP4, DAC4_CH2 for OPAMP5, DAC3_CH1 for OPAMP6) 267 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 268 /** 269 * @} 270 */ 271 272 /** @defgroup OPAMP_InvertingInputSecondary OPAMP Inverting Input Secondary 273 * @{ 274 */ 275 #define OPAMP_SEC_INVERTINGINPUT_IO0 (0x00000000UL) /*!< OPAMP secondary mode is standalone mode - Only applicable if @ref OPAMP_STANDALONE_MODE 276 has been configured by call to @ref HAL_OPAMP_Init(). 277 Secondary inverting input connected to I/O VINM0 278 (PA3 for OPAMP1, PA5 for OPAMP2, PB2 for OPAMP3, PB10 for OPAMP4, PB15 for OPAMP5, PA1 for OPAMP6) 279 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 280 #define OPAMP_SEC_INVERTINGINPUT_IO1 OPAMP_TCMR_VMSSEL /*!< OPAMP secondary mode is standalone mode - Only applicable if @ref OPAMP_STANDALONE_MODE 281 has been configured by call to @ref HAL_OPAMP_Init(). 282 Secondary inverting input connected to I/0 VINM1 283 (PC5 for OPAMP1, PC5 for OPAMP2, PB10 for OPAMP3, PB8 for OPAMP4, PA3 for OPAMP5, PB1 for OPAMP6) 284 Note: On this STM32 series, all OPAMPx are not available on all devices. Refer to device datasheet for more details */ 285 #define OPAMP_SEC_INVERTINGINPUT_PGA (0x00000000UL) /*!< OPAMP secondary mode is PGA mode - Only applicable if configured mode through call to @ref HAL_OPAMP_Init() 286 is @ref OPAMP_PGA_MODE or @ref OPAMP_FOLLOWER_MODE. 287 OPAMP secondary inverting input is: 288 - Not connected if configured mode is @ref OPAMP_FOLLOWER_MODE 289 - Not connected if configured mode is @ref OPAMP_PGA_MODE and PGA connect mode is @ref OPAMP_PGA_CONNECT_INVERTINGINPUT_NO 290 - Connected to VINM0 and possibly VINM1 if any of the other modes as been configured 291 (see @ref OPAMP_PgaConnect description for more details on PGA connection modes) */ 292 #define OPAMP_SEC_INVERTINGINPUT_FOLLOWER OPAMP_TCMR_VMSSEL /*!< OPAMP secondary mode is Follower mode - Only applicable if configured mode through call to @ref HAL_OPAMP_Init() 293 is @ref OPAMP_PGA_MODE or @ref OPAMP_FOLLOWER_MODE. 294 OPAMP secondary inverting input is not connected. */ 295 /** 296 * @} 297 */ 298 299 /** @defgroup OPAMP_PgaConnect OPAMP Pga Connect 300 * @{ 301 */ 302 #define OPAMP_PGA_CONNECT_INVERTINGINPUT_NO (0x00000000UL) /*!< In PGA mode, the inverting input is not connected */ 303 #define OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0 OPAMP_CSR_PGGAIN_4 /*!< In PGA mode, the inverting input is connected to VINM0 for filtering */ 304 #define OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_BIAS OPAMP_CSR_PGGAIN_3 /*!< In PGA mode, the inverting input is connected to VINM0 305 - Input signal on VINM0, bias on VINPx: negative gain 306 - Bias on VINM0, input signal on VINPx: positive gain */ 307 #define OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_IO1_BIAS (OPAMP_CSR_PGGAIN_4|OPAMP_CSR_PGGAIN_3) /*!< In PGA mode, the inverting input is connected to VINM0 308 - Input signal on VINM0, bias on VINPx: negative gain 309 - Bias on VINM0, input signal on VINPx: positive gain 310 And VINM1 is connected too for filtering */ 311 /** 312 * @} 313 */ 314 315 /** @defgroup OPAMP_PgaGain OPAMP Pga Gain 316 * @note Gain sign: 317 * - is positive if the @ref OPAMP_PgaConnect configuration is 318 * @ref OPAMP_PGA_CONNECT_INVERTINGINPUT_NO or OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0 319 * - may be positive or negative if the @ref OPAMP_PgaConnect configuration is 320 * @ref OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_BIAS or OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_IO1_BIAS 321 * see @ref OPAMP_PgaConnect for more details 322 * @{ 323 */ 324 #define OPAMP_PGA_GAIN_2_OR_MINUS_1 (0x00000000UL) /*!< PGA gain could be 2 or -1 */ 325 #define OPAMP_PGA_GAIN_4_OR_MINUS_3 ( OPAMP_CSR_PGGAIN_0) /*!< PGA gain could be 4 or -3 */ 326 #define OPAMP_PGA_GAIN_8_OR_MINUS_7 ( OPAMP_CSR_PGGAIN_1 ) /*!< PGA gain could be 8 or -7 */ 327 #define OPAMP_PGA_GAIN_16_OR_MINUS_15 ( OPAMP_CSR_PGGAIN_1 | OPAMP_CSR_PGGAIN_0) /*!< PGA gain could be 16 or -15 */ 328 #define OPAMP_PGA_GAIN_32_OR_MINUS_31 (OPAMP_CSR_PGGAIN_2 ) /*!< PGA gain could be 32 or -31 */ 329 #define OPAMP_PGA_GAIN_64_OR_MINUS_63 (OPAMP_CSR_PGGAIN_2 | OPAMP_CSR_PGGAIN_0) /*!< PGA gain could be 64 or -63 */ 330 /** 331 * @} 332 */ 333 334 /** @defgroup OPAMP_PowerMode OPAMP PowerMode 335 * @{ 336 */ 337 #define OPAMP_POWERMODE_NORMALSPEED (0x00000000UL) /*!< Output in normal mode */ 338 #define OPAMP_POWERMODE_HIGHSPEED OPAMP_CSR_HIGHSPEEDEN /*!< Output in highspeed mode */ 339 /** 340 * @} 341 */ 342 343 /** @defgroup OPAMP_UserTrimming OPAMP User Trimming 344 * @{ 345 */ 346 #define OPAMP_TRIMMING_FACTORY (0x00000000UL) /*!< Factory trimming */ 347 #define OPAMP_TRIMMING_USER OPAMP_CSR_USERTRIM /*!< User trimming */ 348 /** 349 * @} 350 */ 351 352 /** @defgroup OPAMP_FactoryTrimming OPAMP Factory Trimming 353 * @{ 354 */ 355 #define OPAMP_FACTORYTRIMMING_DUMMY (0xFFFFFFFFUL) /*!< Dummy trimming value */ 356 357 #define OPAMP_FACTORYTRIMMING_N (0x00000000UL) /*!< Offset trimming N */ 358 #define OPAMP_FACTORYTRIMMING_P (0x00000001UL) /*!< Offset trimming P */ 359 /** 360 * @} 361 */ 362 363 /** @defgroup OPAMP_VREF OPAMP VREF 364 * @{ 365 */ 366 #define OPAMP_VREF_3VDDA (0x00000000UL) /*!< OPAMP Vref = 3.3% VDDA */ 367 #define OPAMP_VREF_10VDDA OPAMP_CSR_CALSEL_0 /*!< OPAMP Vref = 10% VDDA */ 368 #define OPAMP_VREF_50VDDA OPAMP_CSR_CALSEL_1 /*!< OPAMP Vref = 50% VDDA */ 369 #define OPAMP_VREF_90VDDA OPAMP_CSR_CALSEL /*!< OPAMP Vref = 90% VDDA */ 370 /** 371 * @} 372 */ 373 374 /** 375 * @} 376 */ 377 378 379 /* Private constants ---------------------------------------------------------*/ 380 /** @defgroup OPAMP_Private_Constants OPAMP Private Constants 381 * @brief OPAMP Private constants and defines 382 * @{ 383 */ 384 /** @defgroup OPAMP_Input OPAMP Input 385 * @{ 386 */ 387 #define OPAMP_INPUT_INVERTING ( 24UL) /*!< Inverting input */ 388 #define OPAMP_INPUT_NONINVERTING ( 19UL) /*!< Non inverting input */ 389 390 #define IS_OPAMP_INPUT(INPUT) (((INPUT) == OPAMP_INPUT_INVERTING) || \ 391 ((INPUT) == OPAMP_INPUT_NONINVERTING)) 392 /** 393 * @} 394 */ 395 396 /** 397 * @} 398 */ 399 400 401 /* Private macro -------------------------------------------------------------*/ 402 403 /** @defgroup OPAMP_Private_Macros OPAMP Private Macros 404 * @{ 405 */ 406 407 #define IS_OPAMP_FUNCTIONAL_NORMALMODE(INPUT) (((INPUT) == OPAMP_STANDALONE_MODE) || \ 408 ((INPUT) == OPAMP_PGA_MODE) || \ 409 ((INPUT) == OPAMP_FOLLOWER_MODE)) 410 411 #define IS_OPAMP_NONINVERTING_INPUT(INPUT) (((INPUT) == OPAMP_NONINVERTINGINPUT_IO0) || \ 412 ((INPUT) == OPAMP_NONINVERTINGINPUT_IO1) || \ 413 ((INPUT) == OPAMP_NONINVERTINGINPUT_IO2) || \ 414 ((INPUT) == OPAMP_NONINVERTINGINPUT_IO3) || \ 415 ((INPUT) == OPAMP_NONINVERTINGINPUT_DAC)) 416 417 #define IS_OPAMP_INVERTING_INPUT(INPUT) (((INPUT) == OPAMP_INVERTINGINPUT_IO0) || \ 418 ((INPUT) == OPAMP_INVERTINGINPUT_IO1)) 419 420 #if defined(TIM20) 421 #define IS_OPAMP_TIMERCONTROLLED_MUXMODE(MUXMODE) \ 422 ((MUXMODE) <= (OPAMP_TIMERCONTROLLEDMUXMODE_TIM1_CH6 | \ 423 OPAMP_TIMERCONTROLLEDMUXMODE_TIM8_CH6 | \ 424 OPAMP_TIMERCONTROLLEDMUXMODE_TIM20_CH6)) 425 #else 426 #define IS_OPAMP_TIMERCONTROLLED_MUXMODE(MUXMODE) \ 427 ((MUXMODE) <= (OPAMP_TIMERCONTROLLEDMUXMODE_TIM1_CH6 | \ 428 OPAMP_TIMERCONTROLLEDMUXMODE_TIM8_CH6)) 429 #endif 430 431 #define IS_OPAMP_SEC_NONINVERTING_INPUT(INPUT) (((INPUT) == OPAMP_SEC_NONINVERTINGINPUT_IO0) || \ 432 ((INPUT) == OPAMP_SEC_NONINVERTINGINPUT_IO1) || \ 433 ((INPUT) == OPAMP_SEC_NONINVERTINGINPUT_IO2) || \ 434 ((INPUT) == OPAMP_SEC_NONINVERTINGINPUT_IO3) || \ 435 ((INPUT) == OPAMP_SEC_NONINVERTINGINPUT_DAC)) 436 437 #define IS_OPAMP_SEC_INVERTING_INPUT(INPUT) (((INPUT) == OPAMP_SEC_INVERTINGINPUT_IO0) || \ 438 ((INPUT) == OPAMP_SEC_INVERTINGINPUT_IO1) || \ 439 ((INPUT) == OPAMP_SEC_INVERTINGINPUT_PGA) || \ 440 ((INPUT) == OPAMP_SEC_INVERTINGINPUT_FOLLOWER)) 441 442 #define IS_OPAMP_PGACONNECT(CONNECT) (((CONNECT) == OPAMP_PGA_CONNECT_INVERTINGINPUT_NO) || \ 443 ((CONNECT) == OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0) || \ 444 ((CONNECT) == OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_BIAS) || \ 445 ((CONNECT) == OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_IO1_BIAS)) 446 447 #define IS_OPAMP_PGA_GAIN(GAIN) (((GAIN) == OPAMP_PGA_GAIN_2_OR_MINUS_1) || \ 448 ((GAIN) == OPAMP_PGA_GAIN_4_OR_MINUS_3) || \ 449 ((GAIN) == OPAMP_PGA_GAIN_8_OR_MINUS_7) || \ 450 ((GAIN) == OPAMP_PGA_GAIN_16_OR_MINUS_15) || \ 451 ((GAIN) == OPAMP_PGA_GAIN_32_OR_MINUS_31) || \ 452 ((GAIN) == OPAMP_PGA_GAIN_64_OR_MINUS_63)) 453 454 #define IS_OPAMP_POWERMODE(POWERMODE) (((POWERMODE) == OPAMP_POWERMODE_NORMALSPEED) || \ 455 ((POWERMODE) == OPAMP_POWERMODE_HIGHSPEED) ) 456 457 #define IS_OPAMP_TRIMMING(TRIMMING) (((TRIMMING) == OPAMP_TRIMMING_FACTORY) || \ 458 ((TRIMMING) == OPAMP_TRIMMING_USER)) 459 460 #define IS_OPAMP_FACTORYTRIMMING(TRIMMING) (((TRIMMING) == OPAMP_FACTORYTRIMMING_N) || \ 461 ((TRIMMING) == OPAMP_FACTORYTRIMMING_P)) 462 463 #define IS_OPAMP_TRIMMINGVALUE(TRIMMINGVALUE) ((TRIMMINGVALUE) <= 0x1FUL) 464 465 #define IS_OPAMP_VREF(VREF) (((VREF) == OPAMP_VREF_3VDDA) || \ 466 ((VREF) == OPAMP_VREF_10VDDA) || \ 467 ((VREF) == OPAMP_VREF_50VDDA) || \ 468 ((VREF) == OPAMP_VREF_90VDDA)) 469 /** 470 * @} 471 */ 472 473 474 /* Exported macros -----------------------------------------------------------*/ 475 /** @defgroup OPAMP_Exported_Macros OPAMP Exported Macros 476 * @{ 477 */ 478 479 /** @brief Reset OPAMP handle state 480 * @param __HANDLE__ OPAMP handle. 481 * @retval None 482 */ 483 #define __HAL_OPAMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_OPAMP_STATE_RESET) 484 485 /** 486 * @} 487 */ 488 489 /* Include OPAMP HAL Extended module */ 490 #include "stm32g4xx_hal_opamp_ex.h" 491 492 /* Exported functions --------------------------------------------------------*/ 493 /** @defgroup OPAMP_Exported_Functions OPAMP Exported Functions 494 * @{ 495 */ 496 497 /** @defgroup OPAMP_Exported_Functions_Group1 Initialization and de-initialization functions 498 * @{ 499 */ 500 501 /* Initialization/de-initialization functions **********************************/ 502 HAL_StatusTypeDef HAL_OPAMP_Init(OPAMP_HandleTypeDef *hopamp); 503 HAL_StatusTypeDef HAL_OPAMP_DeInit(OPAMP_HandleTypeDef *hopamp); 504 void HAL_OPAMP_MspInit(OPAMP_HandleTypeDef *hopamp); 505 void HAL_OPAMP_MspDeInit(OPAMP_HandleTypeDef *hopamp); 506 /** 507 * @} 508 */ 509 510 511 /** @defgroup OPAMP_Exported_Functions_Group2 Input and Output operation functions 512 * @{ 513 */ 514 515 /* I/O operation functions *****************************************************/ 516 HAL_StatusTypeDef HAL_OPAMP_Start(OPAMP_HandleTypeDef *hopamp); 517 HAL_StatusTypeDef HAL_OPAMP_Stop(OPAMP_HandleTypeDef *hopamp); 518 HAL_StatusTypeDef HAL_OPAMP_SelfCalibrate(OPAMP_HandleTypeDef *hopamp); 519 520 /** 521 * @} 522 */ 523 524 /** @defgroup OPAMP_Exported_Functions_Group3 Peripheral Control functions 525 * @{ 526 */ 527 528 /* Peripheral Control functions ************************************************/ 529 #if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1) 530 /* OPAMP callback registering/unregistering */ 531 HAL_StatusTypeDef HAL_OPAMP_RegisterCallback(OPAMP_HandleTypeDef *hopamp, HAL_OPAMP_CallbackIDTypeDef CallbackId, 532 pOPAMP_CallbackTypeDef pCallback); 533 HAL_StatusTypeDef HAL_OPAMP_UnRegisterCallback(OPAMP_HandleTypeDef *hopamp, HAL_OPAMP_CallbackIDTypeDef CallbackId); 534 #endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */ 535 536 HAL_StatusTypeDef HAL_OPAMP_Lock(OPAMP_HandleTypeDef *hopamp); 537 HAL_StatusTypeDef HAL_OPAMP_LockTimerMux(OPAMP_HandleTypeDef *hopamp); 538 539 /** 540 * @} 541 */ 542 543 /** @defgroup OPAMP_Exported_Functions_Group4 Peripheral State functions 544 * @{ 545 */ 546 547 /* Peripheral State functions **************************************************/ 548 HAL_OPAMP_StateTypeDef HAL_OPAMP_GetState(OPAMP_HandleTypeDef *hopamp); 549 OPAMP_TrimmingValueTypeDef HAL_OPAMP_GetTrimOffset(OPAMP_HandleTypeDef *hopamp, uint32_t trimmingoffset); 550 551 /** 552 * @} 553 */ 554 555 /** 556 * @} 557 */ 558 559 /** 560 * @} 561 */ 562 563 /** 564 * @} 565 */ 566 567 568 #ifdef __cplusplus 569 } 570 #endif 571 572 #endif /* STM32G4xx_HAL_OPAMP_H */ 573 574
