1 /** 2 ****************************************************************************** 3 * @file stm32u5xx_hal_rng_ex.h 4 * @author MCD Application Team 5 * @brief Header file of RNG HAL Extension module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2021 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32U5xx_HAL_RNG_EX_H 21 #define STM32U5xx_HAL_RNG_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32u5xx_hal_def.h" 29 30 /** @addtogroup STM32U5xx_HAL_Driver 31 * @{ 32 */ 33 34 #if defined(RNG) 35 #if defined(RNG_CR_CONDRST) 36 37 /** @defgroup RNGEx RNGEx 38 * @brief RNG Extension HAL module driver 39 * @{ 40 */ 41 42 /* Exported types ------------------------------------------------------------*/ 43 /** @defgroup RNGEx_Exported_Types RNGEx Exported Types 44 * @brief RNGEx Exported types 45 * @{ 46 */ 47 48 /** 49 * @brief RNGEx Configuration Structure definition 50 */ 51 52 typedef struct 53 { 54 uint32_t Config1; /*!< Config1 must be a value between 0 and 0x3F */ 55 uint32_t Config2; /*!< Config2 must be a value between 0 and 0x7 */ 56 uint32_t Config3; /*!< Config3 must be a value between 0 and 0xF */ 57 uint32_t ClockDivider; /*!< Clock Divider factor.This parameter can 58 be a value of @ref RNGEx_Clock_Divider_Factor */ 59 uint32_t NistCompliance; /*!< NIST compliance.This parameter can be a 60 value of @ref RNGEx_NIST_Compliance */ 61 uint32_t AutoReset; /*!< automatic reset When a noise source error occurs 62 value of @ref RNGEx_Auto_Reset */ 63 uint32_t HealthTest; /*!< RNG health test control must be a value 64 between 0x0FFCABFF and 0x00005200 */ 65 uint32_t NoiseSource; /*!< RNG noise source control(Oscillator Enable signals) 66 must be a value between 0x0 and 0x0003FFFF */ 67 } RNG_ConfigTypeDef; 68 69 /** 70 * @} 71 */ 72 73 /* Exported constants --------------------------------------------------------*/ 74 /** @defgroup RNGEx_Exported_Constants RNGEx Exported Constants 75 * @{ 76 */ 77 78 /** @defgroup RNGEx_Clock_Divider_Factor Value used to configure an internal 79 * programmable divider acting on the incoming RNG clock 80 * @{ 81 */ 82 #define RNG_CLKDIV_BY_1 (0x00000000UL) /*!< No clock division */ 83 #define RNG_CLKDIV_BY_2 (RNG_CR_CLKDIV_0) 84 /*!< 2 RNG clock cycles per internal RNG clock */ 85 #define RNG_CLKDIV_BY_4 (RNG_CR_CLKDIV_1) 86 /*!< 4 RNG clock cycles per internal RNG clock */ 87 #define RNG_CLKDIV_BY_8 (RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0) 88 /*!< 8 RNG clock cycles per internal RNG clock */ 89 #define RNG_CLKDIV_BY_16 (RNG_CR_CLKDIV_2) 90 /*!< 16 RNG clock cycles per internal RNG clock */ 91 #define RNG_CLKDIV_BY_32 (RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_0) 92 /*!< 32 RNG clock cycles per internal RNG clock */ 93 #define RNG_CLKDIV_BY_64 (RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1) 94 /*!< 64 RNG clock cycles per internal RNG clock */ 95 #define RNG_CLKDIV_BY_128 (RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0) 96 /*!< 128 RNG clock cycles per internal RNG clock */ 97 #define RNG_CLKDIV_BY_256 (RNG_CR_CLKDIV_3) 98 /*!< 256 RNG clock cycles per internal RNG clock */ 99 #define RNG_CLKDIV_BY_512 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_0) 100 /*!< 512 RNG clock cycles per internal RNG clock */ 101 #define RNG_CLKDIV_BY_1024 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_1) 102 /*!< 1024 RNG clock cycles per internal RNG clock */ 103 #define RNG_CLKDIV_BY_2048 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0) 104 /*!< 2048 RNG clock cycles per internal RNG clock */ 105 #define RNG_CLKDIV_BY_4096 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2) 106 /*!< 4096 RNG clock cycles per internal RNG clock */ 107 #define RNG_CLKDIV_BY_8192 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_0) 108 /*!< 8192 RNG clock cycles per internal RNG clock */ 109 #define RNG_CLKDIV_BY_16384 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1) 110 /*!< 16384 RNG clock cycles per internal RNG clock */ 111 #define RNG_CLKDIV_BY_32768 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0) 112 /*!< 32768 RNG clock cycles per internal RNG clock */ 113 /** 114 * @} 115 */ 116 117 /** @defgroup RNGEx_NIST_Compliance NIST Compliance configuration 118 * @{ 119 */ 120 #define RNG_NIST_COMPLIANT (0x00000000UL) /*!< NIST compliant configuration*/ 121 #define RNG_CUSTOM_NIST (RNG_CR_NISTC) /*!< Custom NIST configuration */ 122 123 /** 124 * @} 125 */ 126 /** @defgroup RNGEx_Auto_Reset Auto Reset configuration 127 * @{ 128 */ 129 #define RNG_ARDIS_ENABLE (0x00000000UL) /*!< automatic reset after seed error*/ 130 #define RNG_ARDIS_DISABLE (RNG_CR_ARDIS) /*!< Disable automatic reset after seed error */ 131 132 /** 133 * @} 134 */ 135 136 /** 137 * @} 138 */ 139 140 /* Private types -------------------------------------------------------------*/ 141 /** @defgroup RNGEx_Private_Types RNGEx Private Types 142 * @{ 143 */ 144 145 /** 146 * @} 147 */ 148 149 /* Private variables ---------------------------------------------------------*/ 150 /** @defgroup RNGEx_Private_Variables RNGEx Private Variables 151 * @{ 152 */ 153 154 /** 155 * @} 156 */ 157 158 /* Private constants ---------------------------------------------------------*/ 159 /** @defgroup RNGEx_Private_Constants RNGEx Private Constants 160 * @{ 161 */ 162 163 /** 164 * @} 165 */ 166 167 /* Private macros ------------------------------------------------------------*/ 168 /** @defgroup RNGEx_Private_Macros RNGEx Private Macros 169 * @{ 170 */ 171 172 #define IS_RNG_CLOCK_DIVIDER(__CLOCK_DIV__) (((__CLOCK_DIV__) == RNG_CLKDIV_BY_1) || \ 173 ((__CLOCK_DIV__) == RNG_CLKDIV_BY_2) || \ 174 ((__CLOCK_DIV__) == RNG_CLKDIV_BY_4) || \ 175 ((__CLOCK_DIV__) == RNG_CLKDIV_BY_8) || \ 176 ((__CLOCK_DIV__) == RNG_CLKDIV_BY_16) || \ 177 ((__CLOCK_DIV__) == RNG_CLKDIV_BY_32) || \ 178 ((__CLOCK_DIV__) == RNG_CLKDIV_BY_64) || \ 179 ((__CLOCK_DIV__) == RNG_CLKDIV_BY_128) || \ 180 ((__CLOCK_DIV__) == RNG_CLKDIV_BY_256) || \ 181 ((__CLOCK_DIV__) == RNG_CLKDIV_BY_512) || \ 182 ((__CLOCK_DIV__) == RNG_CLKDIV_BY_1024) || \ 183 ((__CLOCK_DIV__) == RNG_CLKDIV_BY_2048) || \ 184 ((__CLOCK_DIV__) == RNG_CLKDIV_BY_4096) || \ 185 ((__CLOCK_DIV__) == RNG_CLKDIV_BY_8192) || \ 186 ((__CLOCK_DIV__) == RNG_CLKDIV_BY_16384) || \ 187 ((__CLOCK_DIV__) == RNG_CLKDIV_BY_32768)) 188 189 190 #define IS_RNG_NIST_COMPLIANCE(__NIST_COMPLIANCE__) (((__NIST_COMPLIANCE__) == RNG_NIST_COMPLIANT) || \ 191 ((__NIST_COMPLIANCE__) == RNG_CUSTOM_NIST)) 192 193 #define IS_RNG_CONFIG1(__CONFIG1__) ((__CONFIG1__) <= 0x3FUL) 194 195 #define IS_RNG_CONFIG2(__CONFIG2__) ((__CONFIG2__) <= 0x07UL) 196 197 #define IS_RNG_CONFIG3(__CONFIG3__) ((__CONFIG3__) <= 0xFUL) 198 #define IS_RNG_ARDIS(__ARDIS__) (((__ARDIS__) == RNG_ARDIS_ENABLE) || \ 199 ((__ARDIS__) == RNG_ARDIS_DISABLE)) 200 201 202 /** 203 * @} 204 */ 205 206 /* Private functions ---------------------------------------------------------*/ 207 /** @defgroup RNGEx_Private_Functions RNGEx Private Functions 208 * @{ 209 */ 210 211 /** 212 * @} 213 */ 214 215 /* Exported functions --------------------------------------------------------*/ 216 /** @addtogroup RNGEx_Exported_Functions 217 * @{ 218 */ 219 220 /** @addtogroup RNGEx_Exported_Functions_Group1 221 * @{ 222 */ 223 HAL_StatusTypeDef HAL_RNGEx_SetConfig(RNG_HandleTypeDef *hrng, const RNG_ConfigTypeDef *pConf); 224 HAL_StatusTypeDef HAL_RNGEx_GetConfig(RNG_HandleTypeDef *hrng, RNG_ConfigTypeDef *pConf); 225 HAL_StatusTypeDef HAL_RNGEx_LockConfig(RNG_HandleTypeDef *hrng); 226 227 /** 228 * @} 229 */ 230 231 /** @addtogroup RNGEx_Exported_Functions_Group2 232 * @{ 233 */ 234 HAL_StatusTypeDef HAL_RNGEx_RecoverSeedError(RNG_HandleTypeDef *hrng); 235 236 /** 237 * @} 238 */ 239 240 /** 241 * @} 242 */ 243 244 /** 245 * @} 246 */ 247 248 /** 249 * @} 250 */ 251 252 #endif /* RNG_CR_CONDRST */ 253 #endif /* RNG */ 254 255 /** 256 * @} 257 */ 258 259 #ifdef __cplusplus 260 } 261 #endif 262 263 264 #endif /* STM32U5xx_HAL_RNG_EX_H */ 265
