1 /*
2  * Copyright 2023 NXP
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_NXP_S32_GPIO_H_
7 #define ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_NXP_S32_GPIO_H_
8 
9 /**
10  * @brief NXP S32 GPIO specific flags
11  *
12  * The driver flags are encoded in the 8 upper bits of @ref gpio_dt_flags_t as
13  * follows:
14  *
15  * - Bit 8: Interrupt controller to which the respective GPIO interrupt is routed.
16  *
17  * @ingroup gpio_interface
18  * @{
19  */
20 
21 /** @cond INTERNAL_HIDDEN */
22 #define NXP_S32_GPIO_INT_CONTROLLER_POS		8
23 #define NXP_S32_GPIO_INT_CONTROLLER_MASK	(0x1U << NXP_S32_GPIO_INT_CONTROLLER_POS)
24 /** @endcond */
25 
26 /**
27  * @name NXP S32 GPIO interrupt controller routing flags
28  * @brief NXP S32 GPIO interrupt controller routing flags
29  * @{
30  */
31 
32 /** Interrupt routed to the WKPU controller */
33 #define NXP_S32_GPIO_INT_WKPU	(0x1U << NXP_S32_GPIO_INT_CONTROLLER_POS)
34 
35 /** @} */
36 
37 /** @} */
38 
39 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_NXP_S32_GPIO_H_ */
40