1 /*
2 * Copyright (c) 2020 - 2023, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice, this
11 * list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived from this
19 * software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef NRF_COMMON_H__
35 #define NRF_COMMON_H__
36
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40
41 #ifndef NRFX_EVENT_READBACK_ENABLED
42 #define NRFX_EVENT_READBACK_ENABLED 1
43 #endif
44
45 #ifndef NRFX_CONFIG_API_VER_MAJOR
46 #define NRFX_CONFIG_API_VER_MAJOR 3
47 #endif
48
49 #ifndef NRFX_CONFIG_API_VER_MINOR
50 #define NRFX_CONFIG_API_VER_MINOR 1
51 #endif
52
53 #ifndef NRFX_CONFIG_API_VER_MICRO
54 #define NRFX_CONFIG_API_VER_MICRO 0
55 #endif
56
57 #if defined(ISA_RISCV)
58 #define RISCV_FENCE(p, s) __asm__ __volatile__ ("fence " #p "," #s : : : "memory")
59 #endif
60
61 #if defined(DPPI_PRESENT)
62 #ifndef NRF_SUBSCRIBE_PUBLISH_ENABLE
63 #define NRF_SUBSCRIBE_PUBLISH_ENABLE (0x01UL << 31UL)
64 #endif
65 #if defined(NRF_RADIO)
66 #define NRF_SUBSCRIBE_PUBLISH_OFFSET_RADIO \
67 (NRFX_OFFSETOF(NRF_RADIO_Type, SUBSCRIBE_TXEN) - NRFX_OFFSETOF(NRF_RADIO_Type, TASKS_TXEN))
68 #define NRF_SUBSCRIBE_PUBLISH_OFFSET(task_or_event) \
69 ((NRFX_IN_RANGE(task_or_event, (uint32_t)NRF_RADIO, \
70 (uint32_t)NRF_RADIO + sizeof(NRF_RADIO_Type))) ? \
71 (NRF_SUBSCRIBE_PUBLISH_OFFSET_RADIO) : \
72 (0x80uL))
73 #else
74 #define NRF_SUBSCRIBE_PUBLISH_OFFSET(task_or_event) 0x80uL
75 #endif // defined(NRF_RADIO)
76 #endif // defined(DPPI_PRESENT)
77
78 #if !defined(NRFY_CACHE_WB)
79 #define NRFY_CACHE_WB(p_buffer, size)
80 #endif
81
82 #if !defined(NRFY_CACHE_INV)
83 #define NRFY_CACHE_INV(p_buffer, size)
84 #endif
85
86 #if !defined(NRFY_CACHE_WBINV)
87 #define NRFY_CACHE_WBINV(p_buffer, size)
88 #endif
89
90 #if defined(NRFX_CLZ)
91 #define NRF_CLZ(value) NRFX_CLZ(value)
92 #elif defined(ISA_ARM)
93 #define NRF_CLZ(value) __CLZ(value)
94 #else
95 #define NRF_CLZ(value) __builtin_clz(value)
96 #endif
97
98 #if defined(NRFX_CTZ)
99 #define NRF_CTZ(value) NRFX_CTZ(value)
100 #elif defined(ISA_ARM)
101 #define NRF_CTZ(value) __CLZ(__RBIT(value))
102 #else
103 #define NRF_CTZ(value) __builtin_ctz(value)
104 #endif
105
106 #if defined(HALTIUM_XXAA) || defined(LUMOS_XXAA)
107 #define DMA_BUFFER_UNIFIED_BYTE_ACCESS 1
108 #endif
109
110 #if defined(LUMOS_XXAA)
111 #if defined(NRF_SKIP_CLOCK_CONFIGURATION) || \
112 (defined(NRF_CONFIG_CPU_FREQ_MHZ) && (NRF_CONFIG_CPU_FREQ_MHZ == 64))
113 #define NRF_CPU_FREQ_IS_64MHZ 1
114 #elif !defined(NRF_CONFIG_CPU_FREQ_MHZ) || \
115 (defined(NRF_CONFIG_CPU_FREQ_MHZ) && (NRF_CONFIG_CPU_FREQ_MHZ == 128))
116 #define NRF_CPU_FREQ_IS_128MHZ 1
117 #else
118 #error "Invalid MCU frequency"
119 #endif
120 #endif
121
122 /** @brief Macro for extracting relative pin number from the absolute pin number. */
123 #define NRF_PIN_NUMBER_TO_PIN(pin) ((pin) & 0x1F)
124
125 /** @brief Macro for extracting port number from the absolute pin number. */
126 #define NRF_PIN_NUMBER_TO_PORT(pin) ((pin) >> 5)
127
128 /** @brief Macro for extracting absolute pin number from the relative pin and port numbers. */
129 #define NRF_PIN_PORT_TO_PIN_NUMBER(pin, port) (((pin) & 0x1F) | ((port) << 5))
130
131 #if defined(LUMOS_XXAA)
132 typedef NRF_DOMAINS_t nrf_domain_t;
133 typedef NRF_OWNERID_Type nrf_owner_t;
134 #endif
135
136 #if defined(HALTIUM_XXAA)
137 typedef NRF_DOMAINID_Type nrf_domain_t;
138 typedef NRF_PROCESSORID_Type nrf_processor_t;
139 typedef NRF_OWNERID_Type nrf_owner_t;
140 #endif
141
142 /**
143 * @brief Function for checking if an object is accesible by EasyDMA of given peripheral instance.
144 *
145 * Peripherals that use EasyDMA require buffers to be placed in certain memory regions.
146 *
147 * @param[in] p_reg Peripheral base pointer.
148 * @param[in] p_object Pointer to an object whose location is to be checked.
149 *
150 * @retval true The pointed object is located in the memory region accessible by EasyDMA.
151 * @retval false The pointed object is not located in the memory region accessible by EasyDMA.
152 */
153 NRF_STATIC_INLINE bool nrf_dma_accessible_check(void const * p_reg, void const * p_object);
154
155 NRF_STATIC_INLINE void nrf_barrier_w(void);
156
157 NRF_STATIC_INLINE void nrf_barrier_r(void);
158
159 NRF_STATIC_INLINE void nrf_barrier_rw(void);
160
161 NRF_STATIC_INLINE bool nrf_event_check(void const * p_reg, uint32_t event);
162
163 NRF_STATIC_INLINE uint32_t nrf_task_event_address_get(void const * p_reg, uint32_t task_event);
164
165 #ifndef NRF_DECLARE_ONLY
166
nrf_event_readback(void * p_event_reg)167 NRF_STATIC_INLINE void nrf_event_readback(void * p_event_reg)
168 {
169 #if NRFX_CHECK(NRFX_EVENT_READBACK_ENABLED) && !defined(NRF51)
170 (void)*((volatile uint32_t *)(p_event_reg));
171 #else
172 (void)p_event_reg;
173 #endif
174 }
175
nrf_barrier_w(void)176 NRF_STATIC_INLINE void nrf_barrier_w(void)
177 {
178 #if defined(ISA_RISCV)
179 RISCV_FENCE(ow, ow);
180 #endif
181 }
182
nrf_barrier_r(void)183 NRF_STATIC_INLINE void nrf_barrier_r(void)
184 {
185 #if defined(ISA_RISCV)
186 RISCV_FENCE(ir, ir);
187 #endif
188 }
189
nrf_barrier_rw(void)190 NRF_STATIC_INLINE void nrf_barrier_rw(void)
191 {
192 #if defined(ISA_RISCV)
193 RISCV_FENCE(iorw, iorw);
194 #endif
195 }
196
197 #if defined(ADDRESS_DOMAIN_Msk)
nrf_address_domain_get(uint32_t addr)198 NRF_STATIC_INLINE uint8_t nrf_address_domain_get(uint32_t addr)
199 {
200 return (uint8_t)((addr & ADDRESS_DOMAIN_Msk) >> ADDRESS_DOMAIN_Pos);
201 }
202 #endif
203
204 #if defined(ADDRESS_REGION_Msk)
nrf_address_region_get(uint32_t addr)205 NRF_STATIC_INLINE nrf_region_t nrf_address_region_get(uint32_t addr)
206 {
207 return (nrf_region_t)((addr & ADDRESS_REGION_Msk) >> ADDRESS_REGION_Pos);
208 }
209 #endif
210
211 #if defined(ADDRESS_SECURITY_Msk)
nrf_address_security_get(uint32_t addr)212 NRF_STATIC_INLINE bool nrf_address_security_get(uint32_t addr)
213 {
214 return ((addr & ADDRESS_SECURITY_Msk) >> ADDRESS_SECURITY_Pos);
215 }
216 #endif
217
218 #if defined(ADDRESS_BUS_Msk)
nrf_address_bus_get(uint32_t addr,size_t size)219 NRF_STATIC_INLINE uint8_t nrf_address_bus_get(uint32_t addr, size_t size)
220 {
221 return (uint8_t)((addr & ADDRESS_BUS_Msk & ~(size - 1)) >> ADDRESS_BUS_Pos);
222 }
223 #endif
224
225 #if defined(ADDRESS_SLAVE_Msk)
nrf_address_slave_get(uint32_t addr)226 NRF_STATIC_INLINE uint8_t nrf_address_slave_get(uint32_t addr)
227 {
228 return (uint8_t)((addr & ADDRESS_SLAVE_Msk) >> ADDRESS_SLAVE_Pos);
229 }
230 #endif
231
232 #if defined(ADDRESS_PERIPHID_Msk)
nrf_address_periphid_get(uint32_t addr)233 NRF_STATIC_INLINE uint16_t nrf_address_periphid_get(uint32_t addr)
234 {
235 return (uint16_t)((addr & ADDRESS_PERIPHID_Msk) >> ADDRESS_PERIPHID_Pos);
236 }
237 #endif
238
nrf_dma_accessible_check(void const * p_reg,void const * p_object)239 NRF_STATIC_INLINE bool nrf_dma_accessible_check(void const * p_reg, void const * p_object)
240 {
241 #if defined(HALTIUM_XXAA)
242 if (nrf_address_bus_get((uint32_t)p_reg, 0x10000) == 0x8E)
243 {
244 /* Bitwise operation to unify secure/non-secure memory address */
245 uint32_t addr = (uint32_t)p_object & 0xEFFFFFFFu;
246
247 /* When peripheral instance is high-speed check whether */
248 /* p_object is placed in GRAM2x or GRAM0x */
249 bool gram0x = (addr >= 0x2F000000u) && (addr < 0x2F038000);
250 bool gram2x = (addr >= 0x2F880000u) && (addr < 0x2F886200);
251 return gram0x || gram2x;
252 }
253 else
254 {
255 /* When peripheral instance is low-speed check whether */
256 /* p_object is placed in GRAM3x */
257 return ((((uint32_t)p_object) & 0xEFFF8000u) == 0x2FC00000u);
258 }
259 #else
260 (void)p_reg;
261 return ((((uint32_t)p_object) & 0xE0000000u) == 0x20000000u);
262 #endif
263 }
264
nrf_event_check(void const * p_reg,uint32_t event)265 NRF_STATIC_INLINE bool nrf_event_check(void const * p_reg, uint32_t event)
266 {
267 return (bool)*(volatile const uint32_t *)((const uint8_t *)p_reg + (uint32_t)event);
268 }
269
nrf_task_event_address_get(void const * p_reg,uint32_t task_event)270 NRF_STATIC_INLINE uint32_t nrf_task_event_address_get(void const * p_reg, uint32_t task_event)
271 {
272 return (uint32_t)((const uint8_t *)p_reg + task_event);
273 }
274 #endif // NRF_DECLARE_ONLY
275
276 #ifdef __cplusplus
277 }
278 #endif
279
280 #endif // NRF_COMMON_H__
281
