1 /*
2 * Copyright (c) 2015 - 2023, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice, this
11 * list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived from this
19 * software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef NRFX_SPIM_H__
35 #define NRFX_SPIM_H__
36
37 #include <nrfx.h>
38 #include <haly/nrfy_spim.h>
39 #include <haly/nrfy_gpio.h>
40
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44
45 /**
46 * @defgroup nrfx_spim SPIM driver
47 * @{
48 * @ingroup nrf_spim
49 * @brief Serial Peripheral Interface Master with EasyDMA (SPIM) driver.
50 */
51
52 /** @brief Data structure of the Serial Peripheral Interface Master with EasyDMA (SPIM) driver instance. */
53 typedef struct
54 {
55 NRF_SPIM_Type * p_reg; ///< Pointer to a structure with SPIM registers.
56 uint8_t drv_inst_idx; ///< Index of the driver instance. For internal use only.
57 } nrfx_spim_t;
58
59 #ifndef __NRFX_DOXYGEN__
60 enum {
61 /* List all enabled driver instances (in the format NRFX_\<instance_name\>_INST_IDX). */
62 NRFX_INSTANCE_ENUM_LIST(SPIM)
63 NRFX_SPIM_ENABLED_COUNT
64 };
65 #endif
66
67 /** @brief Macro for creating an instance of the SPIM driver. */
68 #define NRFX_SPIM_INSTANCE(id) \
69 { \
70 .p_reg = NRFX_CONCAT_2(NRF_SPIM, id), \
71 .drv_inst_idx = NRFX_CONCAT_3(NRFX_SPIM, id, _INST_IDX), \
72 }
73
74 /** @brief Configuration structure of the SPIM driver instance. */
75 typedef struct
76 {
77 uint32_t sck_pin; ///< SCK pin number.
78 uint32_t mosi_pin; ///< MOSI pin number (optional).
79 /**< Set to @ref NRF_SPIM_PIN_NOT_CONNECTED
80 * if this signal is not needed. */
81 uint32_t miso_pin; ///< MISO pin number (optional).
82 /**< Set to @ref NRF_SPIM_PIN_NOT_CONNECTED
83 * if this signal is not needed. */
84 uint32_t ss_pin; ///< Slave Select pin number (optional).
85 /**< Set to @ref NRF_SPIM_PIN_NOT_CONNECTED
86 * if this signal is not needed.
87 * @note Unlike the other fields that specify
88 * pin numbers, this one cannot be omitted
89 * when both GPIO configuration and pin
90 * selection are to be skipped but the signal
91 * is not controlled by hardware (the driver
92 * must then control it as a regular GPIO). */
93 bool ss_active_high; ///< Polarity of the Slave Select pin during transmission.
94 uint8_t irq_priority; ///< Interrupt priority.
95 uint8_t orc; ///< Overrun character.
96 /**< This character is used when all bytes from the TX buffer are sent,
97 * but the transfer continues due to RX. */
98 uint32_t frequency; ///< SPIM frequency in Hz.
99 nrf_spim_mode_t mode; ///< SPIM mode.
100 nrf_spim_bit_order_t bit_order; ///< SPIM bit order.
101 nrf_gpio_pin_pull_t miso_pull; ///< MISO pull up configuration.
102 #if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) || defined(__NRFX_DOXYGEN__)
103 uint32_t dcx_pin; ///< D/CX pin number (optional).
104 uint8_t rx_delay; ///< Sample delay for input serial data on MISO.
105 /**< The value specifies the delay, in number of 64 MHz clock cycles
106 * (15.625 ns), from the the sampling edge of SCK (leading edge for
107 * CONFIG.CPHA = 0, trailing edge for CONFIG.CPHA = 1) until
108 * the input serial data is sampled. */
109 bool use_hw_ss; ///< Indication to use software or hardware controlled Slave Select pin.
110 uint8_t ss_duration; ///< Slave Select duration before and after transmission.
111 /**< Minimum duration between the edge of CSN and the edge of SCK.
112 * Also, minimum duration of CSN inactivity between transactions.
113 * The value is specified in number of 64 MHz clock cycles (15.625 ns).
114 * Supported only for hardware-controlled Slave Select. */
115 #endif
116 bool skip_gpio_cfg; ///< Skip GPIO configuration of pins.
117 /**< When set to true, the driver does not modify
118 * any GPIO parameters of the used pins. Those
119 * parameters are supposed to be configured
120 * externally before the driver is initialized. */
121 bool skip_psel_cfg; ///< Skip pin selection configuration.
122 /**< When set to true, the driver does not modify
123 * pin select registers in the peripheral.
124 * Those registers are supposed to be set up
125 * externally before the driver is initialized.
126 * @note When both GPIO configuration and pin
127 * selection are to be skipped, the structure
128 * fields that specify pins can be omitted,
129 * as they are ignored anyway. This does not
130 * apply to the @p ss_pin field, unless it is
131 * to be controlled by hardware.*/
132 } nrfx_spim_config_t;
133
134 /**
135 * @brief SPIM driver default configuration.
136 *
137 * This configuration sets up SPIM with the following options:
138 * - SS pin active low
139 * - over-run character set to 0xFF
140 * - clock frequency: 4 MHz
141 * - mode: 0 (SCK active high, sample on leading edge of the clock signal)
142 * - MSB shifted out first
143 * - MISO pull-up disabled
144 *
145 * @param[in] _pin_sck SCK pin.
146 * @param[in] _pin_mosi MOSI pin.
147 * @param[in] _pin_miso MISO pin.
148 * @param[in] _pin_ss Slave select pin.
149 */
150 #define NRFX_SPIM_DEFAULT_CONFIG(_pin_sck, _pin_mosi, _pin_miso, _pin_ss) \
151 { \
152 .sck_pin = _pin_sck, \
153 .mosi_pin = _pin_mosi, \
154 .miso_pin = _pin_miso, \
155 .ss_pin = _pin_ss, \
156 .ss_active_high = false, \
157 .irq_priority = NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY, \
158 .orc = 0xFF, \
159 .frequency = NRFX_MHZ_TO_HZ(4), \
160 .mode = NRF_SPIM_MODE_0, \
161 .bit_order = NRF_SPIM_BIT_ORDER_MSB_FIRST, \
162 .miso_pull = NRF_GPIO_PIN_NOPULL, \
163 NRFX_COND_CODE_1(NRFX_SPIM_EXTENDED_ENABLED, (.use_hw_ss = false, .ss_duration = 0x02,), ()) \
164 NRFX_COND_CODE_1(NRFX_SPIM_EXTENDED_ENABLED, (.rx_delay = 0x02,), ()) \
165 NRFX_COND_CODE_1(NRFX_SPIM_EXTENDED_ENABLED, (.dcx_pin = NRF_SPIM_PIN_NOT_CONNECTED,), ()) \
166 }
167
168 /**
169 * @brief Macro for checking whether specified frequency can be achieved for a given SPIM instance.
170 *
171 * @note This macro uses a compile-time assertion.
172 *
173 * @param[in] id Index of the specified SPIM instance.
174 * @param[in] frequency Desired frequency value in Hz.
175 */
176 #define NRFX_SPIM_FREQUENCY_STATIC_CHECK(id, frequency) \
177 NRF_SPIM_FREQUENCY_STATIC_CHECK(NRF_SPIM_INST_GET(id), frequency)
178
179 /**
180 * @brief Macro for getting base frequency value in Hz for a given SPIM instance.
181 *
182 * @param[in] p_instance Pointer to the driver instance structure.
183 */
184 #define NRFX_SPIM_BASE_FREQUENCY_GET(p_instance) \
185 NRF_SPIM_BASE_FREQUENCY_GET((p_instance)->p_reg)
186
187 /** @brief Flag indicating that TX buffer address will be incremented after transfer. */
188 #define NRFX_SPIM_FLAG_TX_POSTINC (1UL << 0)
189
190 /** @brief Flag indicating that RX buffer address will be incremented after transfer. */
191 #define NRFX_SPIM_FLAG_RX_POSTINC (1UL << 1)
192
193 /** @brief Flag indicating that the interrupt after each transfer will be suppressed, and the event handler will not be called. */
194 #define NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER (1UL << 2)
195
196 /** @brief Flag indicating that the transfer will be set up, but not started. */
197 #define NRFX_SPIM_FLAG_HOLD_XFER (1UL << 3)
198
199 /** @brief Flag indicating that the transfer will be executed multiple times. */
200 #define NRFX_SPIM_FLAG_REPEATED_XFER (1UL << 4)
201
202 /** @brief Single transfer descriptor structure. */
203 typedef nrfy_spim_xfer_desc_t nrfx_spim_xfer_desc_t;
204
205 /**
206 * @brief Macro for setting up single transfer descriptor.
207 *
208 * This macro is for internal use only.
209 */
210 #define NRFX_SPIM_SINGLE_XFER(p_tx, tx_len, p_rx, rx_len) \
211 { \
212 .p_tx_buffer = (uint8_t const *)(p_tx), \
213 .tx_length = (tx_len), \
214 .p_rx_buffer = (p_rx), \
215 .rx_length = (rx_len), \
216 }
217
218 /** @brief Macro for setting the duplex TX RX transfer. */
219 #define NRFX_SPIM_XFER_TRX(p_tx_buf, tx_length, p_rx_buf, rx_length) \
220 NRFX_SPIM_SINGLE_XFER(p_tx_buf, tx_length, p_rx_buf, rx_length)
221
222 /** @brief Macro for setting the TX transfer. */
223 #define NRFX_SPIM_XFER_TX(p_buf, length) \
224 NRFX_SPIM_SINGLE_XFER(p_buf, length, NULL, 0)
225
226 /** @brief Macro for setting the RX transfer. */
227 #define NRFX_SPIM_XFER_RX(p_buf, length) \
228 NRFX_SPIM_SINGLE_XFER(NULL, 0, p_buf, length)
229
230 /**
231 * @brief SPIM master driver event types, passed to the handler routine provided
232 * during initialization.
233 */
234 typedef enum
235 {
236 NRFX_SPIM_EVENT_DONE, ///< Transfer done.
237 } nrfx_spim_evt_type_t;
238
239 /** @brief SPIM event description with transmission details. */
240 typedef struct
241 {
242 nrfx_spim_evt_type_t type; ///< Event type.
243 nrfx_spim_xfer_desc_t xfer_desc; ///< Transfer details.
244 } nrfx_spim_evt_t;
245
246 /** @brief SPIM driver event handler type. */
247 typedef void (* nrfx_spim_evt_handler_t)(nrfx_spim_evt_t const * p_event,
248 void * p_context);
249
250 /**
251 * @brief Function for initializing the SPIM driver instance.
252 *
253 * This function configures and enables the specified peripheral.
254 *
255 * @param[in] p_instance Pointer to the driver instance structure.
256 * @param[in] p_config Pointer to the structure with the initial configuration.
257 * NULL if configuration is to be skipped and will be done later
258 * using @ref nrfx_spim_reconfigure.
259 * @param[in] handler Event handler provided by the user. If NULL, transfers
260 * will be performed in blocking mode.
261 * @param[in] p_context Context passed to event handler.
262 *
263 * @warning On nRF5340, 32 MHz setting for SPIM4 peripheral instance is supported
264 * only on the dedicated pins with @ref NRF_GPIO_PIN_SEL_PERIPHERAL configuration.
265 * See the chapter <a href=@nRF5340pinAssignmentsURL>Pin assignments</a> in the Product Specification.
266 *
267 * @retval NRFX_SUCCESS Initialization was successful.
268 * @retval NRFX_ERROR_ALREADY The driver is already initialized.
269 * @retval NRFX_ERROR_INVALID_STATE The driver is already initialized.
270 * Deprecated - use @ref NRFX_ERROR_ALREADY instead.
271 * @retval NRFX_ERROR_BUSY Some other peripheral with the same
272 * instance ID is already in use. This is
273 * possible only if @ref nrfx_prs module
274 * is enabled.
275 * @retval NRFX_ERROR_NOT_SUPPORTED Requested configuration is not supported
276 * by the SPIM instance.
277 * @retval NRFX_ERROR_INVALID_PARAM Requested frequency is not available on the specified driver instance or pins.
278 * @retval NRFX_ERROR_FORBIDDEN Software-controlled Slave Select and hardware-controlled Slave Select
279 cannot be active at the same time.
280 */
281 nrfx_err_t nrfx_spim_init(nrfx_spim_t const * p_instance,
282 nrfx_spim_config_t const * p_config,
283 nrfx_spim_evt_handler_t handler,
284 void * p_context);
285
286 /**
287 * @brief Function for reconfiguring the SPIM driver instance.
288 *
289 * @note This function can not be called during transmission.
290 *
291 * @param[in] p_instance Pointer to the driver instance structure.
292 * @param[in] p_config Pointer to the structure with the configuration.
293 *
294 * @retval NRFX_SUCCESS Reconfiguration was successful.
295 * @retval NRFX_ERROR_BUSY The driver is during transfer.
296 * @retval NRFX_ERROR_INVALID_STATE The driver is uninitialized.
297 * @retval NRFX_ERROR_NOT_SUPPORTED Requested configuration is not supported
298 * by the SPIM instance.
299 * @retval NRFX_ERROR_INVALID_PARAM Requested frequency is not available on the specified driver instance or pins.
300 * @retval NRFX_ERROR_FORBIDDEN Software-controlled Slave Select and hardware-controlled Slave Select
301 cannot be active at the same time.
302 */
303 nrfx_err_t nrfx_spim_reconfigure(nrfx_spim_t const * p_instance,
304 nrfx_spim_config_t const * p_config);
305
306 /**
307 * @brief Function for uninitializing the SPIM driver instance.
308 *
309 * @param[in] p_instance Pointer to the driver instance structure.
310 */
311 void nrfx_spim_uninit(nrfx_spim_t const * p_instance);
312
313 /**
314 * @brief Function for checking if the SPIM driver instance is initialized.
315 *
316 * @param[in] p_instance Pointer to the driver instance structure.
317 *
318 * @retval true Instance is already initialized.
319 * @retval false Instance is not initialized.
320 */
321 bool nrfx_spim_init_check(nrfx_spim_t const * p_instance);
322
323 /**
324 * @brief Function for starting the SPIM data transfer.
325 *
326 * Additional options are provided using the @c flags parameter:
327 *
328 * - @ref NRFX_SPIM_FLAG_TX_POSTINC and @ref NRFX_SPIM_FLAG_RX_POSTINC -
329 * Post-incrementation of buffer addresses.
330 * - @ref NRFX_SPIM_FLAG_HOLD_XFER - Driver is not starting the transfer. Use this
331 * flag if the transfer is triggered externally by PPI. Use
332 * @ref nrfx_spim_start_task_address_get to get the address of the start task.
333 * Chip select must be configured to @ref NRF_SPIM_PIN_NOT_CONNECTED and managed outside the driver.
334 * If you do not expect more transfers, you should call @ref nrfx_spim_abort to inform the driver
335 * that the peripheral can be put into a low power state.
336 * - @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER - No user event handler after transfer
337 * completion. This also means no interrupt at the end of the transfer.
338 * If @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER is used, the driver does not set the instance into
339 * busy state, so you must ensure that the next transfers are set up when SPIM is not active.
340 * Additionally, you should call @ref nrfx_spim_abort to inform the driver that no more transfers will occur.
341 * @ref nrfx_spim_end_event_address_get function can be used to detect end of transfer. Option can
342 * be used together with @ref NRFX_SPIM_FLAG_REPEATED_XFER to prepare a sequence of SPI transfers
343 * without interruptions. If you do not expect more transfers, you should call @ref nrfx_spim_abort
344 * to inform the driver that the peripheral can be put into a low power state.
345 * - @ref NRFX_SPIM_FLAG_REPEATED_XFER - Prepare for repeated transfers. You can set
346 * up a number of transfers that will be triggered externally (for example by PPI). An example is
347 * a TXRX transfer with the options @ref NRFX_SPIM_FLAG_RX_POSTINC,
348 * @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER, and @ref NRFX_SPIM_FLAG_REPEATED_XFER. After the
349 * transfer is set up, a set of transfers can be triggered by PPI that will read, for example,
350 * the same register of an external component and put it into a RAM buffer without any interrupts.
351 * @ref nrfx_spim_end_event_address_get can be used to get the address of the END event, which can
352 * be used to count the number of transfers. If @ref NRFX_SPIM_FLAG_REPEATED_XFER is used,
353 * the driver does not set the instance into busy state, so you must ensure that the next
354 * transfers are set up when SPIM is not active. If you do not expect more transfers, you should call
355 * @ref nrfx_spim_abort to inform the driver that the peripheral can be put into a low power state.
356 *
357 * @note Peripherals using EasyDMA (including SPIM) require the transfer buffers
358 * to be placed in the Data RAM region. If this condition is not met,
359 * this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
360 *
361 * @param p_instance Pointer to the driver instance structure.
362 * @param p_xfer_desc Pointer to the transfer descriptor.
363 * @param flags Transfer options (0 for default settings).
364 *
365 * @retval NRFX_SUCCESS The procedure is successful.
366 * @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
367 * @retval NRFX_ERROR_NOT_SUPPORTED The provided parameters are not supported.
368 * @retval NRFX_ERROR_INVALID_ADDR The provided buffers are not placed in the Data
369 * RAM region.
370 */
371 nrfx_err_t nrfx_spim_xfer(nrfx_spim_t const * p_instance,
372 nrfx_spim_xfer_desc_t const * p_xfer_desc,
373 uint32_t flags);
374
375 #if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) || defined(__NRFX_DOXYGEN__)
376 /**
377 * @brief Function for starting the SPIM data transfer with DCX control.
378 *
379 * See @ref nrfx_spim_xfer for description of additional options of transfer
380 * provided by the @c flags parameter.
381 *
382 * @note Peripherals that use EasyDMA (including SPIM) require the transfer buffers
383 * to be placed in the Data RAM region. If this condition is not met,
384 * this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
385 *
386 * @param p_instance Pointer to the driver instance structure.
387 * @param p_xfer_desc Pointer to the transfer descriptor.
388 * @param flags Transfer options (0 for default settings).
389 * @param cmd_length Length of the command bytes preceding the data
390 * bytes. The DCX line will be low during transmission
391 * of command bytes and high during transmission of data bytes.
392 * Maximum value available for dividing the transmitted bytes
393 * into command bytes and data bytes is @ref NRF_SPIM_DCX_CNT_ALL_CMD - 1.
394 * The @ref NRF_SPIM_DCX_CNT_ALL_CMD value passed as the
395 * @c cmd_length parameter causes all transmitted bytes
396 * to be marked as command bytes.
397 *
398 * @retval NRFX_SUCCESS The procedure is successful.
399 * @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
400 * @retval NRFX_ERROR_NOT_SUPPORTED The provided parameters are not supported.
401 * @retval NRFX_ERROR_INVALID_ADDR The provided buffers are not placed in the Data
402 * RAM region.
403 */
404 nrfx_err_t nrfx_spim_xfer_dcx(nrfx_spim_t const * p_instance,
405 nrfx_spim_xfer_desc_t const * p_xfer_desc,
406 uint32_t flags,
407 uint8_t cmd_length);
408 #endif
409
410 /**
411 * @brief Function for returning the address of a SPIM start task.
412 *
413 * This function is to be used if @ref nrfx_spim_xfer was called with the flag @ref NRFX_SPIM_FLAG_HOLD_XFER.
414 * In that case, the transfer is not started by the driver, but it must be started externally by PPI.
415 *
416 * @param[in] p_instance Pointer to the driver instance structure.
417 *
418 * @return Start task address.
419 */
420 NRFX_STATIC_INLINE uint32_t nrfx_spim_start_task_address_get(nrfx_spim_t const * p_instance);
421
422 /**
423 * @brief Function for returning the address of a END SPIM event.
424 *
425 * The END event can be used to detect the end of a transfer
426 * if the @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER option is used.
427 *
428 * @param[in] p_instance Pointer to the driver instance structure.
429 *
430 * @return END event address.
431 */
432 NRFX_STATIC_INLINE uint32_t nrfx_spim_end_event_address_get(nrfx_spim_t const * p_instance);
433
434 /**
435 * @brief Function for aborting ongoing transfer.
436 *
437 * @note You should call the function if the first transfer has been started with one or more
438 * of the following options: @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER,
439 * @ref NRFX_SPIM_FLAG_HOLD_XFER, and @ref NRFX_SPIM_FLAG_REPEATED_XFER. When you do not
440 * expect more transfers, use this function so that the driver can put the peripheral into
441 * a low power state.
442 *
443 * @param[in] p_instance Pointer to the driver instance structure.
444 */
445 void nrfx_spim_abort(nrfx_spim_t const * p_instance);
446
447 /**
448 * @brief Macro returning SPIM interrupt handler.
449 *
450 * param[in] idx SPIM index.
451 *
452 * @return Interrupt handler.
453 */
454 #define NRFX_SPIM_INST_HANDLER_GET(idx) NRFX_CONCAT_3(nrfx_spim_, idx, _irq_handler)
455
456 #ifndef NRFX_DECLARE_ONLY
nrfx_spim_start_task_address_get(nrfx_spim_t const * p_instance)457 NRFX_STATIC_INLINE uint32_t nrfx_spim_start_task_address_get(nrfx_spim_t const * p_instance)
458 {
459 return nrfy_spim_task_address_get(p_instance->p_reg, NRF_SPIM_TASK_START);
460 }
461
nrfx_spim_end_event_address_get(nrfx_spim_t const * p_instance)462 NRFX_STATIC_INLINE uint32_t nrfx_spim_end_event_address_get(nrfx_spim_t const * p_instance)
463 {
464 return nrfy_spim_event_address_get(p_instance->p_reg, NRF_SPIM_EVENT_END);
465 }
466 #endif // NRFX_DECLARE_ONLY
467 /** @} */
468
469 /*
470 * Declare interrupt handlers for all enabled driver instances in the following format:
471 * nrfx_\<periph_name\>_\<idx\>_irq_handler (for example, nrfx_spim_0_irq_handler).
472 *
473 * A specific interrupt handler for the driver instance can be retrieved by using
474 * the NRFX_SPIM_INST_HANDLER_GET macro.
475 *
476 * Here is a sample of using the NRFX_SPIM_INST_HANDLER_GET macro to map an interrupt handler
477 * in a Zephyr application:
478 *
479 * IRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_SPIM_INST_GET(\<instance_index\>)), \<priority\>,
480 * NRFX_SPIM_INST_HANDLER_GET(\<instance_index\>), 0, 0);
481 */
482 NRFX_INSTANCE_IRQ_HANDLERS_DECLARE(SPIM, spim)
483
484
485 #ifdef __cplusplus
486 }
487 #endif
488
489 #endif // NRFX_SPIM_H__
490
