1 /* 2 * Copyright (c) 2023 - 2025, Nordic Semiconductor ASA 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright notice, this 11 * list of conditions and the following disclaimer. 12 * 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * 3. Neither the name of the copyright holder nor the names of its 18 * contributors may be used to endorse or promote products derived from this 19 * software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #ifndef NRFX_INTERCONNECT_APB_HALTIUM_GLOBAL_H__ 35 #define NRFX_INTERCONNECT_APB_HALTIUM_GLOBAL_H__ 36 37 #ifdef __cplusplus 38 extern "C" { 39 #endif 40 41 /* Instance of the DPPI peripheral which belongs to the main APB bus. */ 42 #define NRFX_INTERCONNECT_MAIN_DPPI_INSTANCE 130 43 44 #ifndef NRFX_INTERCONNECT_APB_GLOBAL_DPPI_DEFINE 45 /* Default DPPI static variables generation in case of bare-metal application. */ 46 #ifndef NRFX_DPPI_CHANNELS_SINGLE_VAR_NAME_BY_INST_NUM 47 #define NRFX_DPPI_CHANNELS_SINGLE_VAR_NAME_BY_INST_NUM(inst_num) \ 48 NRFX_CONCAT(m_dppi, inst_num, _channels) 49 #else 50 #error Invalid set of configuration for DPPIC. 51 #endif 52 53 #ifndef NRFX_DPPI_CONFIG_OWNED_CHANNELS_MASK_BY_INST_NUM 54 #define NRFX_DPPI_CONFIG_OWNED_CHANNELS_MASK_BY_INST_NUM(inst_num) \ 55 NRFX_CONCAT(NRFX_DPPI, inst_num, _CONFIG_OWNED_CHANNELS_MASK) 56 #else 57 #error Invalid set of configuration for DPPIC. 58 #endif 59 60 #ifndef NRFX_DPPI_PUB_CONFIG_ALLOWED_CHANNELS_MASK_BY_INST_NUM 61 #define NRFX_DPPI_PUB_CONFIG_ALLOWED_CHANNELS_MASK_BY_INST_NUM(inst_num) \ 62 NRFX_CONCAT(NRFX_DPPI, inst_num, _PUB_CONFIG_ALLOWED_CHANNELS_MASK) 63 #else 64 #error Invalid set of configuration for DPPIC. 65 #endif 66 67 #ifndef NRFX_DPPI_SUB_CONFIG_ALLOWED_CHANNELS_MASK_BY_INST_NUM 68 #define NRFX_DPPI_SUB_CONFIG_ALLOWED_CHANNELS_MASK_BY_INST_NUM(inst_num) \ 69 NRFX_CONCAT(NRFX_DPPI, inst_num, _SUB_CONFIG_ALLOWED_CHANNELS_MASK) 70 #else 71 #error "Invalid set of configuration for DPPIC." 72 #endif 73 74 /* Macro checks if owned inst_num mask is not zero and then returns 1, else 0 */ 75 #ifdef NRF_SECURE 76 #define NRFX_DPPI_OWNED_MASK(inst_num) 1 77 #else 78 #define NRFX_DPPI_OWNED_MASK(inst_num) \ 79 NRFX_COND_CODE_0(NRFX_DPPI_CONFIG_OWNED_CHANNELS_MASK_BY_INST_NUM(inst_num), (0), (1)) 80 #endif 81 82 #define NRFX_DPPI_CHANNELS_VAR(inst_num) \ 83 NRFX_CONCAT(m_dppi, inst_num, _channels) 84 85 #define NRFX_DPPI_CHANNELS_ENTRY(inst_num) \ 86 NRFX_COND_CODE_1(NRFX_DPPI_OWNED_MASK(inst_num), \ 87 ( \ 88 static nrfx_atomic_t NRFX_DPPI_CHANNELS_VAR(inst_num) __attribute__((used)) = \ 89 NRFX_DPPI_CONFIG_OWNED_CHANNELS_MASK_BY_INST_NUM(inst_num); \ 90 ), ()) 91 92 #define _NRFX_DPPI_CHANNELS_ENTRY(periph_name, prefix, inst_num, _) \ 93 /* Since this is used only for global instances macro shall skip instances starting with 0 */ \ 94 NRFX_COND_CODE_0(prefix, (), (NRFX_DPPI_CHANNELS_ENTRY(inst_num))) 95 96 #define NRFX_INTERCONNECT_APB_GLOBAL_DPPI_DEFINE \ 97 NRFX_FOREACH_PRESENT(DPPIC, _NRFX_DPPI_CHANNELS_ENTRY, (), ()) 98 #else 99 #ifndef NRFX_DPPI_OWNED_MASK 100 #define NRFX_DPPI_OWNED_MASK NRFX_DPPI_PUB_OR_SUB_MASK 101 #endif 102 #endif // NRFX_INTERCONNECT_APB_GLOBAL_DPPI_DEFINE 103 104 #define NRFX_INTERCONNECT_APB_PROP_ENTRY(inst_num, ppib, apb_size) \ 105 NRFX_COND_CODE_1(NRFX_DPPI_OWNED_MASK(inst_num), \ 106 ( \ 107 { \ 108 .p_dppi = NRFX_CONCAT(NRF_DPPIC, inst_num), \ 109 .p_dppi_channels = &NRFX_DPPI_CHANNELS_SINGLE_VAR_NAME_BY_INST_NUM(inst_num), \ 110 .dppi_pub_channels_mask = NRFX_DPPI_PUB_CONFIG_ALLOWED_CHANNELS_MASK_BY_INST_NUM(inst_num), \ 111 .dppi_sub_channels_mask = NRFX_DPPI_SUB_CONFIG_ALLOWED_CHANNELS_MASK_BY_INST_NUM(inst_num), \ 112 .p_ppib = ppib, \ 113 .size = apb_size, \ 114 }, \ 115 ), ()) 116 117 #if !defined(NRFX_INTERCONNECT_APB_GLOBAL_BUSES_PROP) 118 #define NRFX_INTERCONNECT_APB_GLOBAL_BUSES_PROP \ 119 { \ 120 NRFX_INTERCONNECT_APB_PROP_ENTRY(120, NULL, 0x10000) /* APB22 */ \ 121 NRFX_INTERCONNECT_APB_PROP_ENTRY(130, NULL, 0x20000) /* APB32 */ \ 122 NRFX_INTERCONNECT_APB_PROP_ENTRY(131, NULL, 0x10000) /* APB38 */ \ 123 NRFX_INTERCONNECT_APB_PROP_ENTRY(132, NULL, 0x10000) /* APB39 */ \ 124 NRFX_INTERCONNECT_APB_PROP_ENTRY(133, NULL, 0x10000) /* APB3A */ \ 125 NRFX_INTERCONNECT_APB_PROP_ENTRY(134, NULL, 0x10000) /* APB3B */ \ 126 NRFX_INTERCONNECT_APB_PROP_ENTRY(135, NULL, 0x10000) /* APB3C */ \ 127 NRFX_INTERCONNECT_APB_PROP_ENTRY(136, NULL, 0x10000) /* APB3D */ \ 128 } 129 #endif 130 131 #ifdef __cplusplus 132 } 133 #endif 134 135 #endif // NRFX_INTERCONNECT_APB_HALTIUM_GLOBAL_H__ 136
