1 /* 2 * Copyright (c) 2023-2024, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 */ 7 8 #ifndef __NI_TOWER_APU_DRV_H__ 9 #define __NI_TOWER_APU_DRV_H__ 10 11 #include "ni_tower_drv.h" 12 13 #include <stdint.h> 14 15 /* Number of possible apu entities in NI-Tower */ 16 #define NI_TOWER_APU_NUM_ENTITIES 4 17 18 /** 19 * \brief NI-Tower APU background type enumerations 20 */ 21 enum ni_tower_apu_br_type { 22 NI_T_FOREGROUND = 0x0, 23 NI_T_BACKGROUND = 0x1 24 }; 25 26 /** 27 * \brief NI-Tower APU access permission type enumerations 28 */ 29 enum ni_tower_apu_access_perm_type { 30 /* As per spec */ 31 NI_T_N_SEC_W = 0b00000001, 32 NI_T_SEC_W = 0b00000010, 33 NI_T_N_SEC_R = 0b00000100, 34 NI_T_SEC_R = 0b00001000, 35 NI_T_REALM_W = 0b00010000, 36 NI_T_ROOT_W = 0b00100000, 37 NI_T_REALM_R = 0b01000000, 38 NI_T_ROOT_R = 0b10000000, 39 40 NI_T_N_SEC_RW = NI_T_N_SEC_R | NI_T_N_SEC_W, 41 NI_T_SEC_RW = NI_T_SEC_R | NI_T_SEC_W, 42 NI_T_REALM_RW = NI_T_REALM_R | NI_T_REALM_W, 43 NI_T_ROOT_RW = NI_T_ROOT_R | NI_T_ROOT_W, 44 45 NI_T_ALL_PERM = NI_T_N_SEC_RW | NI_T_SEC_RW | NI_T_REALM_RW | NI_T_ROOT_RW 46 }; 47 48 /** 49 * \brief NI-Tower APU entity selection type enumerations 50 */ 51 enum ni_tower_apu_entity_type { 52 NI_T_ID_0_SELECT = 0b0001, 53 NI_T_ID_1_SELECT = 0b0010, 54 NI_T_ID_2_SELECT = 0b0100, 55 NI_T_ID_3_SELECT = 0b1000, 56 }; 57 58 /** 59 * \brief NI-Tower APU entity valid type enumerations 60 */ 61 enum ni_tower_apu_entity_valid_type { 62 NI_T_ID_VALID_NONE = 0x0, 63 64 NI_T_ID_0_VALID = 0b0001, 65 NI_T_ID_1_VALID = 0b0010, 66 NI_T_ID_2_VALID = 0b0100, 67 NI_T_ID_3_VALID = 0b1000, 68 69 NI_T_ID_VALID_ALL = NI_T_ID_0_VALID | NI_T_ID_1_VALID | NI_T_ID_2_VALID | 70 NI_T_ID_3_VALID, 71 }; 72 73 /** 74 * \brief NI-Tower APU lock type enumerations 75 */ 76 enum ni_tower_apu_lock_type { 77 NI_T_UNLOCK = 0x0, 78 NI_T_LOCK = 0x1, 79 }; 80 81 /** 82 * \brief NI-Tower APU region enable type enumerations 83 */ 84 enum ni_tower_apu_region_enable_type { 85 NI_T_REGION_DISABLE = 0x0, 86 NI_T_REGION_ENABLE = 0x1, 87 }; 88 89 /** 90 * \brief NI-Tower APU region configuration info structure 91 */ 92 struct ni_tower_apu_reg_cfg_info { 93 /* Base address of the region */ 94 uint64_t base_addr; 95 /* End address of the region */ 96 uint64_t end_addr; 97 /* Whether the region is background or a foreground region*/ 98 enum ni_tower_apu_br_type background; 99 /* Array of access permissions for all entities */ 100 enum ni_tower_apu_access_perm_type permissions[NI_TOWER_APU_NUM_ENTITIES]; 101 /* Array of entity ids */ 102 uint8_t entity_ids[NI_TOWER_APU_NUM_ENTITIES]; 103 /* Value for id_valid */ 104 enum ni_tower_apu_entity_valid_type id_valid; 105 /* Whether the region should be enabled or not */ 106 enum ni_tower_apu_region_enable_type region_enable; 107 /* Whether the region should be locked or not */ 108 enum ni_tower_apu_lock_type lock; 109 }; 110 111 /** 112 * \brief NI-Tower APU device structure 113 */ 114 struct ni_tower_apu_dev { 115 uintptr_t base; 116 /* Offset to be added to the memory map base and end addresses */ 117 uint64_t region_mapping_offset; 118 }; 119 120 /** 121 * \brief Initialize and return APU device 122 * 123 * \param[in] ni_tower_dev NI-Tower device struct \ref ni_tower_dev. 124 * \param[in] component NI-Tower component node struct \ref 125 * ni_tower_component_node. 126 * \param[in] region_mapping_offset Offset which will added to the memory map 127 * base and end addresses. 128 * \param[out] dev NI-Tower APU device struct \ref 129 * ni_tower_apu_dev. 130 * 131 * \return Returns error code as specified in \ref ni_tower_err 132 */ 133 enum ni_tower_err ni_tower_apu_dev_init( 134 const struct ni_tower_dev *ni_tower_dev, 135 const struct ni_tower_component_node* component, 136 const uint64_t region_mapping_offset, 137 struct ni_tower_apu_dev *dev); 138 139 /** 140 * \brief Configure NI-Tower APU 141 * 142 * \param[in] dev NI-Tower APU device struct \ref ni_tower_apu_dev. 143 * \param[in] cfg_info Configuration info of a region to be configured 144 * struct \ref ni_tower_apu_reg_cfg_info. 145 * \param[in] region Region number to be configured. 146 * 147 * \return Returns error code as specified in \ref ni_tower_err 148 */ 149 enum ni_tower_err ni_tower_apu_configure_region( 150 const struct ni_tower_apu_dev *dev, 151 const struct ni_tower_apu_reg_cfg_info *cfg_info, 152 const uint32_t region); 153 154 /** 155 * \brief Get the next available region number and configure NI-Tower APU 156 * region 157 * 158 * \param[in] dev NI-Tower APU device struct \ref ni_tower_apu_dev. 159 * \param[in] cfg_info Configuration info of the region to be configured 160 * struct \ref ni_tower_apu_reg_cfg_info. 161 * 162 * \return Returns error code as specified in \ref ni_tower_err 163 */ 164 enum ni_tower_err ni_tower_apu_configure_next_available_region( 165 const struct ni_tower_apu_dev *dev, 166 const struct ni_tower_apu_reg_cfg_info *cfg_info); 167 168 /** 169 * \brief Enables NI-Tower APU 170 * 171 * \param[in] dev NI-Tower APU device struct \ref ni_tower_apu_dev. 172 * 173 * \return Returns error code as specified in \ref ni_tower_err 174 */ 175 enum ni_tower_err ni_tower_apu_enable(const struct ni_tower_apu_dev *dev); 176 177 /** 178 * \brief Enables NI-Tower APU SLVERR response. 179 * 180 * \param[in] dev NI-Tower APU device struct \ref ni_tower_apu_dev. 181 * 182 * \return Returns error code as specified in \ref ni_tower_err 183 */ 184 enum ni_tower_err ni_tower_apu_sync_err_enable( 185 const struct ni_tower_apu_dev *dev); 186 187 #endif /* __NI_TOWER_APU_DRV_H__ */ 188
