1 /* 2 * Copyright 2022-2023 NXP 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef NETC_ETH_IP_CFG_DEFINES_H 8 #define NETC_ETH_IP_CFG_DEFINES_H 9 10 /** 11 * @file Netc_Eth_Ip_Cfg_Defines.h 12 * 13 * @addtogroup NETC_ETH_DRIVER NETC_ETH Driver 14 * @{ 15 */ 16 17 #ifdef __cplusplus 18 extern "C"{ 19 #endif 20 21 /*================================================================================================== 22 * INCLUDE FILES 23 * 1) system and project includes 24 * 2) needed interfaces from external units 25 * 3) internal and external interfaces from this unit 26 ==================================================================================================*/ 27 #include "Mcal.h" 28 #include "S32Z2_ENETC_PORT.h" 29 #include "S32Z2_NETC_F3_SI0.h" 30 #include "S32Z2_NETC_F3_SI1.h" 31 #include "S32Z2_NETC_F3_SI2.h" 32 #include "S32Z2_NETC_F3_SI3.h" 33 #include "S32Z2_NETC_F3_SI4.h" 34 #include "S32Z2_NETC_F3_SI5.h" 35 #include "S32Z2_NETC_F3_SI6.h" 36 #include "S32Z2_NETC_F3_SI7.h" 37 #include "S32Z2_NETC_IERB.h" 38 #include "S32Z2_NETC_VF1_PCI_HDR_TYPE0.h" 39 #include "S32Z2_NETC_VF2_PCI_HDR_TYPE0.h" 40 #include "S32Z2_NETC_VF3_PCI_HDR_TYPE0.h" 41 #include "S32Z2_NETC_VF4_PCI_HDR_TYPE0.h" 42 #include "S32Z2_NETC_VF5_PCI_HDR_TYPE0.h" 43 #include "S32Z2_NETC_VF6_PCI_HDR_TYPE0.h" 44 #include "S32Z2_NETC_VF7_PCI_HDR_TYPE0.h" 45 46 #include "S32Z2_NETC_F3.h" 47 #include "S32Z2_NETC_F0_PCI_HDR_TYPE0.h" 48 #include "S32Z2_NETC_F1_PCI_HDR_TYPE0.h" 49 #include "S32Z2_NETC_F2_PCI_HDR_TYPE0.h" 50 #include "S32Z2_NETC_F3_PCI_HDR_TYPE0.h" 51 #include "S32Z2_ENETC_PORT.h" 52 #include "S32Z2_NETC_F3_COMMON.h" 53 54 #include "S32Z2_TMR0_BASE.h" 55 56 #include "S32Z2_IERC_PCI.h" 57 58 #include "S32Z2_NETC_F1_GLOBAL.h" 59 #include "S32Z2_SW_ETH_MAC_PORT0.h" 60 #include "S32Z2_SW_ETH_MAC_PORT1.h" 61 #include "S32Z2_NETC_F0_GLOBAL.h" 62 63 #include "S32Z2_IERC_PCI.h" 64 65 #include "S32Z2_NETC_F1_GLOBAL.h" 66 #include "S32Z2_NETC_F0_GLOBAL.h" 67 68 #include "S32Z2_NETC_F2_COMMON.h" 69 #include "S32Z2_NETC_F3_COMMON.h" 70 71 #include "S32Z2_NETC_PRIV.h" 72 /** @brief MSI table base address of each SI. */ 73 #define NETC_ETH_IP_MSI_BASE_PTRS { (uint32 *)(0x74BB0000U), (uint32 *)(0x74C30000U), (uint32 *)(0x74C40000U), (uint32 *)(0x74C50000U), \ 74 (uint32 *)(0x74C60000U), (uint32 *)(0x74C70000U), (uint32 *)(0x74C80000U), (uint32 *)(0x74C90000U) } 75 76 /*================================================================================================== 77 * SOURCE FILE VERSION INFORMATION 78 ==================================================================================================*/ 79 #define NETC_ETH_IP_CFG_DEFINES_VENDOR_ID 43 80 #define NETC_ETH_IP_CFG_DEFINES_AR_RELEASE_MAJOR_VERSION 4 81 #define NETC_ETH_IP_CFG_DEFINES_AR_RELEASE_MINOR_VERSION 7 82 #define NETC_ETH_IP_CFG_DEFINES_AR_RELEASE_REVISION_VERSION 0 83 #define NETC_ETH_IP_CFG_DEFINES_SW_MAJOR_VERSION 1 84 #define NETC_ETH_IP_CFG_DEFINES_SW_MINOR_VERSION 0 85 #define NETC_ETH_IP_CFG_DEFINES_SW_PATCH_VERSION 0 86 87 /*================================================================================================== 88 * FILE VERSION CHECKS 89 ==================================================================================================*/ 90 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK 91 /* Checks against Mcal.h */ 92 #if ((NETC_ETH_IP_CFG_DEFINES_AR_RELEASE_MAJOR_VERSION != MCAL_AR_RELEASE_MAJOR_VERSION) || \ 93 (NETC_ETH_IP_CFG_DEFINES_AR_RELEASE_MINOR_VERSION != MCAL_AR_RELEASE_MINOR_VERSION)) 94 #error "AUTOSAR Version Numbers of Netc_Eth_Ip_Cfg_Defines.h and Mcal.h are different" 95 #endif 96 #endif 97 98 /*================================================================================================== 99 CONSTANTS 100 ==================================================================================================*/ 101 102 /*================================================================================================== 103 DEFINES AND MACROS 104 ==================================================================================================*/ 105 106 /** TODO: This must be generated in function of what user is using in configuration. 107 * LIMITATION: must be multiple of 8. 108 */ 109 /** @brief Total number of command BDRs. */ 110 #define NETC_ETH_IP_COMMAND_BDR_LENGTH (2U) /*!< BD ring length. 2 means the actual size of ring is 16 because it is in sets of 8 BDs */ 111 #define NETC_ETH_IP_SET_OF_BD (8U) /*!< set of BD */ 112 #define NETC_ETH_IP_ACTUAL_CBDR_SIZE ((NETC_ETH_IP_COMMAND_BDR_LENGTH) * (NETC_ETH_IP_SET_OF_BD)) /*!< CBDR actual size */ 113 114 /** @brief Development error enable/disable. */ 115 #define NETC_ETH_IP_DEV_ERROR_DETECT (STD_OFF) 116 /*! @brief Extended buffer support enable/disable */ 117 #define NETC_ETH_IP_EXTENDED_BUFF (STD_OFF) 118 119 /** @brief Minimum number of bytes supported by a frame. */ 120 #define NETC_ETH_IP_MIN_FRAME_LENGTH (16U) 121 122 /** @brief First buffer define. Used to check the hardware limitation of frame length */ 123 #define NETC_ETH_IP_FIRST_BUFFER_IDX (0U) 124 125 /** @brief Number of traffic classes. */ 126 #define NETC_ETH_IP_NUMBER_OF_PRIORITIES (8U) 127 128 /** @brief TX buffer descriptor final bit mask. */ 129 #define NETC_ETH_IP_TXBD_FINAL_MASK (0x80000000UL) 130 /** @brief TX buffer descriptor extended bit mask. */ 131 #define NETC_ETH_IP_TXBD_EXTENDED_BUFFER_MASK (0x40000000UL) 132 /** @brief TX buffer descriptor writeback bit mask. */ 133 #define NETC_ETH_IP_TXBD_WRITEBACK_MASK (0x04000000UL) 134 /** @brief TX buffer descriptor frame interrupt bit mask. */ 135 #define NETC_ETH_IP_TXBD_FRAME_INTERRUPT_MASK (0x20000000UL) 136 137 /** @brief TX frame buffer interrupt enable bit mask. */ 138 #define NETC_ETH_IP_TBIER_TXFIE_MASK (0x00000002UL) 139 140 /** @brief TX threshold(coalescing) interrupt enable bit mask. */ 141 #define NETC_ETH_IP_TBIER_TXTIE_MASK (0x00000001UL) 142 143 /* RX buffer descriptor information. */ 144 /** @brief RX buffer descriptor priority code point mask. */ 145 #define NETC_ETH_IP_RXBD_PCP_MASK (0xE0000000UL) 146 /** @brief RX buffer descriptor priority code point shift value. */ 147 #define NETC_ETH_IP_RXBD_PCP_SHIFT (29UL) 148 /** @brief RX buffer descriptor drop eligible indicator mask. */ 149 #define NETC_ETH_IP_RXBD_DEI_MASK (0x10000000UL) 150 /** @brief RX buffer descriptor drop eligible indicator shift value. */ 151 #define NETC_ETH_IP_RXBD_DEI_SHIFT (28UL) 152 /** @brief RX buffer descriptor VLAN identifier mask. */ 153 #define NETC_ETH_IP_RXBD_VID_MASK (0x0FFF0000UL) 154 /** @brief RX buffer descriptor VLAN identifier shift value. */ 155 #define NETC_ETH_IP_RXBD_VID_SHIFT (16UL) 156 /** @brief RX buffer descriptor VLAN tag protocol identifier mask. */ 157 #define NETC_ETH_IP_RXBD_TPID_MASK (0x00000003UL) 158 /** @brief RX buffer descriptor final mask. */ 159 #define NETC_ETH_IP_RXBD_FINAL_MASK (0x80000000UL) 160 /** @brief RX buffer descriptor ready mask. */ 161 #define NETC_ETH_IP_RXBD_READY_MASK (0x40000000UL) 162 /** @brief RX buffer descriptor length mask. */ 163 #define NETC_ETH_IP_RXBD_LENGTH_MASK (0x0000FFFFUL) 164 /** @brief RX buffer descriptor source port mask. */ 165 #define NETC_ETH_IP_RXBD_SRC_PORT_MASK (0x0000001FUL) 166 /** @brief RX buffer descriptor error mask. */ 167 #define NETC_ETH_IP_RXBD_ERROR_MASK (0x00FF0000UL) 168 /** @brief RX buffer descriptor error shift value. */ 169 #define NETC_ETH_IP_RXBD_ERROR_SHIFT (16UL) 170 /** @brief RX buffer descriptor L4 flag mask. */ 171 #define NETC_ETH_IP_RXBD_L4_FLAG_MASK (0x00001000UL) 172 /** @brief RX buffer descriptor L3 flag mask. */ 173 #define NETC_ETH_IP_RXBD_L3_FLAG_MASK (0x00000800UL) 174 /** @brief RX buffer descriptor timespamp flag mask. */ 175 #define NETC_ETH_IP_RXBD_TIMESTAMP_FLAG_MASK (0x00000400UL) 176 /** @brief RX buffer descriptor VLAN head flag mask. */ 177 #define NETC_ETH_IP_RXBD_VLAN_HEAD_FLAG_MASK (0x00000200UL) 178 /** @brief RX buffer descriptor host reason mask. */ 179 #define NETC_ETH_IP_RXBD_HOST_REASON_MASK (0x0000003CUL) 180 /** @brief RX buffer descriptor host reason shift value. */ 181 #define NETC_ETH_IP_RXBD_HOST_REASON_SHIFT (2UL) 182 /** @brief Receive threshold interrupt enable mask. */ 183 #define NETC_ETH_IP_RBIER_RXTIE_MASK (0x00000001UL) 184 185 /** @brief Station interface(SI) type. */ 186 #define Netc_Eth_Ip_SiBaseType NETC_F3_SI0_Type 187 188 /** @brief Virtual station interface(VSI) type. */ 189 #define Netc_Eth_Ip_VsiBaseType NETC_F3_SI1_Type 190 191 /** @brief Virtual function(VF) type */ 192 #define Netc_Eth_Ip_VfBaseType NETC_VF1_PCI_HDR_TYPE0_Type 193 194 /** @brief NETC PCI Express ECAM PF type */ 195 #define Netc_Eth_Ip_PCIeBaseType NETC_F0_PCI_HDR_TYPE0_Type 196 197 /** @brief ENETC function struct type. */ 198 #define Netc_Eth_Ip_EnetcBaseType NETC_F3_Type 199 200 /* Descriptor options for normal buffer. */ 201 /** @brief Flags shift value. */ 202 #define NETC_ETH_IP_FL_SHIFT (27U) 203 /** @brief This field contains the only Flags Qualifier setting supported by NETCv3. */ 204 /* It is used as a value because is the only one supported. If the next version support more, code will be updated. */ 205 #define NETC_ETH_IP_FLQ_VALUE (0x02U) 206 /** @brief Flags Qualifier shift value. */ 207 #define NETC_ETH_IP_FLQ_SHIFT (24U) 208 /** @brief Switch Management Sending Options shift value. */ 209 #define NETC_ETH_IP_SMSO_SHIFT (23U) 210 /** @brief Ingress/Egress switch port number this frame is to be injected towards/to be transmitted shift value. */ 211 #define NETC_ETH_IP_INGR_EGRESS_PORT_SHIFT (16U) 212 /** @brief Timestamp Reference Request shift value. */ 213 #define NETC_ETH_IP_TSR_SHIFT (22U) 214 /** @brief Internal Priority Value shift value. */ 215 #define NETC_ETH_IP_IPV_SHIFT (12U) 216 /** @brief Discard Resilience shift value. */ 217 #define NETC_ETH_IP_DR_SHIFT (10U) 218 219 /* TX write-back fields. */ 220 #define NETC_ETH_IP_HOSTREASON_WB_MASK (0x0000000FUL) 221 #define NETC_ETH_IP_HOSTREASON_WB_SHIFT (0x2U) 222 #define NETC_ETH_IP_HOSTREASON_REGULAR_FRAME (0x00000000UL) 223 #define NETC_ETH_IP_HOSTREASON_INGR_MIRROR (0x00000001UL) 224 #define NETC_ETH_IP_HOSTREASON_MAC_LEARN (0x00000002UL) 225 #define NETC_ETH_IP_HOSTREASON_TIMESTAMP (0x00000003UL) 226 #define NETC_ETH_IP_HOSTREASON_RESERVEDx4 (0x00000004UL) 227 #define NETC_ETH_IP_HOSTREASON_RESERVEDx5 (0x00000005UL) 228 #define NETC_ETH_IP_HOSTREASON_RESERVEDx6 (0x00000006UL) 229 #define NETC_ETH_IP_HOSTREASON_RESERVEDx7 (0x00000007UL) 230 #define NETC_ETH_IP_HOSTREASON_SW_PTP (0x00000008UL) 231 #define NETC_ETH_IP_HOSTREASON_SWx9 (0x00000009UL) 232 #define NETC_ETH_IP_HOSTREASON_SWxA (0x0000000AUL) 233 #define NETC_ETH_IP_HOSTREASON_SWxB (0x0000000BUL) 234 #define NETC_ETH_IP_HOSTREASON_SWxC (0x0000000CUL) 235 #define NETC_ETH_IP_HOSTREASON_SWxD (0x0000000DUL) 236 #define NETC_ETH_IP_HOSTREASON_SWxE (0x0000000EUL) 237 #define NETC_ETH_IP_HOSTREASON_SWxF (0x0000000FUL) 238 #define NETC_ETH_IP_TX_WB_STATUS_MASK (0x01FFU) 239 240 /* Descriptor options for extended buffer. */ 241 #if (STD_ON == NETC_ETH_IP_EXTENDED_BUFF) 242 /** @brief Priority code point shift value. */ 243 #define NETC_ETH_IP_PCP_SHIFT (29U) 244 /** @brief Priority code point bit mask. */ 245 #define NETC_ETH_IP_PCP_MASK (0xE0000000UL) 246 /** @brief Drop eligible indicator shift value. */ 247 #define NETC_ETH_IP_DEI_SHIFT (28U) 248 /** @brief Drop eligible indicator bit mask. */ 249 #define NETC_ETH_IP_DEI_MASK (0x10000000UL) 250 /** @brief VLAN identifier shift value. */ 251 #define NETC_ETH_IP_VID_SHIFT (16U) 252 /** @brief VLAN identifier bit mask. */ 253 #define NETC_ETH_IP_VID_MASK (0x0FFF0000UL) 254 /** @brief Tag protocol identifier shift value. */ 255 #define NETC_ETH_IP_TPID_SHIFT (14U) 256 /** @brief Tag protocol identifier bit mask. */ 257 #define NETC_ETH_IP_TPID_MASK (0x0000C000UL) 258 /** @brief Extension flags shift value. */ 259 #define NETC_ETH_IP_E_FLAGS_SHIFT (16U) 260 /** @brief Extension flags bit mask. */ 261 #define NETC_ETH_IP_E_FLAGS_MASK (0x00FF0000UL) 262 #endif 263 264 /* VSI-to-PSI message used defines. */ 265 /** @brief Define the bit used by VSI-to-PSI messaging to show if the process is still in progress. */ 266 #define NETC_ETH_IP_VSI_MSG_PROGRESS_STATUS (0x00000001UL) 267 /** @brief Define the bit used to show the message status. */ 268 #define NETC_ETH_IP_VSI_MSG_STATUS (0x00000002UL) 269 /** @brief Define used to code the 32 bytes message. */ 270 #define NETC_ETH_IP_VSITOPSI_MSG_SIZE (0x00000001UL) 271 /** @brief Define VSI Enable value for PSIMSGSR register. */ 272 #define NETC_ETH_IP_VSI_ENABLE (1U) 273 /** @brief Define Message receive complete value for PSIMSGRR register. */ 274 #define NETC_ETH_IP_MSG_RCV_COMPLETE (1U) 275 /** @brief Define PSI Message shift value for PSIMSGSR register. */ 276 #define NETC_ETH_IP_PSI_MSG_POS (16U) 277 /** @brief Define interrupt enable register for the PSI. */ 278 #define NETC_ETH_IP_PSIIER_MASK (0xFE00FEU) 279 /** @brief Define PSI message receive event mask */ 280 #define NETC_ETH_IP_PSI_MR_EV_MASK (0xFEU) 281 /** @brief Define FLR event mask */ 282 #define NETC_ETH_IP_FLR_EV_MASK (0x00FE0000UL) 283 /** @brief Define FLRn shift value for PSIIDR register, x = 1..7 */ 284 #define NETC_ETH_IP_PSI_IDR_FLR(x) (16U + (x)) 285 286 #define NETC_ETH_IP_VLAN_SUPPORT (STD_ON) 287 /*! @brief Enables/Disables internal cache management */ 288 #define NETC_ETH_IP_HAS_CACHE_MANAGEMENT (STD_OFF) 289 290 /*!< the length of response data buffer in bytes for Ingress Port Filter table */ 291 #define NETC_ETH_IP_INGRESSPORTFILTERTABLE_REQBUFFER_LEN (224U) 292 /*!< the length of response data buffer in bytes for Ingress Port Filter table */ 293 #define NETC_ETH_IP_INGRESSPORTFILTERTABLE_RSPBUFFER_LEN (236U) 294 /*!< the length of response data buffer in bytes for time gate scheduling table */ 295 #define NETC_ETH_IP_TGSTABLE_RSPBUFFER_LEN (12U) 296 /*!< the length of request data buffer in bytes for add cmd for rate policer table */ 297 #define NETC_ETH_IP_RATEPOLICERTABLE_REQBUFFER_LEN (27U) 298 /*!< the length of response data buffer in bytes for rate policer table */ 299 #define NETC_ETH_IP_RATEPOLICERTABLE_RSPBUFFER_LEN (108U) 300 /*!< 0 bytes response data buffer length for add, update and delete cmd for tables */ 301 #define NETC_ETH_IP_TABLE_COMMON_RSPBUFFER_0BYTE_LEN (0U) 302 /*!< 4 bytes response data buffer length for add, update and delete cmd for tables */ 303 #define NETC_ETH_IP_TABLE_COMMON_RSPBUFFER_4BYTE_LEN (4U) 304 /*!< 8 bytes request data buffer length for query and delete cmd for tables */ 305 #define NETC_ETH_IP_TABLE_COMMON_REQBUFFER_8BYTE_LEN (8U) 306 /*!< 53 uint32 items of Ingress Port Filter Table KEYE_DATA Format */ 307 #define NETC_ETH_IP_INGRESSPORTFILTERTABLE_KEYE_DATA_LEN (53U) 308 /*!< 16-byte aligned memory for command tables */ 309 #define NETC_ETH_IP_TABLE_ALIGNED_SIZE (16U) 310 /* The maximum number of VLAN Filter Table entries */ 311 #define NETC_ETH_IP_NUMBER_OF_VLAN_FILTER_ENTRIES (0U) 312 /* The maximum number of gate control list */ 313 #define NETC_ETH_MAX_NUMBER_OF_GATECONTROLLIST_ENTRIES (2U) 314 /* The maximum number of static ingress port filter table list */ 315 #define NETC_ETH_MAX_NUMBER_OF_IPFTABLE_LIST (3U) 316 #define NETC_ETH_IP_TABLEDATA_BUFFER_LENGTH ((236)/4) 317 318 /* Maxim number of registers that can be interrogated in case of the correctable errors */ 319 #define NETC_ETH_IP_MAX_CORRECTABLE_ERROR_REPORTING_STATISTICS_LENGTH (1U) 320 321 /* Maxim number of registers that can be interrogated in case of the uncorrectable errors */ 322 #define NETC_ETH_IP_MAX_UNCORRECTABLE_ERROR_REPORTING_STATISTICS_LENGTH (27u) 323 /*================================================================================================== 324 ENUMS 325 ==================================================================================================*/ 326 327 /*================================================================================================== 328 STRUCTURES AND OTHER TYPEDEFS 329 ==================================================================================================*/ 330 331 /*================================================================================================== 332 GLOBAL VARIABLE DECLARATIONS 333 ==================================================================================================*/ 334 335 /*================================================================================================== 336 FUNCTION PROTOTYPES 337 ==================================================================================================*/ 338 339 #ifdef __cplusplus 340 } 341 #endif 342 343 /** @} */ 344 345 #endif /* NETC_ETH_IP_CFG_DEFINES_H */ 346
