1 /* 2 * Copyright 2021-2023 NXP 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef NETC_ETHSWT_IP_TYPES_H 8 #define NETC_ETHSWT_IP_TYPES_H 9 10 /** 11 * @file Netc_EthSwt_Ip_Types.h 12 * @addtogroup NETC_ETHSWT_IP NETC_ETHSWT Driver 13 * @{ 14 */ 15 16 #ifdef __cplusplus 17 extern "C"{ 18 #endif 19 20 21 /*================================================================================================== 22 * INCLUDE FILES 23 * 1) system and project includes 24 * 2) needed interfaces from external units 25 * 3) internal and external interfaces from this unit 26 ==================================================================================================*/ 27 #include "Netc_EthSwt_Ip_Cfg.h" 28 #include "Netc_EthSwt_Ip_Cfg_Defines.h" 29 #include "Eth_GeneralTypes.h" 30 #include "StandardTypes.h" 31 32 /*================================================================================================== 33 * SOURCE FILE VERSION INFORMATION 34 ==================================================================================================*/ 35 #define NETC_ETHSWT_IP_TYPES_VENDOR_ID 43 36 #define NETC_ETHSWT_IP_TYPES_MODULE_ID 89 37 #define NETC_ETHSWT_IP_TYPES_AR_RELEASE_MAJOR_VERSION 4 38 #define NETC_ETHSWT_IP_TYPES_AR_RELEASE_MINOR_VERSION 7 39 #define NETC_ETHSWT_IP_TYPES_AR_RELEASE_REVISION_VERSION 0 40 #define NETC_ETHSWT_IP_TYPES_SW_MAJOR_VERSION 1 41 #define NETC_ETHSWT_IP_TYPES_SW_MINOR_VERSION 0 42 #define NETC_ETHSWT_IP_TYPES_SW_PATCH_VERSION 0 43 44 /*================================================================================================== 45 * FILE VERSION CHECKS 46 ==================================================================================================*/ 47 48 /* Checks against Netc_EthSwt_Ip_Cfg.h */ 49 #if (NETC_ETHSWT_IP_TYPES_VENDOR_ID != NETC_ETHSWT_IP_CFG_VENDOR_ID) 50 #error "Netc_EthSwt_Ip_Types.h and Netc_EthSwt_Ip_Cfg.h have different vendor ids" 51 #endif 52 #if (( NETC_ETHSWT_IP_TYPES_AR_RELEASE_MAJOR_VERSION != NETC_ETHSWT_IP_CFG_AR_RELEASE_MAJOR_VERSION) || \ 53 ( NETC_ETHSWT_IP_TYPES_AR_RELEASE_MINOR_VERSION != NETC_ETHSWT_IP_CFG_AR_RELEASE_MINOR_VERSION) || \ 54 ( NETC_ETHSWT_IP_TYPES_AR_RELEASE_REVISION_VERSION != NETC_ETHSWT_IP_CFG_AR_RELEASE_REVISION_VERSION)) 55 #error "AUTOSAR Version Numbers of Netc_EthSwt_Ip_Types.h and Netc_EthSwt_Ip_Cfg.h are different" 56 #endif 57 #if (( NETC_ETHSWT_IP_TYPES_SW_MAJOR_VERSION != NETC_ETHSWT_IP_CFG_SW_MAJOR_VERSION) || \ 58 ( NETC_ETHSWT_IP_TYPES_SW_MINOR_VERSION != NETC_ETHSWT_IP_CFG_SW_MINOR_VERSION) || \ 59 ( NETC_ETHSWT_IP_TYPES_SW_PATCH_VERSION != NETC_ETHSWT_IP_CFG_SW_PATCH_VERSION)) 60 #error "Software Version Numbers of Netc_EthSwt_Ip_Types.h and Netc_EthSwt_Ip_Cfg.h are different" 61 #endif 62 63 /* Checks against Netc_EthSwt_Ip_Cfg_Defines.h */ 64 #if (NETC_ETHSWT_IP_TYPES_VENDOR_ID != NETC_ETHSWT_IP_CFG_DEFINES_VENDOR_ID) 65 #error "Netc_EthSwt_Ip_Types.c and Netc_EthSwt_Ip_Cfg_Defines.h have different vendor ids" 66 #endif 67 #if (( NETC_ETHSWT_IP_TYPES_AR_RELEASE_MAJOR_VERSION != NETC_ETHSWT_IP_CFG_DEFINES_AR_RELEASE_MAJOR_VERSION) || \ 68 ( NETC_ETHSWT_IP_TYPES_AR_RELEASE_MINOR_VERSION != NETC_ETHSWT_IP_CFG_DEFINES_AR_RELEASE_MINOR_VERSION) || \ 69 ( NETC_ETHSWT_IP_TYPES_AR_RELEASE_REVISION_VERSION != NETC_ETHSWT_IP_CFG_DEFINES_AR_RELEASE_REVISION_VERSION)) 70 #error "AUTOSAR Version Numbers of Netc_EthSwt_Ip_Types.c and Netc_EthSwt_Ip_Cfg_Defines.h are different" 71 #endif 72 #if (( NETC_ETHSWT_IP_TYPES_SW_MAJOR_VERSION != NETC_ETHSWT_IP_CFG_DEFINES_SW_MAJOR_VERSION) || \ 73 ( NETC_ETHSWT_IP_TYPES_SW_MINOR_VERSION != NETC_ETHSWT_IP_CFG_DEFINES_SW_MINOR_VERSION) || \ 74 ( NETC_ETHSWT_IP_TYPES_SW_PATCH_VERSION != NETC_ETHSWT_IP_CFG_DEFINES_SW_PATCH_VERSION)) 75 #error "Software Version Numbers of Netc_EthSwt_Ip_Types.c and Netc_EthSwt_Ip_Cfg_Defines.h are different" 76 #endif 77 78 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK 79 #if ((NETC_ETHSWT_IP_TYPES_AR_RELEASE_MAJOR_VERSION != ETH_GENERALTYPES_AR_RELEASE_MAJOR_VERSION) || \ 80 (NETC_ETHSWT_IP_TYPES_AR_RELEASE_MINOR_VERSION != ETH_GENERALTYPES_AR_RELEASE_MINOR_VERSION) \ 81 ) 82 #error "AutoSar Version Numbers of Netc_EthSwt_Ip_Types.h and Eth_GeneralTypes.h are different" 83 #endif 84 /* Check if header file and StandardTypes.h are of the same AUTOSAR version */ 85 #if ((NETC_ETHSWT_IP_TYPES_AR_RELEASE_MAJOR_VERSION != STD_AR_RELEASE_MAJOR_VERSION) || \ 86 (NETC_ETHSWT_IP_TYPES_AR_RELEASE_MINOR_VERSION != STD_AR_RELEASE_MINOR_VERSION)) 87 #error "AUTOSAR Version Numbers of Netc_EthSwt_Ip_Types.h and StandardTypes.h are different" 88 #endif 89 #endif 90 /*================================================================================================== 91 * CONSTANTS 92 ==================================================================================================*/ 93 94 #define NETC_ETHSWT_NUMBER_OF_PSEUDO_PORT (1U) /*!< number of pseudoport */ 95 #define NETC_ETHSWT_NUMBER_OF_PORTS 3 /*!< number of ports */ 96 #define NETC_ETHSWT_NUMBER_OF_MAC_PORTS (2U) /*!< number of mac ports*/ 97 #define NETC_ETHSWT_NUMBER_OF_VID_PER_PORT (255U) /*!< 3 number of vid per port */ 98 99 #define NETC_ETHSWT_IP_FDB_KEYE_DATA_ITEMS (3U) /*!< 3 uint32 items of FDB table KEYE DATA Format */ 100 #define NETC_ETHSWT_IP_FDB_SEARCH_CRITERIA_DATA_ITEMS (8U) /*!< 8 uint32 items of FDB table SEARCH CRITERIA Format */ 101 102 #define NETC_ETHSWT_TABLE_CFGEDATA_ITEMS (4U) /*!< 4 uint32 items of CFGE_DATA Format for Tables */ 103 104 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_KEYE_DATA_LEN (53U) /*!< 53 uint32 items of Ingress Port Filter Table KEYE_DATA Format */ 105 106 #define NETC_ETHSWT_NUMBER_OF_PROFILES (2U) 107 #define NETC_ETHSWT_NUMBER_OF_PCP_DEI (16U) 108 #define NETC_ETHSWT_NUMBER_OF_PCP (8U) 109 #define NETC_ETHSWT_NUMBER_OF_IPV (8U) 110 #define NETC_ETHSWT_NUMBER_OF_DR (4U) 111 112 #define NETC_ETHSWT_EFMEID_FOR_MIRRORING (0U) /* Default egress frame modification entry id for mirroring */ 113 #define NETC_ETHSWT_EFM_LEN_CHANGE_FOR_MIRRORING (4U) /* EFM_LEN_CHANGE value for double tagging when modifying mirrored egress frames */ 114 /*================================================================================================== 115 * DEFINES AND MACROS 116 ==================================================================================================*/ 117 118 /*================================================================================================== 119 * ENUMS 120 ==================================================================================================*/ 121 122 123 /*! 124 * @brief Ingress congestion management priority. Used for congestion management. 125 */ 126 typedef enum 127 { 128 NETC_ETHSWT_IP_ICM_LOW_PRIORITY = 0U, /*!< ICM low priority */ 129 NETC_ETHSWT_IP_ICM_HIGH_PRIORITY = 1U /*!< ICM high priority */ 130 } Netc_EthSwt_Ip_ICMType; 131 132 /*! 133 * @brief Callback function invoked when a general event is encountered 134 */ 135 typedef void (*Netc_EthSwt_Ip_CallbackType)(uint8 Instance); 136 137 /*! 138 * @brief Callback function invoked when a channel event is encountered 139 */ 140 typedef void (*Netc_EthSwt_Ip_ChCallbackType)(uint8 Instance, uint8 Channel); 141 142 /*================================================================================================== 143 * STRUCTURES AND OTHER TYPEDEFS 144 ==================================================================================================*/ 145 /*! 146 * @brief Query action enum types for tables in Switch. 147 */ 148 typedef enum { 149 NETC_ETHSWT_TABLES_FULL_QUERY = 0x0U, /*!< Full Query */ 150 NETC_ETHSWT_TABLES_ENTRY_ID_QUERY = 0x1U /*!< Entry_Id query only */ 151 } Netc_EthSwt_Ip_TablesQueryActionType; 152 153 /*! 154 * @brief defines FDB entries. 155 * @implements Netc_EthSwt_Ip_FdbEntryDataType_struct 156 */ 157 typedef struct 158 { 159 uint8 MacAddr[6]; /*!< MAC Address */ 160 uint16 FID; /*!< Filtering ID */ 161 uint32 SwitchPortEgressBitMask; /*!< Port Bitmap */ 162 uint32 ET_EID; /*!< Egress Treatment Table Entry ID */ 163 uint8 CutThroughDisable; /*!< CTD */ 164 uint8 OverridETEID; /*!< OETEID */ 165 uint8 EgressPort; /*!< EPORT */ 166 boolean IngressMirroringEnable; /*!< IMIRE */ 167 boolean DynamicEntry; /*!< 0b = Static entry, 1b = Dynamic entry */ 168 boolean TimeStampCapture; /*!< TIMECAPE */ 169 } Netc_EthSwt_Ip_FdbEntryDataType; 170 171 /*! 172 * @brief defines Vlan Filter entries. 173 * @implements Netc_EthSwt_Ip_VlanFilterEntryDataType_struct 174 */ 175 typedef struct 176 { 177 uint32 PortMembershipBitmap; /*!< Port Membership Bitmap */ 178 uint16 VlanID; /*!< Vlan ID */ 179 uint16 FID; /*!< Filtering ID */ 180 uint32 EgressTreatmentApplicabilityPortBitmap; /*!< Egress Treatment Applicability Port Bitmap */ 181 uint32 BaseEgressTreatmentEntryID; /*!< Base Egress Treatment Entry ID */ 182 uint8 SpanningTreeGroupMemberId; /*!< STG_ID */ 183 uint8 MacForwardingOptions; /*!< MFO */ 184 uint8 MacLearningOptions; /*!< MLO */ 185 boolean IpMulticastFloodingEnable; /*!< IP Multicast Flooding Enable */ 186 boolean IpMulticastFilteringEnable; /*!< IP Multicast Filtering Enable */ 187 } Netc_EthSwt_Ip_VlanFilterEntryDataType; 188 189 /****************************************************************************** 190 * Definitions 191 *****************************************************************************/ 192 #define NETC_ETHSWT_IP_FDB_TABLE_ID (15U) /*!< FDB table id */ 193 #define NETC_ETHSWT_IP_VLAN_FILTER_TABLE_ID (18U) /*!< Vlan filter table id */ 194 #define NETC_ETHSWT_IP_EGRESS_COUNT_TABLE_ID (39U) /*!< Egress Count table id */ 195 #define NETC_ETHSWT_IP_EGRESS_TREATMENT_TABLE_ID (33U) /*!< Egress Treatment table id */ 196 #define NETC_ETHSWT_IP_FRM_MODIFICATION_TABLE_ID (40U) /*!< Frame Modification table id */ 197 #define NETC_ETHSWT_IP_INGRESS_PORT_FILTER_TABLE_ID (13U) /*!< Ingress Port Filter table id */ 198 #define NETC_ETHSWT_IP_TIME_GATE_SCHEDULING_TABLE_ID (5U) /*!< Ingress Port Filter table id */ 199 #define NETC_ETHSWT_IP_RATE_POLICER_TABLE_ID (10U) /*!< Rate Policer table id */ 200 #define NETC_ETHSWT_IP_INGRESS_STREAM_IDEN_TABLE_ID (30U) /*!< Ingress Stream Identification table id */ 201 #define NETC_ETHSWT_IP_INGRESS_STREAM_TABLE_ID (31U) /*!< Ingress Stream table id */ 202 #define NETC_ETHSWT_IP_INGRESS_STREAM_FILTER_TABLE_ID (32U) /*!< Ingress Stream Filter table id */ 203 #define NETC_ETHSWT_IP_INGRESS_SEQ_GENERATION_TABLE_ID (34U) /*!< Ingress Sequence Generation table id */ 204 #define NETC_ETHSWT_IP_EGRESS_SEQ_RECOVERY_TABLE_ID (35U) /*!< Egress Sequence Recovery table id */ 205 #define NETC_ETHSWT_IP_STREAM_GATE_INSTANCE_TABLE_ID (36U) /*!< Stream Gate Instance table id */ 206 #define NETC_ETHSWT_IP_STREAM_GATE_CTRL_LIST_TABLE_ID (37U) /*!< Stream Gate Control List table id */ 207 #define NETC_ETHSWT_IP_CLASS_SCHEDULER_TABLE_ID (23U) /*!< ETM Class Scheduler table id */ 208 #define NETC_ETHSWT_IP_INGRESS_STREAM_COUNT_TABLE_ID (38U) /*!< INgress Stream Count table id */ 209 210 #define NETC_ETHSWT_IP_BD_ENTRY_EXIST (1U) /*!< BD entry exist */ 211 #define NETC_ETHSWT_IP_BD_ENTRY_NOT_EXIST (0U) /*!< BD entry not exist*/ 212 213 #define NETC_ETHSWT_IP_BD_NULL_ENTRY_ID (0xFFFFFFFFUL) /*!< BD null entry */ 214 215 /*! 216 * @brief defines CBDR status type. 217 */ 218 typedef uint32 Netc_EthSwt_Ip_CBDRStatusType; 219 #define NETC_ETHSWT_CBDRSTATUS_SUCCES (0x0UL) /*!< cbdr status success */ 220 #define NETC_ETHSWT_CBDRSTATUS_INDEX_ERROR (0x1UL) /*!< index of ring should be 0 or 1 */ 221 #define NETC_ETHSWT_CBDRSTATUS_RINGFULL (0x2UL) /*!< Ring is full */ 222 #define NETC_ETHSWT_CBDRSTATUS_RR_ERROR (0x3UL) /*!< The hardware does not consume the command, or the operation has not finished by hardware. */ 223 #define NETC_ETHSWT_CBDRSTATUS_NUMMATCHED_ERROR (0x4UL) /*!< The NUM_MATCHED field should be 1 when the entry exists for any commands */ 224 #define NETC_ETHSWT_CBDRSTATUS_ACCESSMETHOD_ERROR (0x5UL) /*!< Access_method should be 0, 1, or 2, or the command is not supported by this access method */ 225 #define NETC_ETHSWT_CBDRSTATUS_TABLE_OPERATION_TIMEOUT (0x6UL) /*!< Table operations timeout for commands like add, query, delete etc. */ 226 #define NETC_ETHSWT_CBDRSTATUS_INVALID_TABLE_ID (0x080UL) /*!< Invalid table ID */ 227 #define NETC_ETHSWT_CBDRSTATUS_NOT_SUPPORTED_ACCESS_METHOD (0x081UL) /*!< Access method specified is not supported */ 228 #define NETC_ETHSWT_CBDRSTATUS_TABLE_INDEX_OUTOFRANGE (0x082UL) /*!< Table index out of range */ 229 #define NETC_ETHSWT_CBDRSTATUS_BUFFER_NOT_SUFFICIENT (0x083UL) /*!< Request data buffer size or response data buffer size is not sufficient */ 230 #define NETC_ETHSWT_CBDRSTATUS_INVALID_CMD (0x084UL) /*!< Invalid command */ 231 #define NETC_ETHSWT_CBDRSTATUS_REQUEST_DATA_BUFFER_ERROR (0x085UL) /*!< Request Data buffer error */ 232 #define NETC_ETHSWT_CBDRSTATUS_ECC_OR_PARITY_ERROR (0x086UL) /*!< Multi-bit ECC or parity error observed during command processing */ 233 #define NETC_ETHSWT_CBDRSTATUS_EXCEEDED_HASH_ENTRY_LIMIT (0x087UL) /*!< Exceeded hash entry limit */ 234 #define NETC_ETHSWT_CBDRSTATUS_EXCEEDED_MAXIMUM_HASH_COLLISION_CHAIN_LIMIT (0x088UL) /*!< Exceeded maximum hash collision chain limit */ 235 #define NETC_ETHSWT_CBDRSTATUS_INVALID_ENTRY_ID (0x089UL) /*!< Invalid ENTRY_ID for HW Managed tables (hash, TCAM) */ 236 #define NETC_ETHSWT_CBDRSTATUS_SEARCH_CMD_FILLED_THE_RESPONSE_DATA_BUFFER (0x08AUL) /*!< Search command filled the response data buffer before completing the command */ 237 #define NETC_ETHSWT_CBDRSTATUS_CMD_FOR_INDEX_TABLE_BEFORE_OSR (0x08BUL) /*!< Command for index table before OSR[ITM_STATE]=0 */ 238 #define NETC_ETHSWT_CBDRSTATUS_INVALID_QUERRY_ACTION (0x08CUL) /*!< Query action specifed is invalid */ 239 #define NETC_ETHSWT_CBDRSTATUS_INVALID_TABLE_ACCESS_PRIVILEGE (0x08DUL) /*!< Invalid table access privilege */ 240 #define NETC_ETHSWT_CBDRSTATUS_SYSTEM_BUS_READ_ERROR (0x08EUL) /*!< System Bus Read Error encountered while processing the command. */ 241 #define NETC_ETHSWT_CBDRSTATUS_SYSTEM_BUS_WRITE_ERROR (0x08FUL) /*!< System Bus Write Error encountered while processing the command. */ 242 #define NETC_ETHSWT_CBDRSTATUS_CLIENT_FAULT (0x090UL) /*!< Client encountered a fault while processing the command. */ 243 #define NETC_ETHSWT_CBDRSTATUS_RESERVED_ERROR (0x091UL) /*!< 0x091 to 0x0FF = reserved */ 244 #define NETC_ETHSWT_CBDRSTATUS_TABLE_SPECIFIC_ERROR (0x100UL) /*!< 0x100 to 0xFFF = Table specific error codes */ 245 #define NETC_ETHSWT_CBDRSTATUS_UPTATE_EXISTING_ADMIN_GATE_CONTROL (0x0D1UL) /* Update action attempted on an existing admin gate control. An existing admin gate control list cannot be modified, Delete admin gate control list first before creating a new admin list. (Use update action with ADMIN_CONTROL_LIST_LENGTH =0 to perform delete). */ 246 #define NETC_ETHSWT_CBDRSTATUS_UPDATE_ACTION_EXCEED_MAX_GCL_LEN (0x0D2UL) /* Update action attempted exceeds TGSTCAPR[MAX_GCL_LEN]. */ 247 #define NETC_ETHSWT_CBDRSTATUS_UPDATE_ACTION_EXCEED_NUM_WORDS (0x0D3UL) /* Update action attempted exceeds TGSTCAPR[NUM_WORDS]. */ 248 #define NETC_ETHSWT_CBDRSTATUS_INSUFFICIENT_RESOURCES (0x0D4UL) /* Insufficient resources to perform the requested operation (not enough free time gate list entries) */ 249 #define NETC_ETHSWT_CBDRSTATUS_TRANSMITTING_TIME_NOT_SUFFICIENT (0x0D5UL) /* Update action attempted with ADMIN_CYCLE_TIME, ADMIN_TIME_INTERVAL_GE_i or truncated ADMIN_TIME_INTERVAL_GE_n due ADMIN_CYCLE_TIME specified is not sufficient to transmit 64 byte of frame data + header overhead. Where header overhead = PTXSDUOR[PTXSDUOR] + PTXSDUOR[PPDU_BCO]. */ 250 #define NETC_ETHSWT_CBDRSTATUS_ADMIN_BASE_TIME_IS_MORE_THAN_1S (0x0D6UL) /* Update action attempted with ADMIN_BASE_TIME specified is more than one second in the past from tcs advance time. */ 251 #define NETC_ETHSWT_CBDRSTATUS_ADMIN_CYCLE_TIME_OVERFLOW (0x0D7UL) /* Update action attempted with ADMIN_CYCLE_TIME + ADMIN_CYCLE_TIME_EXT is greater than 2^32-1. */ 252 #define NETC_ETHSWT_CBDRSTATUS_RETRY_QUERY (0x0D8UL) /* Query action issued when config change occurred. Retry query. */ 253 #define NETC_ETHSWT_CBDRSTATUS_INVALID_ADMIN_HR_CB_GE (0x0D9UL) /* Update action attempted with ADMIN_HR_CB_GE_i set to an invalid value. */ 254 255 /*! 256 * @brief defines access method type. 257 */ 258 typedef enum { 259 NETC_ETHSWT_ENTRY_ID_MATCH = 0x0U, /*!< if entry id match */ 260 NETC_ETHSWT_EXACT_MATCH_KEY_ELEMENT_MATCH, /*!< if exact match key element match */ 261 NETC_ETHSWT_SEARCH_METHOD, /*!< search method */ 262 NETC_ETHSWT_TERNARY_MATCH_KEY_ELEMENT_MATCH /*!< if ternary match key element */ 263 } Netc_EthSwt_Ip_AccessMethodType; 264 265 /*! 266 * @brief defines commands type. 267 * @implements Netc_EthSwt_Ip_CommandsType_enum 268 */ 269 typedef enum { 270 NETC_ETHSWT_DELETE_CMD = 0x1U, /*!< delete command */ 271 NETC_ETHSWT_UPDATE_CMD = 0x2U, /*!< update command */ 272 NETC_ETHSWT_QUERY_CMD = 0x4U, /*!< query command*/ 273 NETC_ETHSWT_QUERY_FOLLOWEDBY_DELETE_CMD = 0x5U, /*!< query followed by delete command */ 274 NETC_ETHSWT_QUERY_FOLLOWEDBY_UPDATE_CMD = 0x6U, /*!< query followed by update command */ 275 NETC_ETHSWT_ADD_CMD = 0x8U, /*!< add a command */ 276 NETC_ETHSWT_ADD_OR_UPDATE_CMD = 0xAU, /*!< add or update a command */ 277 NETC_ETHSWT_ADD_FOLLOWEDBY_QUERY_CMD = 0xCU, /*!< add followed by query command */ 278 NETC_ETHSWT_ADD_FOLLOWEDBY_QUERY_FOLLOWEDBY_UPDATE_CMD = 0xEU /*!< add followed by query followed by update command */ 279 } Netc_EthSwt_Ip_CommandsType; 280 281 /*! 282 * @brief CMBDR requeste length field. 283 */ 284 #define NETC_ETHSWT_IP_CMDBD_REQFMT_REQUEST_LENGTH_SHIFT (20U) 285 /*! 286 * @brief CMBDR requeste length field mask. 287 */ 288 #define NETC_ETHSWT_IP_CMDBD_REQFMT_REQUEST_LENGTH_MASK (0xFFF00000UL) 289 /*! 290 * @brief CMBDR requeste lengtht. 291 */ 292 #define NETC_ETHSWT_IP_CMDBD_REQFMT_REQUEST_LENGTH(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_REQUEST_LENGTH_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_REQUEST_LENGTH_MASK) 293 294 /*! 295 * @brief CMBDR response length field. 296 */ 297 #define NETC_ETHSWT_IP_CMDBD_REQFMT_RESPONSE_LENGTH_SHIFT (0U) 298 /*! 299 * @brief CMBDR response length field mask. 300 */ 301 #define NETC_ETHSWT_IP_CMDBD_REQFMT_RESPONSE_LENGTH_MASK (0x000FFFFFUL) 302 /*! 303 * @brief CMBDR response length. 304 */ 305 #define NETC_ETHSWT_IP_CMDBD_REQFMT_RESPONSE_LENGTH(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_RESPONSE_LENGTH_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_RESPONSE_LENGTH_MASK) 306 307 /** @brief CMD field */ 308 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD_SHIFT (0U) 309 /** @brief CMD field mask */ 310 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD_MASK (0x0000000FUL) 311 /** @brief CMD field set */ 312 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD_MASK) 313 314 /*! 315 * @brief CMBDR request config access method field. 316 */ 317 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD_SHIFT (12U) 318 /*! 319 * @brief CMBDR request config access method field mask. 320 */ 321 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD_MASK (0x00003000UL) 322 /*! 323 * @brief CMBDR request config field access method. 324 */ 325 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD_MASK) 326 327 /*! 328 * @brief CMBDR request config field table id. 329 */ 330 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID_SHIFT (16U) 331 /*! 332 * @brief CMBDR request config field table id mask. 333 */ 334 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID_MASK (0x00FF0000UL) 335 /*! 336 * @brief CMBDR request config table id. 337 */ 338 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID_MASK) 339 340 /*! 341 * @brief CMBDR request version field. 342 */ 343 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION_SHIFT (24U) 344 /*! 345 * @brief CMBDR request version field mask. 346 */ 347 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION_MASK (0x3F000000UL) 348 /*! 349 * @brief CMBDR request version. 350 */ 351 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION_MASK) 352 353 /*! 354 * @brief CMBDR request config field. 355 */ 356 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI_SHIFT (30U) 357 /*! 358 * @brief CMBDR request config field mask. 359 */ 360 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI_MASK (0x4F000000UL) 361 /*! 362 * @brief CMBDR request config. 363 */ 364 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI_MASK) 365 366 /*! 367 * @brief CMBDR request RR field. 368 */ 369 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_RR_SHIFT (31U) 370 /*! 371 * @brief CMBDR request RR field mask. 372 */ 373 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_RR_MASK (0x80000000UL) 374 /*! 375 * @brief CMBDR request RR. 376 */ 377 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_RR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_RR_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_RR_MASK) 378 379 /*! 380 * @brief CMBDR request NPF field. 381 */ 382 #define NETC_ETHSWT_IP_CMDBD_REQFMT_NPF_FIELD_SHIFT (15U) 383 /*! 384 * @brief CMBDR request NPF field mask. 385 */ 386 #define NETC_ETHSWT_IP_CMDBD_REQFMT_NPF_FIELD_MASK (0x00008000UL) 387 /*! 388 * @brief CMBDR request NPF. 389 */ 390 #define NETC_ETHSWT_IP_CMDBD_REQFMT_NPF_FIELD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_NPF_FIELD_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_NPF_FIELD_MASK) 391 392 /*! 393 * @brief Rate Policer Table FEE_DATA Format 394 */ 395 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_FEE_DATA_FEN_SHIFT (0U) 396 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_FEE_DATA_FEN_MASK (0x00000001UL) 397 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_FEE_DATA_FEN(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_RATEPOLICERTABLE_FEE_DATA_FEN_SHIFT)) & NETC_ETHSWT_IP_RATEPOLICERTABLE_FEE_DATA_FEN_MASK) 398 399 /*! 400 * @brief Rate Policer Table CFGE_DATA config bits Format 401 */ 402 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_MREN_SHIFT (0U) 403 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_MREN_MASK (0x00000001UL) 404 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_MREN(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_MREN_SHIFT)) & NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_MREN_MASK) 405 406 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_DOY_SHIFT (1U) 407 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_DOY_MASK (0x00000002UL) 408 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_DOY(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_DOY_SHIFT)) & NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_DOY_MASK) 409 410 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_CM_SHIFT (2U) 411 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_CM_MASK (0x00000004UL) 412 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_CM(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_CM_SHIFT)) & NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_CM_MASK) 413 414 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_CF_SHIFT (3U) 415 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_CF_MASK (0x00000008UL) 416 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_CF(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_CF_SHIFT)) & NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_CF_MASK) 417 418 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_NDOR_SHIFT (4U) 419 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_NDOR_MASK (0x00000010UL) 420 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_NDOR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_NDOR_SHIFT)) & NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_NDOR_MASK) 421 422 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_SDU_TYPE_SHIFT (5U) 423 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_SDU_TYPE_MASK (0x00000060UL) 424 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_SDU_TYPE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_SDU_TYPE_SHIFT)) & NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_SDU_TYPE_MASK) 425 426 /*! 427 * @brief Ingress Stream Table CFGE_DATA config bits Format 428 */ 429 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SFE_SHIFT (0U) 430 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SFE_MASK (0x00000001UL) 431 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SFE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SFE_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SFE_MASK) 432 433 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IPV_SHIFT (4U) 434 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IPV_MASK (0x000000F0UL) 435 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IPV_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IPV_MASK) 436 437 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OIPV_SHIFT (8U) 438 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OIPV_MASK (0x00000100UL) 439 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OIPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OIPV_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OIPV_MASK) 440 441 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_DR_SHIFT (9U) 442 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_DR_MASK (0x00000600UL) 443 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_DR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_DR_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_DR_MASK) 444 445 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ODR_SHIFT (11U) 446 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ODR_MASK (0x00000800UL) 447 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ODR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ODR_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ODR_MASK) 448 449 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IMIRE_SHIFT (12U) 450 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IMIRE_MASK (0x00001000UL) 451 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IMIRE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IMIRE_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IMIRE_MASK) 452 453 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_TIMECAPE_SHIFT (13U) 454 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_TIMECAPE_MASK (0x00002000UL) 455 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_TIMECAPE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_TIMECAPE_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_TIMECAPE_MASK) 456 457 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SPPD_SHIFT (15U) 458 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SPPD_MASK (0x00008000UL) 459 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SPPD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SPPD_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SPPD_MASK) 460 461 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ISQA_SHIFT (16U) 462 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ISQA_MASK (0x00030000UL) 463 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ISQA(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ISQA_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ISQA_MASK) 464 465 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ORP_SHIFT (18U) 466 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ORP_MASK (0x00040000UL) 467 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ORP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ORP_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ORP_MASK) 468 469 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OSGI_SHIFT (19U) 470 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OSGI_MASK (0x00080000UL) 471 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OSGI(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OSGI_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OSGI_MASK) 472 473 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_HR_SHIFT (20U) 474 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_HR_MASK (0x00F00000UL) 475 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_HR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_HR_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_HR_MASK) 476 477 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_FA_SHIFT (24U) 478 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_FA_MASK (0x07000000UL) 479 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_FA(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_FA_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_FA_MASK) 480 481 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SDUTYPE_SHIFT (27U) 482 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SDUTYPE_MASK (0x18000000UL) 483 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SDUTYPE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SDUTYPE_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SDUTYPE_MASK) 484 485 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_MSDU_SHIFT (0U) 486 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_MSDU_MASK (0x0000FFFFUL) 487 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_MSDU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_MSDU_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_MSDU_MASK) 488 489 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IFMELENCHG_SHIFT (16U) 490 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IFMELENCHG_MASK (0x007F0000UL) 491 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IFMELENCHG(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IFMELENCHG_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IFMELENCHG_MASK) 492 493 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_EPORT_SHIFT (23U) 494 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_EPORT_MASK (0x0F800000UL) 495 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_EPORT(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_EPORT_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_EPORT_MASK) 496 497 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OETEID_SHIFT (28U) 498 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OETEID_MASK (0x30000000UL) 499 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OETEID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OETEID_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OETEID_MASK) 500 501 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_CTD_SHIFT (30U) 502 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_CTD_MASK (0xC0000000UL) 503 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_CTD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_CTD_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_CTD_MASK) 504 505 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_EGRESSPORTMAP_SHIFT (0U) 506 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_EGRESSPORTMAP_MASK (0x00FFFFFFUL) 507 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_EGRESSPORTMAP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_EGRESSPORTMAP_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_EGRESSPORTMAP_MASK) 508 509 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SIMAP_SHIFT (0U) 510 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SIMAP_MASK (0x0000FFFFUL) 511 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SIMAP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SIMAP_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SIMAP_MASK) 512 513 /*! 514 * @brief Ingress Stream Filter Table KEYE_DATA config bits Format 515 */ 516 #define NETC_ETHSWT_IP_ISFILTERTABLE_KEYE_PCP_SHIFT (0U) 517 #define NETC_ETHSWT_IP_ISFILTERTABLE_KEYE_PCP_MASK (0x00000007UL) 518 #define NETC_ETHSWT_IP_ISFILTERTABLE_KEYE_PCP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_KEYE_PCP_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_KEYE_PCP_MASK) 519 520 /*! 521 * @brief Ingress Stream Filter Table CFGE_DATA config bits Format 522 */ 523 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_IPV_SHIFT (0U) 524 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_IPV_MASK (0x0000000FUL) 525 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_IPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_IPV_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_IPV_MASK) 526 527 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_OIPV_SHIFT (4U) 528 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_OIPV_MASK (0x00000010UL) 529 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_OIPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_OIPV_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_OIPV_MASK) 530 531 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_DR_SHIFT (5U) 532 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_DR_MASK (0x00000060UL) 533 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_DR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_DR_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_DR_MASK) 534 535 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_ODR_SHIFT (7U) 536 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_ODR_MASK (0x00000080UL) 537 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_ODR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_ODR_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_ODR_MASK) 538 539 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_IMIRE_SHIFT (8U) 540 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_IMIRE_MASK (0x00000100UL) 541 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_IMIRE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_IMIRE_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_IMIRE_MASK) 542 543 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_TIMECAPE_SHIFT (9U) 544 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_TIMECAPE_MASK (0x00000200UL) 545 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_TIMECAPE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_TIMECAPE_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_TIMECAPE_MASK) 546 547 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_OSGI_SHIFT (10U) 548 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_OSGI_MASK (0x00000400UL) 549 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_OSGI(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_OSGI_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_OSGI_MASK) 550 551 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_CTD_SHIFT (11U) 552 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_CTD_MASK (0x00000800UL) 553 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_CTD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_CTD_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_CTD_MASK) 554 555 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_ORP_SHIFT (12U) 556 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_ORP_MASK (0x00001000UL) 557 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_ORP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_ORP_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_ORP_MASK) 558 559 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_SDUTYPE_SHIFT (13U) 560 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_SDUTYPE_MASK (0x00006000UL) 561 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_SDUTYPE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_SDUTYPE_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_SDUTYPE_MASK) 562 563 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_MSDU_SHIFT (16U) 564 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_MSDU_MASK (0xFFFF0000UL) 565 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_MSDU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_MSDU_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_MSDU_MASK) 566 567 /*! 568 * @brief Stream Gate Instance Table Request Data Buffer ACFGEU (Admin Configuration Element Update.) field. 569 */ 570 #define NETC_ETHSWT_IP_SGITABLE_REQFMT_ACFGEU_SHIFT (0U) 571 #define NETC_ETHSWT_IP_SGITABLE_REQFMT_ACFGEU_MASK (0x00000001UL) 572 #define NETC_ETHSWT_IP_SGITABLE_REQFMT_ACFGEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_REQFMT_ACFGEU_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_REQFMT_ACFGEU_MASK) 573 574 /*! 575 * @brief Stream Gate Instance Table Request Data Buffer CFGEU (Configuration Element Update) field. 576 */ 577 #define NETC_ETHSWT_IP_SGITABLE_REQFMT_CFGEU_SHIFT (1U) 578 #define NETC_ETHSWT_IP_SGITABLE_REQFMT_CFGEU_MASK (0x00000002UL) 579 #define NETC_ETHSWT_IP_SGITABLE_REQFMT_CFGEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_REQFMT_CFGEU_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_REQFMT_CFGEU_MASK) 580 581 /*! 582 * @brief Stream Gate Instance Table Request Data Buffer SGISEU (Stream Gate Instance State Element Update) field. 583 */ 584 #define NETC_ETHSWT_IP_SGITABLE_REQFMT_SGISEU_SHIFT (2U) 585 #define NETC_ETHSWT_IP_SGITABLE_REQFMT_SGISEU_MASK (0x00000004UL) 586 #define NETC_ETHSWT_IP_SGITABLE_REQFMT_SGISEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_REQFMT_SGISEU_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_REQFMT_SGISEU_MASK) 587 588 /*! 589 * @brief Stream Gate Instance Table CFGE_DATA config bits Format 590 */ 591 /* Octets Exceeded Enable */ 592 #define NETC_ETHSWT_IP_SGITABLE_CFGE_OEXEN_SHIFT (0U) 593 #define NETC_ETHSWT_IP_SGITABLE_CFGE_OEXEN_MASK (0x00000001UL) 594 #define NETC_ETHSWT_IP_SGITABLE_CFGE_OEXEN(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_CFGE_OEXEN_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_CFGE_OEXEN_MASK) 595 596 /* Invalid Receive Enable */ 597 #define NETC_ETHSWT_IP_SGITABLE_CFGE_IRXEN_SHIFT (1U) 598 #define NETC_ETHSWT_IP_SGITABLE_CFGE_IRXEN_MASK (0x00000002UL) 599 #define NETC_ETHSWT_IP_SGITABLE_CFGE_IRXEN(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_CFGE_IRXEN_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_CFGE_IRXEN_MASK) 600 601 /* Protocol/Service Data Unit */ 602 #define NETC_ETHSWT_IP_SGITABLE_CFGE_SDUTYPE_SHIFT (2U) 603 #define NETC_ETHSWT_IP_SGITABLE_CFGE_SDUTYPE_MASK (0x0000000CUL) 604 #define NETC_ETHSWT_IP_SGITABLE_CFGE_SDUTYPE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_CFGE_SDUTYPE_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_CFGE_SDUTYPE_MASK) 605 606 /*! 607 * @brief Stream Gate Instance Table ICFGE_DATA config bits Format 608 */ 609 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_IPV_SHIFT (0U) 610 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_IPV_MASK (0x0000000FUL) 611 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_IPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_ICFGE_IPV_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_ICFGE_IPV_MASK) 612 613 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_OIPV_SHIFT (4U) 614 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_OIPV_MASK (0x00000010UL) 615 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_OIPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_ICFGE_OIPV_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_ICFGE_OIPV_MASK) 616 617 /* Gate State */ 618 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_GST_SHIFT (5U) 619 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_GST_MASK (0x00000020UL) 620 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_GST(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_ICFGE_GST_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_ICFGE_GST_MASK) 621 622 /* Cut Through Disabled */ 623 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_CTD_SHIFT (6U) 624 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_CTD_MASK (0x00000040UL) 625 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_CTD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_ICFGE_CTD_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_ICFGE_CTD_MASK) 626 627 /*! 628 * @brief ICFGE_DATA Gate State data format enum type. 629 * This field specifies the gate state to use before the administrative stream gate control list takes affect. 630 */ 631 typedef uint32 Netc_EthSwt_Ip_SGITABLE_GateStateType; 632 #define NETC_ETHSWT_IP_SGITABLE_GATE_CLOSE (0x0U) /*!< 0b = Closed; frames are not permitted to pass through. */ 633 #define NETC_ETHSWT_IP_SGITABLE_GATE_OPEN (0x1U) /*!< 1b = Open; frames are permitted to pass through. */ 634 635 /*! 636 * @brief Stream Gate Instance Table SGISE_DATA config bits Format 637 */ 638 #define NETC_ETHSWT_IP_SGITABLE_SGISE_OEX_SHIFT (0U) 639 #define NETC_ETHSWT_IP_SGITABLE_SGISE_OEX_MASK (0x00000001UL) 640 #define NETC_ETHSWT_IP_SGITABLE_SGISE_OEX(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_SGISE_OEX_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_SGISE_OEX_MASK) 641 642 #define NETC_ETHSWT_IP_SGITABLE_SGISE_IRX_SHIFT (1U) 643 #define NETC_ETHSWT_IP_SGITABLE_SGISE_IRX_MASK (0x00000002UL) 644 #define NETC_ETHSWT_IP_SGITABLE_SGISE_IRX(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_SGISE_IRX_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_SGISE_IRX_MASK) 645 646 #define NETC_ETHSWT_IP_SGITABLE_SGISE_STATE_SHIFT (2U) 647 #define NETC_ETHSWT_IP_SGITABLE_SGISE_STATE_MASK (0x0000001CUL) 648 #define NETC_ETHSWT_IP_SGITABLE_SGISE_STATE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_SGISE_STATE_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_SGISE_STATE_MASK) 649 650 /*! 651 * @brief Stream Gate Control List Table CFGE_DATA config bits Format 652 */ 653 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_LISTLEN_SHIFT (0U) 654 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_LISTLEN_MASK (0x000000FFUL) 655 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_LISTLEN(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_LISTLEN_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_LISTLEN_MASK) 656 657 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTOIPV_SHIFT (16U) 658 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTOIPV_MASK (0x00010000UL) 659 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTOIPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTOIPV_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTOIPV_MASK) 660 661 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTIPV_SHIFT (17U) 662 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTIPV_MASK (0x001E0000UL) 663 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTIPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTIPV_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTIPV_MASK) 664 665 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTCTD_SHIFT (21U) 666 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTCTD_MASK (0x00200000UL) 667 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTCTD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTCTD_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTCTD_MASK) 668 669 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTGTST_SHIFT (22U) 670 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTGTST_MASK (0x00400000UL) 671 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTGTST(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTGTST_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTGTST_MASK) 672 673 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_IOM_SHIFT (0U) 674 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_IOM_MASK (0x00FFFFFFUL) 675 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_IOM(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_IOM_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_IOM_MASK) 676 677 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_IPV_SHIFT (24U) 678 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_IPV_MASK (0x0F000000UL) 679 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_IPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_IPV_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_IPV_MASK) 680 681 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_OIPV_SHIFT (28U) 682 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_OIPV_MASK (0x10000000UL) 683 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_OIPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_OIPV_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_OIPV_MASK) 684 685 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_CTD_SHIFT (29U) 686 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_CTD_MASK (0x20000000UL) 687 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_CTD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_CTD_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_CTD_MASK) 688 689 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_IOMEN_SHIFT (30U) 690 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_IOMEN_MASK (0x40000000UL) 691 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_IOMEN(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_IOMEN_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_IOMEN_MASK) 692 693 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_GTST_SHIFT (31U) 694 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_GTST_MASK (0x80000000UL) 695 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_GTST(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_GTST_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_GTST_MASK) 696 697 /*! 698 * @brief Stream Gate Control List Table SGCLSE_DATA format enum type. 699 * This field indicates whether or not a stream gate control list (SGCL) is in-use in a Stream Gate Instance (SGI). 700 */ 701 typedef uint32 Netc_EthSwt_Ip_SGCLTABLE_RefCountType; 702 #define NETC_ETHSWT_IP_SGCLTABLE_NOT_INUSE_BYSGI (0x00U) /*!< Not in-use by an SGI. */ 703 #define NETC_ETHSWT_IP_SGCLTABLE_INUSE_BYSGI (0x01U) /*!< In-use by an SGI. */ 704 #define NETC_ETHSWT_IP_SGCLTABLE_REFCOUNT_RESERVED (0x02U) /*!< others reserved. */ 705 706 /*! 707 * @brief Stream Gate Control List Table SGCLSE_DATA Format*/ 708 #define NETC_ETHSWT_IP_SGCLTABLE_SGCLSE_REFCOUNT_SHIFT (0U) 709 #define NETC_ETHSWT_IP_SGCLTABLE_SGCLSE_REFCOUNT_MASK (0x000000FFUL) 710 #define NETC_ETHSWT_IP_SGCLTABLE_SGCLSE_REFCOUNT(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_SGCLSE_REFCOUNT_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_SGCLSE_REFCOUNT_MASK) 711 712 typedef uint32 Netc_EthSwt_Ip_ISQGTABLE_SQTagType; 713 #define NETC_ETHSWT_IP_ISQGTABLE_RSVDTYPE (0x00U) /*!< reserved. */ 714 #define NETC_ETHSWT_IP_ISQGTABLE_DRAFT20_RTAG (0x01U) /*!< 802.1CB draft 2.0 R-TAG. */ 715 #define NETC_ETHSWT_IP_ISQGTABLE_RTAG (0x02U) /*!< 802.1CB R-TAG.. */ 716 #define NETC_ETHSWT_IP_ISQGTABLE_HSRTAG (0x03U) /*!< HSR Tag. */ 717 718 /*! 719 * @brief Ingress Sequence Generation Table CFGE_DATA config bits Format 720 */ 721 #define NETC_ETHSWT_IP_ISQGTABLE_CFGE_SQTAG_SHIFT (0U) 722 #define NETC_ETHSWT_IP_ISQGTABLE_CFGE_SQTAG_MASK (0x00000007UL) 723 #define NETC_ETHSWT_IP_ISQGTABLE_CFGE_SQTAG(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISQGTABLE_CFGE_SQTAG_SHIFT)) & NETC_ETHSWT_IP_ISQGTABLE_CFGE_SQTAG_MASK) 724 725 /*! 726 * @brief Egress Sequence Recovery Table CFGE_DATA config bits Format 727 */ 728 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQTAG_SHIFT (0U) 729 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQTAG_MASK (0x00000007UL) 730 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQTAG(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQTAG_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQTAG_MASK) 731 732 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTNSQ_SHIFT (3U) 733 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTNSQ_MASK (0x00000008UL) 734 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTNSQ(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTNSQ_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTNSQ_MASK) 735 736 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRALG_SHIFT (4U) 737 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRALG_MASK (0x00000010UL) 738 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRALG(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRALG_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRALG_MASK) 739 740 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTYPE_SHIFT (5U) 741 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTYPE_MASK (0x00000020UL) 742 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTYPE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTYPE_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTYPE_MASK) 743 744 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRHL_SHIFT (8U) 745 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRHL_MASK (0x00007F00UL) 746 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRHL(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRHL_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRHL_MASK) 747 748 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRFWL_SHIFT (16U) 749 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRFWL_MASK (0x0FFF0000UL) 750 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRFWL(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRFWL_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRFWL_MASK) 751 752 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTP_SHIFT (0U) 753 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTP_MASK (0x00000FFFUL) 754 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTP_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTP_MASK) 755 756 /*! 757 * @brief Egress Sequence Recovery Table SRSE_DATA config bits Format 758 */ 759 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_SQRNUM_SHIFT (0U) 760 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_SQRNUM_MASK (0x0000FFFFUL) 761 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_SQRNUM(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_SQRNUM_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_SQRNUM_MASK) 762 763 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_TAKEANY_SHIFT (16U) 764 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_TAKEANY_MASK (0x00010000UL) 765 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_TAKEANY(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_TAKEANY_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_TAKEANY_MASK) 766 767 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_LCE_SHIFT (17U) 768 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_LCE_MASK (0x00020000UL) 769 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_LCE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_LCE_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_LCE_MASK) 770 771 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_SQRTS_SHIFT (18U) 772 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_SQRTS_MASK (0x3FFC0000UL) 773 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_SQRTS(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_SQRTS_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_SQRTS_MASK) 774 775 /*! 776 * @brief Ingres Stream Identification (ISI) Table KEYE_DATA bits Format 777 */ 778 #define NETC_ETHSWT_IP_ISITABLE_KEYE_KEYTYPE_SHIFT (0U) 779 #define NETC_ETHSWT_IP_ISITABLE_KEYE_KEYTYPE_MASK (0x00000003UL) 780 #define NETC_ETHSWT_IP_ISITABLE_KEYE_KEYTYPE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISITABLE_KEYE_KEYTYPE_SHIFT)) & NETC_ETHSWT_IP_ISITABLE_KEYE_KEYTYPE_MASK) 781 782 #define NETC_ETHSWT_IP_ISITABLE_KEYE_SRCPORTID_SHIFT (2U) 783 #define NETC_ETHSWT_IP_ISITABLE_KEYE_SRCPORTID_MASK (0x0000007CUL) 784 #define NETC_ETHSWT_IP_ISITABLE_KEYE_SRCPORTID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISITABLE_KEYE_SRCPORTID_SHIFT)) & NETC_ETHSWT_IP_ISITABLE_KEYE_SRCPORTID_MASK) 785 786 #define NETC_ETHSWT_IP_ISITABLE_KEYE_SPM_SHIFT (7U) 787 #define NETC_ETHSWT_IP_ISITABLE_KEYE_SPM_MASK (0x00000080UL) 788 #define NETC_ETHSWT_IP_ISITABLE_KEYE_SPM(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISITABLE_KEYE_SPM_SHIFT)) & NETC_ETHSWT_IP_ISITABLE_KEYE_SPM_MASK) 789 790 typedef uint32 Netc_EthSwt_Ip_KeyTypeIdxType; 791 #define NETC_ETHSWT_IP_SWT_KEYTYPE_0 (0x00U) /* Switch function, key construction is specified in ISIDKC0CR0 */ 792 #define NETC_ETHSWT_IP_SWT_KEYTYPE_1 (0x01U) /* Switch function, key construction is specified in ISIDKC1CR0 */ 793 #define NETC_ETHSWT_IP_SWT_KEYTYPE_2 (0x02U) /* Switch function, key construction is specified in ISIDKC2CR0 */ 794 #define NETC_ETHSWT_IP_SWT_KEYTYPE_3 (0x03U) /* Switch function, key construction is specified in ISIDKC3CR0 */ 795 #define NETC_ETHSWT_IP_ENETC_KEYTYPE_0 (0x00U) /* Enetc function, key construction is specified in ISIDKC0CR0 */ 796 #define NETC_ETHSWT_IP_ENETC_KEYTYPE_1 (0x01U) /* Enetc function, key construction is specified in ISIDKC1CR0 */ 797 798 typedef uint32 Netc_EthSwt_Ip_SrcPortMasqIdxType; 799 #define NETC_ETHSWT_IP_MATCH_FROM_SWT_PORTS (0x00U) /* Match frames from switch port(s). */ 800 #define NETC_ETHSWT_IP_MATCH_FROM_SWT_MANAGEMENT_PORTS (0x01U) /* Match frame from switch management port(s) that has switch port masquerading. */ 801 802 /*! 803 * @brief NTMP request and response message header format for buffer descriptors of command rings. 804 */ 805 typedef struct { 806 uint32 MessageHeaderDataField[8U]; /*!< used for both request and response message header data format */ 807 } Netc_EthSwt_Ip_NTMPMessageHeaderFormatType; 808 809 /*! 810 * @brief NTMP request message header format index enum for buffer descriptors of command rings. 811 */ 812 typedef enum { 813 NETC_ETHSWT_IP_REQHEADER_ADDR_L = 0x0U, /*!< a 16-byte aligned low part of memory address for a table, offset: 0x0 */ 814 NETC_ETHSWT_IP_REQHEADER_ADDR_H = 0x1U, /*!< a 16-byte aligned high part of memory address for a table, offset: 0x1 */ 815 NETC_ETHSWT_IP_REQHEADER_LENGTHFIELD = 0x2U, /*!< request and response buffer length in Request Header, offset: 0x2 */ 816 NETC_ETHSWT_IP_REQHEADER_CONFIGFIELD = 0x3U, /*!< config field includes Table id, access method, command etc. in Request Header, offset: 0x3 */ 817 NETC_ETHSWT_IP_REQHEADER_NPFFIELD = 0x7U /*!< NPF field in Request Header, offsext: 0x7 */ 818 } Netc_EthSwt_Ip_NTMPReqHeaderFormatIndexType; 819 820 #define NETC_ETHSWT_IP_RSPHEADER_STATUS_FIELD_INDEX (0x3U) /*!< status field includes RR bit, ERROR field and NUM_MATCHED field in Response Header Format */ 821 822 /*! 823 * @brief NTMP request message header format index enum for buffer descriptors of command rings. 824 */ 825 typedef struct { 826 uint16 ReqBuffLength; /*!< Table Request data buffer length field of NTMP Request Message Header Data Format */ 827 uint16 RspBuffLength; /*!< Table Response data buffer length field of NTMP Request Message Header Data Format */ 828 uint8 CmdCompletionInt; /*!< CCI (Command Completion Interrupt) in config field of Request Message Header Data Format */ 829 uint8 Version; /*!< Protocol Version in config field of Request Message Header Data Format */ 830 uint8 TableId; /*!< TABLE_ID in config field of Request Message Header Data Format */ 831 Netc_EthSwt_Ip_AccessMethodType AccessMethod; /*!< ACCESS_METHOD in config field of Request Message Header Data Format */ 832 Netc_EthSwt_Ip_CommandsType Cmd; /*!< COMMAND in config field of Request Message Header Data Format */ 833 } NetcEthSwt_Ip_ReqHeaderTableOperationDataType; 834 835 /*! 836 * @brief buffer descriptors of command rings. 837 */ 838 typedef struct { 839 Netc_EthSwt_Ip_NTMPMessageHeaderFormatType *CmdBDAddr; /*!< Address where command buffer descriptor will be saved. The address must be 128 byte aligned. */ 840 uint8 lengthCBDR; /*!< the length of command ring. */ 841 } Netc_EthSwt_Ip_CmdBDType; 842 /* ---bits field for NTMP request message--- */ 843 844 /* +++bits field for NTMP response message+++ */ 845 /*! 846 * @brief CMBDR RR status field. 847 */ 848 #define NETC_ETHSWT_IP_CMDBD_RSPFMT_STATUS_FIELD_RR_SHIFT (31U) 849 /*! 850 * @brief CMBDR RR status field mask. 851 */ 852 #define NETC_ETHSWT_IP_CMDBD_RSPFMT_STATUS_FIELD_RR_MASK (0x80000000UL) 853 854 /*! 855 * @brief CMBDR error status field. 856 */ 857 #define NETC_ETHSWT_IP_CMDBD_RSPFMT_STATUS_FIELD_ERROR_SHIFT (16U) 858 /*! 859 * @brief CMBDR error status field mask. 860 */ 861 #define NETC_ETHSWT_IP_CMDBD_RSPFMT_STATUS_FIELD_ERROR_MASK (0x0FFF0000UL) 862 863 /*! 864 * @brief CMBDR status field num matched. 865 */ 866 #define NETC_ETHSWT_IP_CMDBD_RSPFMT_STATUS_FIELD_NUMMATCHED_SHIFT (0U) 867 /*! 868 * @brief CMBDR status field num matched mask. 869 */ 870 #define NETC_ETHSWT_IP_CMDBD_RSPFMT_STATUS_FIELD_NUMMATCHED_MASK (0x0000FFFFUL) 871 /* ---bits field for NTMP response message--- */ 872 873 /* +++bits field and structure for CFGE_DATA format+++ */ 874 /*! 875 * @brief FDB table config port bitmap field. 876 */ 877 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_PORT_BITMAP_SHIFT (0U) 878 /*! 879 * @brief FDB table config port bitmap map mask. 880 */ 881 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_PORT_BITMAP_MASK (0x00FFFFFFUL) 882 /*! 883 * @brief FDB table config port bitmap. 884 */ 885 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_PORT_BITMAP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_PORT_BITMAP_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_PORT_BITMAP_MASK) 886 887 /*! 888 * @brief FDB table config port OETEID field. 889 */ 890 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_OETEID_SHIFT (0U) 891 /*! 892 * @brief FDB table config port OETEID field mask. 893 */ 894 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_OETEID_MASK (0x00000003UL) 895 /*! 896 * @brief FDB table config port OETEID. 897 */ 898 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_OETEID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_OETEID_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_OETEID_MASK) 899 900 /*! 901 * @brief FDB table config port EPORT field. 902 */ 903 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_EPORT_SHIFT (2U) 904 /*! 905 * @brief FDB table config port EPORT field mask. 906 */ 907 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_EPORT_MASK (0x0000007CUL) 908 /*! 909 * @brief FDB table config port EPORT. 910 */ 911 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_EPORT(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_EPORT_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_EPORT_MASK) 912 913 /*! 914 * @brief FDB table config port IMIRE field. 915 */ 916 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_IMIRE_SHIFT (7U) 917 /*! 918 * @brief FDB table config port IMIRE field mask. 919 */ 920 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_IMIRE_MASK (0x00000080UL) 921 /*! 922 * @brief FDB table config port IMIRE. 923 */ 924 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_IMIRE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_IMIRE_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_IMIRE_MASK) 925 926 /*! 927 * @brief FDB table config port CTD field. 928 */ 929 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_CTD_SHIFT (9U) 930 /*! 931 * @brief FDB table config port CTD field mask. 932 */ 933 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_CTD_MASK (0x00000600UL) 934 /*! 935 * @brief FDB table config port CTD. 936 */ 937 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_CTD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_CTD_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_CTD_MASK) 938 939 /*! 940 * @brief FDB table config port DYNAMIC field. 941 */ 942 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_DYNAMIC_SHIFT (11U) 943 /*! 944 * @brief FDB table config port DYNAMIC field mask. 945 */ 946 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_DYNAMIC_MASK (0x00000800UL) 947 /*! 948 * @brief FDB table config port DYNAMIC. 949 */ 950 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_DYNAMIC(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_DYNAMIC_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_DYNAMIC_MASK) 951 952 /*! 953 * @brief FDB table config port TIMECAPE field. 954 */ 955 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_TIMECAPE_SHIFT (12U) 956 /*! 957 * @brief FDB table config port TIMECAPE field mask. 958 */ 959 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_TIMECAPE_MASK (0x00001000UL) 960 /*! 961 * @brief FDB table config port TIMECAPE field. 962 */ 963 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_TIMECAPE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_TIMECAPE_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_TIMECAPE_MASK) 964 965 /*! 966 * @brief FDB Table CFGE_DATA format. 967 */ 968 typedef struct { 969 uint32 Cfge_PortBitmap; /*!< FDB table config port bitmap */ 970 uint32 Cfge_ConfigField; /*!< FDB table config field */ 971 uint32 Cfge_EtEid; /*!< FDB table eid */ 972 } Netc_EthSwt_Ip_FDBTableCFGEDataType; 973 974 /*! 975 * @brief Rate policer Table Service Data Unit enum type. 976 */ 977 typedef enum 978 { 979 NETC_ETHSWT_IP_PPDU = 0U, /*!< Physical Layer PDU */ 980 NETC_ETHSWT_IP_MPDU = 1U, /*!< MAC PDU */ 981 NETC_ETHSWT_IP_MSDU = 2U, /*!< MAC SDU */ 982 NETC_ETHSWT_IP_RSDTYPE = 3U /* reservered type */ 983 }Netc_EthSwt_Ip_SDUType; 984 985 /*! 986 * @brief Rate Policer Table CFGE_DATA Format. 987 */ 988 typedef struct { 989 uint32 Cfge_Cir; /*!< Committed Information Rate (CIR) field */ 990 uint32 Cfge_Cbs; /*!< Committed Burst SizeExpressed (CBS) field */ 991 uint32 Cfge_Eir; /*!< Excess Information Rate (EIR) field */ 992 uint32 Cfge_Ebs; /*!< Excess Burst Size (EBS) field */ 993 boolean Cfge_Mren; /*!< Mark All Frames Red Enable, 0:disable, 1:enable */ 994 boolean Cfge_Doy; /*!< Drop on Yellow, 0:not dropped, 1:dropped */ 995 boolean Cfge_Cm; /*!< Color mode, 0:color blind, 1:color aware */ 996 boolean Cfge_Cf; /*!< Coupling flag, 0:C and E token buckets are not coupled. 1:C and E token buckets are coupled*/ 997 boolean Cfge_Ndor; /*!< No Drop on Red, 0:frames marded "red" are alwayts dropped, 1: not dropped */ 998 Netc_EthSwt_Ip_SDUType Cfge_SduType; /*!< Service Data Unit Type */ 999 } Netc_EthSwt_Ip_RatePolicerTableCFGEDataType; 1000 1001 /*! 1002 * @brief Rate Policer Table STSE_DATA Format. 1003 */ 1004 typedef struct { 1005 uint64 Stse_ByteCount; /*!< Number of bytes received by the rate policer instance */ 1006 uint32 Stse_DropFrames; /*!< Number of frames dropped by the rate policer instance */ 1007 uint32 Stse_Dr0GrnFrames; /*!< Number of frames marked green with DR=0 by the rate policer instance */ 1008 uint32 Stse_Dr1GrnFrames; /*!< Number of frames marked green with DR=1 by the rate policer instance */ 1009 uint32 Stse_Dr2YlwFrames; /*!< Number of frames marked yellow with DR=2 by the rate policer instance */ 1010 uint32 Stse_RemarkYlwFrames; /*!< Number of frames re-marked from green to yellow by the rate policer instance */ 1011 uint32 Stse_Dr3RedFrames; /*!< Number of frames marked red (DR=3) by the rate policer instance */ 1012 uint32 Stse_RemarkRedFrames; /*!< Number of frames re-marked from green or yellow to red by the rate policer instance */ 1013 uint32 Stse_Lts; /*!< Last timestamp */ 1014 uint32 Stse_CommittedTokenBucketInteger; /*!< Committed token bucket contents, integer portion */ 1015 uint32 Stse_CommittedTokenBucketFractional; /*!< Committed token bucket contents, fractional portion (31 bits) + sign bit (1 bit, BCS) */ 1016 uint32 Stse_ExcessTokenBucketInteger; /*!< Excess token bucket contents, integer portion (32 bits)*/ 1017 uint32 Stse_ExcessTokenBucketFractional; /*!< Excess token bucket contents, fractional portion (31 bits) + sign bit (1 bit, BES) */ 1018 } Netc_EthSwt_Ip_RatePolicerTableSTSEDataType; 1019 1020 /*! 1021 * @brief defines Rate Policer entries. 1022 */ 1023 typedef struct 1024 { 1025 uint32 RatePolicerEntryId; /* Entry ID */ 1026 Netc_EthSwt_Ip_RatePolicerTableCFGEDataType RatePolicerCfgeData; /* CFGE Data */ 1027 boolean ConfigurationElementUpdate; /* Update Actions, CFGEU */ 1028 boolean FunctionalEnableElementUpdate; /* Update Actions, FEEU */ 1029 boolean PolicerStateElementUpdate; /* Update Actions, PSEU */ 1030 boolean StatisticsElementUpdate; /* Update Actions, STSEU */ 1031 boolean RatePolicerFunctionEnable; /* False = The rate policer instance is disabled; True 1b = The rate policer instance is enabled */ 1032 } Netc_EthSwt_Ip_RatePolicerEntryDataType; 1033 1034 /*! 1035 * @brief defines Rate Policer entrie response data. 1036 */ 1037 typedef struct 1038 { 1039 uint32 RatePolicerEntryId; /* Entry ID */ 1040 Netc_EthSwt_Ip_RatePolicerTableSTSEDataType RatePolicerStseData; /* Statistics Element Data */ 1041 Netc_EthSwt_Ip_RatePolicerTableCFGEDataType RatePolicerCfgeData; /* CFGE Data */ 1042 boolean RatePolicerFunctionEnable; /* False = The rate policer instance is disabled; True 1b = The rate policer instance is enabled */ 1043 boolean MarkRedFlag; /* 0b = Indicates that the rate policer blocking "mark all frames red" function has not been triggered */ 1044 /* 1b = Indicates that all frames arriving at this rate policer are marked red by the rate policer blocking "mark all frames red" function. */ 1045 } Netc_EthSwt_Ip_RatePolicerEntryRspDataType; 1046 1047 /*! 1048 * @brief Forwarding Action data type definitions for Ingress Stream Table. 1049 */ 1050 typedef uint32 Netc_EthSwt_Ip_SwtForwardingActionDataType; 1051 #define NETC_ETHSWT_IP_SWT_DISCARDFRAMES (0x0U) /*!< discard frames */ 1052 #define NETC_ETHSWT_IP_SWT_REDIRECTFRAMES (0x1U) /*!< Re-direct frame to switch management port without any frame modification */ 1053 #define NETC_ETHSWT_IP_SWT_STREAMFORWARDING (0x2U) /*!< Stream forwarding */ 1054 #define NETC_ETHSWT_IP_SWT_BRIDGEFORWARDING (0x3U) /*!< 802.1Q bridge forwarding */ 1055 #define NETC_ETHSWT_IP_SWT_COPYANDSTREAMFORWARDING (0x4U) /*!< Copy to switch management port with specified HR and stream forwarding */ 1056 #define NETC_ETHSWT_IP_SWT_COPYANDBRIDGEFORWARDING (0x5U) /*!< Copy to switch management port with specified HR and Bridge forwarding */ 1057 1058 typedef uint32 Netc_EthSwt_Ip_EnetcForwardingActionDataType; 1059 #define NETC_ETHSWT_IP_ENETC_DISCARDFRAMES (0x0U) /*!< discard frames */ 1060 #define NETC_ETHSWT_IP_ENETC_ALLOWWITHOUTSIBITMAP (0x1U) /*!< Allow without setting the pre L2 filtering SI bitmap. */ 1061 #define NETC_ETHSWT_IP_SWT_ALLOWWITHSIBITMAP (0x2U) /*!< Allow with setting the pre L2 filtering SI bitmap to the value configured in the SI_MAP field of this entry. */ 1062 1063 /*! 1064 * @brief Override ET_EID data format enum type. 1065 */ 1066 typedef uint32 Netc_EthSwt_Ip_OETEIDIdxType; 1067 #define NETC_ETHSWT_IP_NO_EGRESS_PKT_PROCESSING_ACTIONS_SPECIFIED (0x0U) /*!< No egress packet processing actions specified */ 1068 #define NETC_ETHSWT_IP_SINGLEPORT_EGRESS_TREATMENT_TABLE_ACCESS (0x1U) /*!< Single-port Egress Treatment table access. */ 1069 #define NETC_ETHSWT_IP_MULTIPORT_PKT_EGRESS_TREATMENT_TABLE_ACCESS (0x2U) /*!< Multi-port packet Egress Treatment table access */ 1070 #define NETC_ETHSWT_IP_MULTIPORT_ABS_EGRESS_TREATMENT_TABLE_ACCESS (0x3U) /*!< Multi-port absolute Egress Treatment table access */ 1071 1072 /*! 1073 * @brief Cut-Through Disable data format enum type. 1074 */ 1075 typedef uint32 Netc_EthSwt_Ip_CutThroughtDisableIdxType; 1076 #define NETC_ETHSWT_IP_DONOT_OVERRIDE_CUTTHROUGH_STATE (0x0U) /*!< Do not override cut-through state */ 1077 #define NETC_ETHSWT_IP_DISABLE_CUTTHROUGH_FOR_OUTGOING_PORT (0x1U) /*!< Disable cut-through for the outgoing port specified in the EPORT field */ 1078 #define NETC_ETHSWT_IP_DISABLE_CUTTHROUGH_FOR_ALL_PORTS (0x2U) /*!< Disable cut-through for all ports specified in the destination port bitmap */ 1079 #define NETC_ETHSWT_IP_DISABLE_CUTTHROUGH_RESERVED (0x3U) /*!< Reserved */ 1080 1081 /*! 1082 * @brief Ingress Sequence Action data format enum type. 1083 */ 1084 typedef uint32 Netc_EthSwt_Ip_IngressSeqActionIdxType; 1085 #define NETC_ETHSWT_IP_FRER_SEQ_GENERATION_FUNC_NOT_PERFORMED (0x0U) /*!< FRER sequence generation function is not performed. */ 1086 #define NETC_ETHSWT_IP_FRER_SEQ_GENERATION_FUNC_PERFORMED (0x1U) /*!< FRER sequence generation function is performed. */ 1087 1088 /*! 1089 * @brief Egress Sequence Recovery Table CFGE_DATA enum type. 1090 */ 1091 typedef uint32 Netc_EthSwt_Ip_ESQRTABLE_CFGE_SQRTnsqIdxType; 1092 #define NETC_ETHSWT_IP_ESQRTABLE_DISCARD_FRAME_AND_COUNT (0x0U) /*!< Discard frame and count in both the TAGLESS_PACKETS counter and in the port's PTXDCR register. */ 1093 #define NETC_ETHSWT_IP_ESQRTABLE_ACCEPT_FRAME_AND_NORECOVERY (0x1U) /*!< Accept frame and do not perform recovery function. */ 1094 1095 typedef uint32 Netc_EthSwt_Ip_ESQRTABLE_CFGE_SQRAlgIdxType; 1096 #define NETC_ETHSWT_IP_ESQRTABLE_VECTOR_ALGORITHM (0x0U) /*!< Vector algorithm. */ 1097 #define NETC_ETHSWT_IP_ESQRTABLE_MATCH_ALGORITHM (0x1U) /*!< Match algorithm. */ 1098 1099 typedef uint32 Netc_EthSwt_Ip_ESQRTABLE_CFGE_SQRTypeIdxType; 1100 #define NETC_ETHSWT_IP_ESQRTABLE_SEQUENCY_REC_FUNC (0x0U) /*!< Sequence recovery function. */ 1101 #define NETC_ETHSWT_IP_ESQRTABLE_INDIVIDUAL_REC_FUNC (0x1U) /*!< Individual recovery function. */ 1102 1103 /*! 1104 * @brief Ingress Stream Table CFGE_DATA Format. 1105 */ 1106 typedef struct { 1107 uint32 IngressSeqGeneration_EID; /*!< Ingress Sequence Generation Entry ID */ 1108 uint32 RatePolicer_EID; /*!< Rate Policer Entry ID */ 1109 uint32 StreamGateInstance_EID; /*!< Stream Gate Instance Entry ID */ 1110 uint32 IngressFrmModification_EID; /*!< Ingress Frame Modification Entry ID */ 1111 uint32 EgressTreatment_EID; /*!< Egress Treatment Entry ID */ 1112 uint32 IngressStreamCounter_EID; /*!< Ingress Stream counter Index */ 1113 uint32 EgressPortBitMap; /*!< Egress Port bitmap */ 1114 uint16 StationInterfaceMap; /*!< Station Interface Map */ 1115 uint16 MaximumServiceDataUnit; /*!< Maximum Service Data Unit */ 1116 uint8 IngressFrmModiEntryFrmLenChange; /*!< Ingress Frame Modification Entry Frame Length Change */ 1117 uint8 EgressPort; /*!< Egress Port */ 1118 Netc_EthSwt_Ip_OETEIDIdxType OverrideET_EID; /*!< Override ET_EID */ 1119 Netc_EthSwt_Ip_CutThroughtDisableIdxType CutThrDisable; /*!< Cut-Trought disable */ 1120 Netc_EthSwt_Ip_SDUType SduType; /*!< Service Data Unit type to use for MSDU (Maximum Service Data Unit) field. */ 1121 Netc_EthSwt_Ip_SwtForwardingActionDataType ForwardingActions; /*!< Forwarding actions */ 1122 uint8 HostReason; /*!< Host reason */ 1123 uint8 DropResilience; /*!< New Drop Resilience (DR) to be assigned to the frame, if ODR is 1. */ 1124 uint8 InternalPriorityValue; /*!< Internal Priority Value (IPV) */ 1125 boolean OverrideStreamGateInstanceEID; /*!< Override Stream Gate Instance Entry ID */ 1126 boolean OverrideRatePolicerInstanceEID; /*!< Override Rate Policer (instance) ID. */ 1127 Netc_EthSwt_Ip_IngressSeqActionIdxType IngressSeqAction; /*!< Ingress Sequence Action */ 1128 boolean SrcPortPruningDisable; /*!< Source Port Pruning Disable. */ 1129 boolean TimeStampCaptureEnable; /*!< Timestamp Capture Enable */ 1130 boolean IngressMirroringEnable; /*!< Ingress Mirroring Enable */ 1131 boolean OverrideDR; /*!< Override Drop Resilience (DR) */ 1132 boolean OverrideIPV; /*!< Override Internal Priority Value (IPV) */ 1133 boolean StreamFilteringEnable; /*!< Stream Filtering Enable */ 1134 } Netc_EthSwt_Ip_IngressStreamTableCFGEDataType; 1135 1136 /*! 1137 * @brief defines Ingress Stream entries. 1138 * @implements Netc_EthSwt_Ip_IngressStreamEntryDataType_struct 1139 */ 1140 typedef struct 1141 { 1142 uint32 IngressStreamEntryId; /* Entry ID */ 1143 Netc_EthSwt_Ip_IngressStreamTableCFGEDataType IngressStreamCfgeData; /* CFGE Data */ 1144 } Netc_EthSwt_Ip_IngressStreamEntryDataType; 1145 1146 /*! 1147 * @brief Ingress Stream Filter Table CFGE_DATA Format. 1148 */ 1149 typedef struct { 1150 uint32 RatePolicer_EID; /*!< Rate Policer Entry ID */ 1151 uint32 StreamGateInstance_EID; /*!< Stream Gate Instance Entry ID */ 1152 uint32 IngressStreamCounter_EID; /*!< Ingress Stream counter Index */ 1153 uint16 MaximumServiceDataUnit; /*!< Maximum Service Data Unit */ 1154 uint8 InternalPriorityValue; /*!< Internal Priority Value (IPV) */ 1155 uint8 DropResilience; /*!< New Drop Resilience (DR) to be assigned to the frame, if ODR is 1. */ 1156 Netc_EthSwt_Ip_CutThroughtDisableIdxType CutThrDisable; /*!< Cut-Trought disable */ 1157 Netc_EthSwt_Ip_SDUType SduType; /*!< Service Data Unit type to use for MSDU (Maximum Service Data Unit) field. */ 1158 boolean OverrideIPV; /*!< Override Internal Priority Value (IPV) */ 1159 boolean OverrideDR; /*!< Override Drop Resilience (DR) */ 1160 boolean TimeStampCaptureEnable; /*!< Timestamp Capture Enable */ 1161 boolean IngressMirroringEnable; /*!< Ingress Mirroring Enable */ 1162 boolean OverrideStreamGateInstanceEID; /*!< Override Stream Gate Instance Entry ID */ 1163 boolean OverrideRatePolicerInstanceEID; /*!< Override Rate Policer (instance) ID. */ 1164 } Netc_EthSwt_Ip_IngressStreamFilterTableCFGEDataType; 1165 1166 1167 /*! 1168 * @brief Define Ingress Stream Counter entries 1169 */ 1170 typedef struct 1171 { 1172 uint32 RxCount; /*!< Receive Count. */ 1173 uint32 MSduDropCount; /*!< MSDU (Maximum Service Data Unit) Drop Count. */ 1174 uint32 PolicerDropCount; /*!< Policer Drop Count. */ 1175 uint32 StreamGateDropCount; /*!< Stream Gating Drop Count. */ 1176 } Netc_EthSwt_Ip_IngressStreamCountTableSTSEDataType; 1177 1178 /*! 1179 * @implements Netc_EthSwt_Ip_IngressStreamCountTableRspDataType_struct 1180 */ 1181 typedef struct 1182 { 1183 uint32 IngressStreamCountId; 1184 Netc_EthSwt_Ip_IngressStreamCountTableSTSEDataType IngressStreamCountStseData; 1185 } Netc_EthSwt_Ip_IngressStreamCountTableRspDataType; 1186 1187 /*! 1188 * @brief Ingress Stream Filter Table KEYE_DATA Format. 1189 */ 1190 typedef struct { 1191 uint32 IngressStream_EID; /*!< Ingress Stream Entry ID */ 1192 uint8 Pcp; /*!< Priority Code Point. Outer VLAN TAG PCP of the received frame */ 1193 } Netc_EthSwt_Ip_IngressStreamFilterTableKEYEDataType; 1194 1195 /*! 1196 * @brief defines Ingress Stream Filter entries. 1197 * @implements Netc_EthSwt_Ip_IngressStreamFilterEntryDataType_struct 1198 */ 1199 typedef struct 1200 { 1201 Netc_EthSwt_Ip_IngressStreamFilterTableCFGEDataType IngressStreamFilterCfgeData; /* CFGE Data */ 1202 Netc_EthSwt_Ip_IngressStreamFilterTableKEYEDataType IngressStreamFilterKeyeData; /* KEYE Data */ 1203 uint32 IngressStreamFilterEntryId; /* Entry ID */ 1204 } Netc_EthSwt_Ip_IngressStreamFilterEntryDataType; 1205 1206 /*! 1207 * @brief defines Stream Gate Instance entries. 1208 * @implements Netc_EthSwt_Ip_StreamGateInstanceEntryDataType_struct 1209 */ 1210 typedef struct 1211 { 1212 uint32 SGIEntryId; /* Stream Gate Instance Entry ID */ 1213 uint32 AdminSGCLEntryId; /* Administrative Stream Gate Control List Entry ID */ 1214 uint64 AdminBaseTime; /* Admin Base Time */ 1215 uint32 AdminCycleTimeExt; /* Admin Cycle Time Extension */ 1216 Netc_EthSwt_Ip_SGITABLE_GateStateType Icfge_Gst; /* Gate State */ 1217 boolean Icfge_Ctd; /* Cut-Through Disable Flag */ 1218 uint8 Icfge_Ipv; /* Internal Priority Value (IPV) */ 1219 Netc_EthSwt_Ip_SDUType SduType; /* Protocol/Service Data Unit) */ 1220 boolean Icfge_Oipv; /* Override Internal Priority Value (IPV) */ 1221 boolean Cfge_Oexen; /* Octets Exceeded Enable */ 1222 boolean Cfge_Irxen; /* Invalid Receive Enable */ 1223 } Netc_EthSwt_Ip_StreamGateInstanceEntryDataType; 1224 1225 /*! 1226 * @brief defines Stream Gate Instance entries response data type. 1227 * @implements Netc_EthSwt_Ip_StreamGateInstanceEntryRspDataType_struct 1228 */ 1229 typedef struct 1230 { 1231 uint32 SGIEntryId; /* Stream Gate Instance Entry ID */ 1232 uint32 OperationalSGCLEntryID; /* Operational Stream Gate Control List Entry ID */ 1233 uint64 ConfigChangeTime; /* Configuration Change Time */ 1234 uint64 OperationalBaseTime; /* Operational Base Time */ 1235 uint32 OperationalCycleTimeExt; /* Oper Cycle Time Extension */ 1236 uint8 SGISEOex; /* Octets Exceeded Flag */ 1237 uint8 SGISEIrx; /* Invalid Receive Flag */ 1238 uint8 SGISEState; /* Current Gate Instance State */ 1239 uint32 AdminSGCLEntryId; /* Administrative Stream Gate Control List Entry ID */ 1240 uint64 AdminBaseTime; /* Admin Base Time */ 1241 uint32 AdminCycleTimeExt; /* Admin Cycle Time Extension */ 1242 Netc_EthSwt_Ip_SGITABLE_GateStateType Icfge_Gst; /* Gate State */ 1243 boolean Icfge_Ctd; /* Cut-Through Disable Flag */ 1244 uint8 Icfge_Ipv; /* Internal Priority Value (IPV) */ 1245 Netc_EthSwt_Ip_SDUType SduType; /* Protocol/Service Data Unit) */ 1246 boolean Icfge_Oipv; /* Override Internal Priority Value (IPV) */ 1247 boolean Cfge_Oexen; /* Octets Exceeded Enable */ 1248 boolean Cfge_Irxen; /* Invalid Receive Enable */ 1249 } Netc_EthSwt_Ip_StreamGateInstanceEntryRspDataType; 1250 1251 /*! 1252 * @brief defines Stream Gate Control List entries data type. 1253 */ 1254 typedef struct 1255 { 1256 uint32 SGCL_TimeInterval; /* Time Interval for Gate Entry i */ 1257 uint32 SGCL_IntervalOctetsMax; /* Interval Octets Maximum for Gate Entry i, */ 1258 uint8 SGCL_Ipv; /* Internal Priority Value for Gate Entry i */ 1259 boolean SGCL_Oipv; /* Override Internal Priority Value for Gate Entry i */ 1260 boolean SGCL_Ctd; /* Cut Through Disable for Gate Entry i */ 1261 boolean SGCL_IntervalOctetMaxEnable; /* Interval Octet Maximum Enabled for Gate Entry i, */ 1262 Netc_EthSwt_Ip_SGITABLE_GateStateType SGCL_GateState; /* Gate State for Gate Entry i, */ 1263 } Netc_EthSwt_Ip_SGCLEntriesDataType; 1264 1265 /*! 1266 * @brief defines Stream Gate Control List table data type. 1267 * @implements Netc_EthSwt_Ip_SGCLTableDataType_struct 1268 */ 1269 typedef struct 1270 { 1271 uint32 SGCLEntryId; /* Stream Gate Control List Entry ID */ 1272 uint32 Cfge_CycleTime; /* This field specifies the cycle time of the stream gate control list. */ 1273 uint8 Cfge_ListLength; /* This field indicates the number of entries in the stream gate control list. */ 1274 uint8 Cfge_ExtIpv; /* List Extension Internal Priority Value */ 1275 boolean Cfge_ExtOIPV; /* Extension Override Internal Priority Value */ 1276 boolean Cfge_ExtCtd; /* Extension Cut Through Disabled. 0b = No action. 1b = Cut-through disabled. */ 1277 Netc_EthSwt_Ip_SGITABLE_GateStateType Cfge_ExtGtst; /* Extension Gate State */ 1278 Netc_EthSwt_Ip_SGCLEntriesDataType *ListEntries; /* Stream Gate Control List entries pointer */ 1279 Netc_EthSwt_Ip_SGCLTABLE_RefCountType Sgclse_RefCount; /* Ref count, an element in response data buffer */ 1280 } Netc_EthSwt_Ip_SGCLTableDataType; 1281 1282 /*! 1283 * @brief defines Ingress Sequence Generation table data type. 1284 * @implements Netc_EthSwt_Ip_ISQGTableDataType_struct 1285 */ 1286 typedef struct 1287 { 1288 uint32 ISQGEntryId; /* Ingress Sequence Generation table Entry ID */ 1289 Netc_EthSwt_Ip_ISQGTABLE_SQTagType Cfge_SQTagType; /* This field specifies the sequence tag type to insert for sequence generation. */ 1290 uint16 Sgse_SQGNum; /* This field specifies the next sequence number value to be used in the tag to be added to the frame. */ 1291 } Netc_EthSwt_Ip_ISQGTableDataType; 1292 1293 /*! 1294 * @brief defines Egress Sequence Recovery table request data type. 1295 * @implements Netc_EthSwt_Ip_EgrSeqRecoveryTableDataType_struct 1296 */ 1297 typedef struct 1298 { 1299 uint32 EgrSeqRecEntryId; /* egress sequence recovery table Entry ID */ 1300 uint8 Cfge_SQTag; /* Sequence Tag */ 1301 uint8 Cfge_SQRHisLen; /* Sequence Recovery History Length */ 1302 uint16 Cfge_SQRFutureWinLen; /* Sequence Recovery Future Window LengthThis */ 1303 uint16 Cfge_SQRTimeOutPeriod; /* Sequence Timeout Period */ 1304 Netc_EthSwt_Ip_ESQRTABLE_CFGE_SQRTnsqIdxType Cfge_SqrTnsq; /* Sequence Recovery Take No Sequence */ 1305 Netc_EthSwt_Ip_ESQRTABLE_CFGE_SQRAlgIdxType Cfge_SqrAlg; /* Sequence Recovery Algorithm */ 1306 Netc_EthSwt_Ip_ESQRTABLE_CFGE_SQRTypeIdxType Cfge_SqrType; /* Sequence Recovery Function type */ 1307 } Netc_EthSwt_Ip_EgrSeqRecoveryTableDataType; 1308 1309 /*! 1310 * @brief defines Egress Sequence Recovery table response data type. 1311 * @implements Netc_EthSwt_Ip_EgrSeqRecoveryTableRspDataType_struct 1312 */ 1313 typedef struct 1314 { 1315 uint32 EgrSeqRecEntryId; /* egress sequence recovery table Entry ID */ 1316 uint64 Stse_InOrderPkts; /* In Order Packets */ 1317 uint64 Stse_OutOfOrderPkts; /* Out of Order Packets */ 1318 uint64 Stse_RoguePkts; /* Rogue Packets */ 1319 uint64 Stse_DuplicatePkts; /* Duplicate Packets */ 1320 uint64 Stse_LostPkts; /* Lost Packets */ 1321 uint64 Stse_TaglessPkts; /* Tag-Less Packets */ 1322 uint32 Stse_SeqRecResets; /* Sequence Recovery Resets */ 1323 uint32 Srse_SqrHistory[4U]; /* Recovery History */ 1324 uint16 Srse_SqrNum; /* Sequence Recovery Number */ 1325 uint16 Srse_SqrTimeStamp; /* Sequence Recovery Timestamp */ 1326 boolean Srse_LostCntEnable; /* Lost Count Enable */ 1327 uint8 Srse_TakeAny; /* This field is set to 1 when the recovery function is reset, and cleared after the first frame is received. */ 1328 uint8 Cfge_SQTag; /* Sequence Tag */ 1329 uint8 Cfge_SQRHisLen; /* Sequence Recovery History Length */ 1330 uint16 Cfge_SQRFutureWinLen; /* Sequence Recovery Future Window LengthThis */ 1331 uint16 Cfge_SQRTimeOutPeriod; /* Sequence Timeout Period */ 1332 Netc_EthSwt_Ip_ESQRTABLE_CFGE_SQRTnsqIdxType Cfge_SqrTnsq; /* Sequence Recovery Take No Sequence */ 1333 Netc_EthSwt_Ip_ESQRTABLE_CFGE_SQRAlgIdxType Cfge_SqrAlg; /* Sequence Recovery Algorithm */ 1334 Netc_EthSwt_Ip_ESQRTABLE_CFGE_SQRTypeIdxType Cfge_SqrType; /* Sequence Recovery Function type */ 1335 } Netc_EthSwt_Ip_EgrSeqRecoveryTableRspDataType; 1336 1337 /*! 1338 * @brief defines Ingress Stream Identification table request/response data type. 1339 * @implements Netc_EthSwt_Ip_IngrStremIdentificationTableDataType_struct 1340 */ 1341 typedef struct 1342 { 1343 uint32 IngrStreamIdenResumeEntryId; /* Ingress Stream Identification tabel Resume Entry ID */ 1344 uint32 IngrStreamIdenEntryId; /* Ingress Stream Identification tabel Entry ID */ 1345 uint32 IngrStreamEntryId; /* Ingress Stream table Entry ID */ 1346 Netc_EthSwt_Ip_KeyTypeIdxType Keye_Keytype; /* Key type for key construction */ 1347 uint8 Keye_SrcPortId; /* Source port Id */ 1348 Netc_EthSwt_Ip_SrcPortMasqIdxType Keye_Spm; /* Source port masquerading */ 1349 uint32 Keye_FrmKey[4U]; /* Frame portion of the Key */ 1350 }Netc_EthSwt_Ip_IngrStremIdentificationTableDataType; 1351 1352 /*! 1353 * @brief FDB Table CFGE_DATA format enum type. 1354 */ 1355 typedef enum { 1356 NETC_ETHSWT_IP_FDBTABLE_CFGE_PORT_BITMAP_FIELD = 9U, /*!< PORT_BITMAP field in FDB Table CFGE_DATA Format */ 1357 NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD = 10U, /*!< CONFIG field includes TIMECAPE, DYNAMIC etc in FDB Table CFGE_DATA Format */ 1358 NETC_ETHSWT_IP_FDBTABLE_CFGE_ETEID_FIELD = 11U /*!< ET_EID field in FDB Table CFGE_DATA Format */ 1359 } Netc_EthSwt_Ip_FDBTableCFGEDataIndexType; 1360 /* +++bits field and structure for CFGE_DATA format+++ */ 1361 1362 /* +++bits field for KEYE_DATA format+++ */ 1363 /*! 1364 * @brief FDB table config MACC_ADDR_L field. 1365 */ 1366 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_L_SHIFT (0U) 1367 /*! 1368 * @brief FDB table config MACC_ADDR_L field mask. 1369 */ 1370 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_L_MASK (0xFFFFFFFFUL) 1371 /*! 1372 * @brief FDB table config MACC_ADDR_L. 1373 */ 1374 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_L(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_L_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_L_MASK) 1375 1376 /*! 1377 * @brief FDB table config MACC_ADDR_H field. 1378 */ 1379 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_H_SHIFT (0U) 1380 /*! 1381 * @brief FDB table config MACC_ADDR_H field mask. 1382 */ 1383 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_H_MASK (0x0000FFFFUL) 1384 /*! 1385 * @brief FDB table config MACC_ADDR_H. 1386 */ 1387 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_H(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_H_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_H_MASK) 1388 1389 /*! 1390 * @brief FDB table config FID field. 1391 */ 1392 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_FID_SHIFT (0U) 1393 /*! 1394 * @brief FDB table config FID field mask. 1395 */ 1396 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_FID_MASK (0x00000FFFUL) 1397 /*! 1398 * @brief FDB table config FID. 1399 */ 1400 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_FID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_FID_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_FID_MASK) 1401 1402 /*! 1403 * @brief FDB Table KEYE_DATA format. Netc_EthSwt_Ip_FDBTableKEYEDataType 1404 */ 1405 typedef struct { 1406 uint32 MacAddrL; /*!< FDB Mac addr L where the most significant byte of the MAC address is stored */ 1407 uint32 MacAddrH; /*!< FDB Mac addr H */ /* [notice]: just 16 bits */ 1408 uint32 Fid; /*!< FDB Fid */ /* [notice]: just 12 bits */ 1409 } Netc_EthSwt_Ip_FDBTableKEYEDataType; 1410 /* ---bits field for KEYE_DATA format--- */ 1411 1412 /* +++bits field for SEARCH_CRITERIA format+++ */ 1413 /*! 1414 * @brief FDB table search criteria ACTE_MC field. 1415 */ 1416 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTEMC_SHIFT (24U) 1417 /*! 1418 * @brief FDB table search criteria ACTE_MC field mask. 1419 */ 1420 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTEMC_MASK (0x01000000UL) 1421 /*! 1422 * @brief FDB table search criteria ACTE_MC. 1423 */ 1424 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTEMC(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTEMC_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTEMC_MASK) 1425 1426 /*! 1427 * @brief FDB table search criteria CFGE_MC field. 1428 */ 1429 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_CFGEMC_SHIFT (16U) 1430 /*! 1431 * @brief FDB table search criteria CFGE_MC field mask. 1432 */ 1433 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_CFGEMC_MASK (0x00070000UL) 1434 /*! 1435 * @brief FDB table search criteria CFGE_MC. 1436 */ 1437 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_CFGEMC(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_CFGEMC_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_CFGEMC_MASK) 1438 1439 /*! 1440 * @brief FDB table search criteria KEYE_MC field. 1441 */ 1442 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_KEYEMC_SHIFT (8U) 1443 /*! 1444 * @brief FDB table search criteria KEYE_MC field mask. 1445 */ 1446 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_KEYEMC_MASK (0x00000300UL) 1447 /*! 1448 * @brief FDB table search criteria KEYE_MC. 1449 */ 1450 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_KEYEMC(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_KEYEMC_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_KEYEMC_MASK) 1451 1452 /*! 1453 * @brief FDB table search criteria ACTF_LAG field. 1454 */ 1455 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTFLAG_SHIFT (7U) 1456 /*! 1457 * @brief FDB table search criteria ACTF_LAG field mask. 1458 */ 1459 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTFLAG_MASK (0x00000080UL) 1460 /*! 1461 * @brief FDB table search criteria ACTF_LAG. 1462 */ 1463 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTFLAG(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTFLAG_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTFLAG_MASK) 1464 1465 /*! 1466 * @brief FDB table search criteria ACT_CNT field. 1467 */ 1468 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTCNT_SHIFT (0U) 1469 /*! 1470 * @brief FDB table search criteria ACT_CNT field mask. 1471 */ 1472 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTCNT_MASK (0x0000007FUL) 1473 /*! 1474 * @brief FDB table search criteria ACT_CNT. 1475 */ 1476 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTCNT(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTCNT_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTCNT_MASK) 1477 1478 /*! 1479 * @brief FDB Table Match Criteria field data type enumeration. Netc_EthSwt_Ip_FDBTableMatchCriteriaDataType 1480 */ 1481 typedef enum { 1482 NETC_ETHSWT_IP_FDBTABLE_MATCH_ANY_CRITERIA = 0U, /*!< 0x0 = Match Any Criteria. */ 1483 NETC_ETHSWT_IP_FDBTABLE_MATCH_ACTE_DATA_FIELD, /*!< 0x1 = Exact match with ACTE_DATA. */ 1484 NETC_ETHSWT_IP_FDBTABLE_MATCH_CFGE_DYNAMIC_FIELD, /*!< 0x2: Match CFGE_DATA[DYNAMIC] field, will be remapped to 0x1 */ 1485 NETC_ETHSWT_IP_FDBTABLE_MATCH_CFGE_PORTBITMSP_FIELD, /*!< 0x3: Match CFGE_DATA[PORT_BITMAP] field, will be remapped to 0x2 */ 1486 NETC_ETHSWT_IP_FDBTABLE_MATCH_CFGE_DYNAMIC_AND_PORTBITMAP_FIELD, /*!< 0x4: Match CFGE_DATA[DYNAMIC & PORT_BITMAP] field, will be remapped to 0x3 */ 1487 NETC_ETHSWT_IP_FDBTABLE_MATCH_KEYE_FID_FIELD, /*!< 0x5: Match KEYE_DATA[FID] provided, will be remapped to 0x1 */ 1488 NETC_ETHSWT_IP_FDBTABLE_MATCH_KEYE_MULTICAST_BIT_OF_MACADDR, /*!< 0x6: Match KEYE_DATA[MAC_ADDR][MULTICAST], will be remapped to 0x2. 1489 Where the MAC Multicast bit is least significant bit of the most significant byte of the destination MAC address. 1490 KEYE_DATA[MAC_ADDR][MULTICAST] = 0b1, matching entries with multicast mac address 1491 KEYE_DATA[MAC_ADDR][MULTICAST] = 0b0, matching entries with unicast mac address */ 1492 NETC_ETHSWT_IP_FDBTABLE_MATCH_KEYE_FID_AND_MULTICAST_BIT_OF_MACADDR /*!< 0x7: Match KEYE_DATA[FID] and KEYE_DATA[MAC_ADDR][MULTICAST], will be remapped to 0x3. */ 1493 } Netc_EthSwt_Ip_FDBTableMatchCriteriaDataType; 1494 1495 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_MATCH_CRITERIA_ADJUSTING_FACTOR (1U) /*!< for remapping CFGE match criteria flag */ 1496 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_MATCH_CRITERIA_ADJUSTING_FACTOR (4U) /*!< for remapping KEYE match criteria flag */ 1497 1498 /*! 1499 * @brief Multicast bit of Mac Address field. 1500 */ 1501 #define NETC_ETHSWT_IP_MULTICASTBIT_OF_MAC_ADDRESS_SHIFT (0U) 1502 /*! 1503 * @brief Multicast bit of Mac Address field mask. 1504 */ 1505 #define NETC_ETHSWT_IP_MULTICASTBIT_OF_MAC_ADDRESS_MASK (0x00000001UL) 1506 /*! 1507 * @brief Multicast bit of Mac Address. 1508 */ 1509 #define NETC_ETHSWT_IP_MULTICASTBIT_OF_MAC_ADDRESS(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_MULTICASTBIT_OF_MAC_ADDRESS_SHIFT)) & NETC_ETHSWT_IP_MULTICASTBIT_OF_MAC_ADDRESS_MASK) 1510 1511 /*! 1512 * @brief FDB Table CFGE Match Criteria format in SEARCH_CRITERIA. Netc_EthSwt_Ip_FDBTableCFGEMatchDataType 1513 */ 1514 typedef struct { 1515 uint32 SearchPortBitMap; /*!< Fdb table search port bitmap data */ 1516 boolean SearchDynamicEntry; /*!< Fdb table search dynamic field in CFGE_DATA */ 1517 } Netc_EthSwt_Ip_FDBTableCFGEMatchDataType; 1518 1519 /*! 1520 * @brief FDB Table KEYE Match Criteria format in SEARCH_CRITERIA. Netc_EthSwt_Ip_FDBTableKEYEMatchDataType 1521 */ 1522 typedef struct { 1523 uint32 SearchFid; /*!< Fdb table search FID data */ 1524 boolean SearchMulticastMacAddr; /*!< TRUE: search Multicast Mac Address Entries 1525 FALSE: search Unicast Mac Address Entries */ 1526 } Netc_EthSwt_Ip_FDBTableKEYEMatchDataType; 1527 1528 /*! 1529 * @brief FDB Table ACTE_DATA (Activity Element Data) format. Netc_EthSwt_Ip_FDBTableACTEDataType 1530 */ 1531 typedef struct { 1532 uint8 ActivityCounter; /*!< Activity Counter data in ACTE_DATA format */ 1533 boolean ActivityFlag; /*!< Activity Flag data in ACTE_DATA format */ 1534 } Netc_EthSwt_Ip_FDBTableACTEDataType; 1535 1536 /*! 1537 * @brief FDB Table SEARCH_CRITERIA format. Netc_EthSwt_Ip_FDBTableSearchCriteriaDataType 1538 */ 1539 typedef struct { 1540 uint32 SearchResumeEntryId; /*!< Fdb table search criteria resume entry id */ 1541 Netc_EthSwt_Ip_FDBTableMatchCriteriaDataType SearchMatchCriteria; /*!< Fdb table search Match Criteria */ 1542 Netc_EthSwt_Ip_FDBTableACTEDataType SearchActeData; /*!< Fdb table search ACTE data */ 1543 Netc_EthSwt_Ip_FDBTableCFGEMatchDataType SearchCfgeData; /*!< Fdb table search CFGE data */ 1544 Netc_EthSwt_Ip_FDBTableKEYEMatchDataType SearchKeyeData; /*!< Fdb table search KEYE data */ 1545 } Netc_EthSwt_Ip_FDBTableSearchCriteriaDataType; 1546 1547 /*! 1548 * @brief FDB Table SEARCH_CRITERIA format enum type. 1549 * [notes:] the enum starts from 1U because it is the second item in FDB table request data buffer format 1550 */ 1551 typedef enum { 1552 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_RESUMEENTRYID = 1U, /*!< RESUME_ENTRY_ID field in Search Criteria Format */ 1553 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_MACADDRESS_L, /*!< Low part of Mac Address Field of KEYE DATA in Search Criteria Format */ 1554 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_MACADDRESS_H, /*!< High part of Mac Address Field of KEYE DATA in Search Criteria Format */ 1555 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_FID, /*!< FID Field of KEYE DATA in Search Criteria Format */ 1556 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_PORTBITMAP, /*!< Port_Bitmap Field of CFGE DATA in Search Criteria Format */ 1557 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_CFGECONFIG, /*!< Config Field of CFGE DATA in Search Criteria Format */ 1558 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ETEID, /*!< ET_EID Field of CFGE DATA in Search Criteria Format */ 1559 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_MATCHCRITERIA /*!< Match Criteria Field includes ACTE_MC, CFGE_MC etc in Search Criteria Format */ 1560 } Netc_EthSwt_Ip_FDBTableSearchCriteriaDataIndexType; 1561 /* ---bits field for SEARCH_CRITERIA format--- */ 1562 1563 /* +++bits field and structure for FDB Table Request Data Buffer Format+++ */ 1564 /*! 1565 * @brief Switch Tables Request Data Buffer CFGEU field. 1566 */ 1567 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_CFGEU_SHIFT (0U) 1568 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_CFGEU_MASK (0x00000001UL) 1569 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_CFGEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_CFGEU_SHIFT)) & NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_CFGEU_MASK) 1570 1571 /*! 1572 * @brief Rate Policer Table Request Data Buffer FEEU field. 1573 */ 1574 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_FEEU_SHIFT (1U) 1575 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_FEEU_MASK (0x00000002UL) 1576 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_FEEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_FEEU_SHIFT)) & NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_FEEU_MASK) 1577 1578 /*! 1579 * @brief Rate Policer Table Request Data Buffer PSEU field. 1580 */ 1581 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_PSEU_SHIFT (2U) 1582 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_PSEU_MASK (0x00000004UL) 1583 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_PSEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_PSEU_SHIFT)) & NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_PSEU_MASK) 1584 1585 /*! 1586 * @brief Rate Policer Table Request Data Buffer STSEU field. 1587 */ 1588 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT (3U) 1589 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK (0x00000008UL) 1590 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_STSEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT)) & NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK) 1591 1592 /*! 1593 * @brief FDB table Request Data Buffer ACTEU field. 1594 */ 1595 #define NETC_ETHSWT_IP_FDBTABLE_REQFMT_ACTIONS_FIELD_ACTEU_SHIFT (1U) 1596 #define NETC_ETHSWT_IP_FDBTABLE_REQFMT_ACTIONS_FIELD_ACTEU_MASK (0x00000002UL) 1597 #define NETC_ETHSWT_IP_FDBTABLE_REQFMT_ACTIONS_FIELD_ACTEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_REQFMT_ACTIONS_FIELD_ACTEU_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_REQFMT_ACTIONS_FIELD_ACTEU_MASK) 1598 1599 /*! 1600 * @brief Ingress Sequence Generation Table Request Data Buffer SGSEU field. 1601 */ 1602 #define NETC_ETHSWT_IP_ISQGTABLE_REQFMT_ACTIONS_FIELD_SGSEU_SHIFT (1U) 1603 #define NETC_ETHSWT_IP_ISQGTABLE_REQFMT_ACTIONS_FIELD_SGSEU_MASK (0x00000002UL) 1604 #define NETC_ETHSWT_IP_ISQGTABLE_REQFMT_ACTIONS_FIELD_SGSEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISQGTABLE_REQFMT_ACTIONS_FIELD_SGSEU_SHIFT)) & NETC_ETHSWT_IP_ISQGTABLE_REQFMT_ACTIONS_FIELD_SGSEU_MASK) 1605 1606 /*! 1607 * @brief Egress Sequence Recovery Table Request Data Buffer STSEU field. 1608 */ 1609 #define NETC_ETHSWT_IP_ESQRTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT (1U) 1610 #define NETC_ETHSWT_IP_ESQRTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK (0x00000002UL) 1611 #define NETC_ETHSWT_IP_ESQRTABLE_REQFMT_ACTIONS_FIELD_STSEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ESQRTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT)) & NETC_ETHSWT_IP_ESQRTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK) 1612 1613 /*! 1614 * @brief Egress Sequence Recovery Table Request Data Buffer SRSEU field. 1615 */ 1616 #define NETC_ETHSWT_IP_ESQRTABLE_REQFMT_ACTIONS_FIELD_SRSEU_SHIFT (2U) 1617 #define NETC_ETHSWT_IP_ESQRTABLE_REQFMT_ACTIONS_FIELD_SRSEU_MASK (0x00000004UL) 1618 #define NETC_ETHSWT_IP_ESQRTABLE_REQFMT_ACTIONS_FIELD_SRSEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ESQRTABLE_REQFMT_ACTIONS_FIELD_SRSEU_SHIFT)) & NETC_ETHSWT_IP_ESQRTABLE_REQFMT_ACTIONS_FIELD_SRSEU_MASK) 1619 1620 /*! 1621 * @brief Switch Tables Request Data Buffer DEBUG_OPTIONS field. 1622 */ 1623 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_DEBUG_OPTIONS_SHIFT (16U) 1624 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_DEBUG_OPTIONS_MASK (0x00FF0000UL) 1625 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_DEBUG_OPTIONS(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_DEBUG_OPTIONS_SHIFT)) & NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_DEBUG_OPTIONS_MASK) 1626 /*! 1627 * @brief Switch Tables Request Data Buffer QUERY_ACTIONS field. 1628 */ 1629 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS_SHIFT (24U) 1630 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS_MASK (0x0F000000UL) 1631 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS_SHIFT)) & NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS_MASK) 1632 1633 /*! 1634 * @brief Switch Tables Request Data Buffer TABLE_VERSION field. 1635 */ 1636 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSION_SHIFT (28U) 1637 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSION_MASK (0xF0000000UL) 1638 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSIONS(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSION_SHIFT)) & NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSION_MASK) 1639 1640 /*! 1641 * @brief Request and Response Data Buffer Format of Tables supported by Switch. 1642 */ 1643 typedef struct { 1644 uint32 TableDataField[NETC_ETHSWT_IP_TABLEDATA_BUFFER_LENGTH]; /*!< the request and response data buffer share the same memory */ 1645 } Netc_EthSwt_Ip_SwitchTableDataType; 1646 1647 1648 /*! 1649 * @brief FDB Table response data type enumeration. Netc_EthSwt_Ip_FDBTable_ResponsDataIndexType 1650 */ 1651 typedef enum { 1652 NETC_ETHSWT_FDBTABLE_RSPDATA_STATUS = 0x0U, /*!< Status Field In FDB Table Response Data Buffer */ 1653 NETC_ETHSWT_FDBTABLE_RSPDATA_ENTRYID, /*!< Entry_ID Field In FDB Table Response Data Buffer */ 1654 NETC_ETHSWT_FDBTABLE_RSPDATA_MACADDRESS_L, /*!< Low part of Mac Address Field of KEYE DATA In FDB Table Response Data Buffer */ 1655 NETC_ETHSWT_FDBTABLE_RSPDATA_MACADDRESS_H, /*!< High part of Mac Address Field of KEYE DATA In FDB Table Response Data Buffer */ 1656 NETC_ETHSWT_FDBTABLE_RSPDATA_FID, /*!< FID Field of KEYE DATA In FDB Table Response Data Buffer */ 1657 NETC_ETHSWT_FDBTABLE_RSPDATA_PORTBITMAP, /*!< Port_Bitmap Field of CFGE DATA In FDB Table Response Data Buffer */ 1658 NETC_ETHSWT_FDBTABLE_RSPDATA_CFGECONFIG, /*!< Config Field of CFGE DATA In FDB Table Response Data Buffer */ 1659 NETC_ETHSWT_FDBTABLE_RSPDATA_ETEID, /*!< ET_EID Field of CFGE DATA In FDB Table Response Data Buffer */ 1660 NETC_ETHSWT_FDBTABLE_RSPDATA_ACTEDATA /*!< ACTE Data Field In FDB Table Response Data Buffer */ 1661 } Netc_EthSwt_Ip_FDBTable_ResponsDataIndexType; 1662 /* ---bits field and structure for FDB Table Request Data Buffer Format--- */ 1663 1664 /* index of Ingress Count Table Request Data Buffer Format */ 1665 #define NETC_ETHSWT_IP_INGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD (0U) /*!< first uint32 item of Ingress Count Table Request Data Buffer Format */ 1666 #define NETC_ETHSWT_IP_INGRESSCOUNTTABLE_REQFMT_ACCESSKEY_FIELD (1U) /*!< second uint32 item of Ingress Count Table Request Data Buffer Format */ 1667 1668 /*! 1669 * @brief Data fields in Ingress Count Table Request Data Buffer Format. 1670 */ 1671 #define NETC_ETHSWT_IP_INGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT (0U) 1672 #define NETC_ETHSWT_IP_INGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK (0x00000001UL) 1673 #define NETC_ETHSWT_IP_INGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT)) & NETC_ETHSWT_IP_INGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK) 1674 1675 /* index of Egress Count Table Request Data Buffer Format */ 1676 #define NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD (0U) /*!< first uint32 item of Egress Count Table Request Data Buffer Format */ 1677 #define NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACCESSKEY_FIELD (1U) /*!< second uint32 item of Egress Count Table Request Data Buffer Format */ 1678 1679 /*! 1680 * @brief Data fields in Egress Count Table Request Data Buffer Format. 1681 */ 1682 #define NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT (0U) 1683 #define NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK (0x00000001UL) 1684 #define NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT)) & NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK) 1685 1686 /* index of data fields in FDB Table Response Action Buffer Format, ACT_FLAG */ 1687 #define NETC_ETHSWT_IP_FDBTABLE_REPFMT_ACTE_DATA_FIELD_ACT_FLAG_INACTIVE_FIELD (0U) /*!< FDB table entry was not active during this time period */ 1688 #define NETC_ETHSWT_IP_FDBTABLE_REPFMT_ACTE_DATA_FIELD_ACT_FLAG_ACTIVE_FIELD (1U) /*!< FDB table entry was active during this time period */ 1689 1690 /*! 1691 * @brief Data fields in FDB Table Response Action Buffer Format, ACT_FLAG. 1692 */ 1693 #define NETC_ETHSWT_IP_FDBTABLE_REPFMT_ACTE_DATA_FIELD_ACT_FLAG_SHIFT (7U) 1694 #define NETC_ETHSWT_IP_FDBTABLE_REPFMT_ACTE_DATA_FIELD_ACT_FLAG_MASK (0x00000080UL) 1695 #define NETC_ETHSWT_IP_FDBTABLE_REPFMT_ACTE_DATA_FIELD_ACT_FLAG(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT)) & NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK) 1696 1697 /*! 1698 * @brief Data fields in FDB Table Response Action Buffer Format, ACT_CNT. 1699 */ 1700 #define NETC_ETHSWT_IP_FDBTABLE_REPFMT_ACTE_DATA_FIELD_ACT_CNT_SHIFT (0U) 1701 #define NETC_ETHSWT_IP_FDBTABLE_REPFMT_ACTE_DATA_FIELD_ACT_CNT_MASK (0x0000007FUL) 1702 #define NETC_ETHSWT_IP_FDBTABLE_REPFMT_ACTE_DATA_FIELD_ACT_CNT(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT)) & NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK) 1703 1704 /*! 1705 * @brief Egress Count Table update actions data type enumeration. Netc_EthSwt_Ip_ECTableUpdateActionsDataType 1706 */ 1707 typedef enum { 1708 NETC_ETHSWT_EGRESSCOUNTTABLE_NO_UPDATE_STATISTICS_ELEMENT = 0U, /*!< No update performed to the Statistics Element */ 1709 NETC_ETHSWT_EGRESSCOUNTTABLE_RESET_STATISTICS_ELEMENT /*!< All counters within the Statistics Element are reset */ 1710 } Netc_EthSwt_Ip_ECTableUpdateActionsDataType; 1711 1712 typedef enum { 1713 NETC_ETHSWT_INGRESSCOUNTTABLE_NO_UPDATE_STATISTICS_ELEMENT = 0U, /*!< No update performed to the Statistics Element */ 1714 NETC_ETHSWT_INGRESSCOUNTTABLE_RESET_STATISTICS_ELEMENT /*!< All counters within the Statistics Element are reset */ 1715 } Netc_EthSwt_Ip_ICTableUpdateActionsDataType; 1716 1717 /*! 1718 * @brief Statistics data of Egress Count Table in response data buffer. Netc_EthSwt_Ip_ECTableStatisticsDataType 1719 * @implements Netc_EthSwt_Ip_ECTableStatisticsDataType_struct 1720 */ 1721 typedef struct { 1722 uint64 EnqueuedFrmCnt; /*!< Enqueued Frame Count data, the number of frames enqueued on egress class queues */ 1723 uint64 RejectedFrmCnt; /*!< Rejected Frame Count data, he number of frames rejected in egress class queues, due to tail drop */ 1724 } Netc_EthSwt_Ip_ECTableStatisticsDataType; 1725 1726 /*! 1727 * @brief Egress Count Table response data type enumeration. Netc_EthSwt_Ip_EgressCountTable_RspDataIndexType 1728 */ 1729 typedef enum { 1730 NETC_ETHSWT_ECTABLE_RSPDATA_ENTRYID = 0x0U, /*!< Entry Id Field In Egress Count Table Response Data Buffer */ 1731 NETC_ETHSWT_ECTABLE_RSPDATA_ENQFRMCNT_L, /*!< Lower 32bits of Enqueued Frame Count Field In Egress Count Table Response Data Buffer */ 1732 NETC_ETHSWT_ECTABLE_RSPDATA_ENQFRMCNT_H, /*!< Higher 32bits of Enqueued Frame Count Field In Egress Count Table Response Data Buffer */ 1733 NETC_ETHSWT_ECTABLE_RSPDATA_REJFRMCNT_L, /*!< Lower 32bits of Rejected Frame Count Field In Egress Count Table Response Data Buffer */ 1734 NETC_ETHSWT_ECTABLE_RSPDATA_REJFRMCNT_H /*!< Higher 32bits of Rejected Frame Count Field In Egress Count Table Response Data Buffer */ 1735 } Netc_EthSwt_Ip_EgressCountTable_RspDataIndexType; 1736 1737 /*! 1738 * @brief EFM_DATA_LEN field in Egress Treatment Table CFGE_DATA format. 1739 */ 1740 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_DATA_LEN_SHIFT (16U) 1741 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_DATA_LEN_MASK (0x07FF0000UL) 1742 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_DATA_LEN(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_DATA_LEN_SHIFT)) & NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_DATA_LEN_MASK) 1743 1744 /*! 1745 * @brief EFM_LEN_CHANGE field in Egress Treatment Table CFGE_DATA format. 1746 */ 1747 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_LEN_CHANGE_SHIFT (9U) 1748 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_LEN_CHANGE_MASK (0x0000FE00UL) 1749 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_LEN_CHANGE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_LEN_CHANGE_SHIFT)) & NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_LEN_CHANGE_MASK) 1750 1751 /*! 1752 * @brief ECA field in Egress Treatment Table CFGE_DATA format. 1753 */ 1754 #define NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_COUNTER_ACTION_SHIFT (6U) 1755 #define NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_COUNTER_ACTION_MASK (0x000001C0UL) 1756 #define NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_COUNTER_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_COUNTER_ACTION_SHIFT)) & NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_COUNTER_ACTION_MASK) 1757 1758 /*! 1759 * @brief ESQA field in Egress Treatment Table CFGE_DATA format. 1760 */ 1761 #define NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_SEQUENCE_ACTION_SHIFT (4U) 1762 #define NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_SEQUENCE_ACTION_MASK (0x00000030UL) 1763 #define NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_SEQUENCE_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_SEQUENCE_ACTION_SHIFT)) & NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_SEQUENCE_ACTION_MASK) 1764 1765 /*! 1766 * @brief EFM_MODE field in Egress Treatment Table CFGE_DATA format. 1767 */ 1768 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_MODE_SHIFT (0U) 1769 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_MODE_MASK (0x00000003UL) 1770 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_MODE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_MODE_SHIFT)) & NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_MODE_MASK) 1771 1772 /*! 1773 * @brief Egress Treatment Table egress counter action data type definitions. 1774 */ 1775 typedef uint32 Netc_EthSwt_Ip_EgressTreatmentTableCounterActionType; 1776 #define NETC_ETHSWT_EGRESSTREATMENTTABLE_NOT_INCREMENT_EGRESSFRMCOUNTER (0x0U) /*!< Do not increment egress frame counter */ 1777 #define NETC_ETHSWT_EGRESSTREATMENTTABLE_INCREMENT_EGRESSFRMCOUNTER (0x1U) /*!< Increment egress frame counter */ 1778 1779 /*! 1780 * @brief Egress Treatment Table egress sequence actions data type definitions. 1781 */ 1782 typedef uint32 Netc_EthSwt_Ip_EgressTreatmentTableSequenceActionType; 1783 #define NETC_ETHSWT_EGRESSTREATMENTTABLE_NO_SEQUENCE_ACTION_REQUIRED (0x0U) /*!< No Sequence Action required */ 1784 #define NETC_ETHSWT_EGRESSTREATMENTTABLE_SEQUENCE_RECOVERY_ACTION (0x2U) /*!< Sequence Recovery action */ 1785 1786 /*! 1787 * @brief Egress Treatment Table egress frame modification mode data type definitions. 1788 */ 1789 typedef uint32 Netc_EthSwt_Ip_EgressTreatmentTableFrmModificationModeType; 1790 #define NETC_ETHSWT_EGRESSTREATMENTTABLE_DEFAULT_FRM_MODIFICATION_MODE (0x0U) /*!< Normal/Default mode */ 1791 #define NETC_ETHSWT_EGRESSTREATMENTTABLE_L2ACTION_FRM_MODIFICATION_MODE (0x1U) /*!< When EFM_EID[L2_ACT]=1b */ 1792 #define NETC_ETHSWT_EGRESSTREATMENTTABLE_PAYLOADACTION_FRM_MODIFICATION_MODE (0x2U) /*!< When EFM_EID[PLD_ACT]=001b */ 1793 1794 /*! 1795 * @brief Egress Treatment Table response data type enumeration. Netc_EthSwt_Ip_EgressTreatmentTable_RspDataIndexType 1796 */ 1797 typedef enum { 1798 NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_RSPFMT_ENTRYID_FIELD = 0U, /*!< first uint32 item of Egress Treatment Table Response Data Buffer Format */ 1799 NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_RSPFMT_CFGEDATA0, /*!< first item of CFGEDATA but second item of Egress Treatment Table Response Data Buffer Format */ 1800 NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_RSPFMT_CFGEDATA1, /*!< second item of CFGEDATA but third item of Egress Treatment Table Response Data Buffer Format */ 1801 NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_RSPFMT_CFGEDATA2, /*!< third item of CFGEDATA but forth item of Egress Treatment Table Response Data Buffer Format */ 1802 NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_RSPFMT_CFGEDATA3 /*!< forth item of CFGEDATA but fifth item of Egress Treatment Table Response Data Buffer Format */ 1803 } Netc_EthSwt_Ip_EgressTreatmentTable_RspDataIndexType; 1804 1805 /*! 1806 * @brief defines Egress Treatment Table entries. 1807 * @implements Netc_EthSwt_Ip_EgressTreatmentEntryDataType_struct 1808 */ 1809 typedef struct 1810 { 1811 uint32 EgressTreatmentEntryID; /*!< Egress Treatment Table Entry ID */ 1812 uint32 EgressSeqActionsTargetEID; /*!< Egress Sequence Actions Target Entry ID */ 1813 uint32 EgressCountTableEID; /*!< Egress Count Table Entry ID */ 1814 uint32 EgressFrmModificationEID; /*!< Egress Frame Modification Entry ID */ 1815 uint16 EgressFrmModificationDataLength; /*!< Egress Frame Modification Data Length */ 1816 uint8 EgressFrmModificationLengthChange; /*!< Egress Frame Modification Length Change */ 1817 Netc_EthSwt_Ip_EgressTreatmentTableCounterActionType EgressCounterAction; /*!< Egress Counter Action */ 1818 Netc_EthSwt_Ip_EgressTreatmentTableSequenceActionType EgressSequenceAction; /*!< Egress Sequence Actions */ 1819 Netc_EthSwt_Ip_EgressTreatmentTableFrmModificationModeType EgressFrmModificationMode; /*!< Egress Frame Modification Mode */ 1820 } Netc_EthSwt_Ip_EgressTreatmentEntryDataType; 1821 1822 /*! 1823 * @brief DEST_MAC_ADDR (most significant portion) field in Frame Modification Table CFGE_DATA format. 1824 */ 1825 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_DEST_MAC_ADDR_H_SHIFT (16U) 1826 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_DEST_MAC_ADDR_H_MASK (0xFFFF0000UL) 1827 #define NENETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_DEST_MAC_ADDR_H(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_DEST_MAC_ADDR_H_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_DEST_MAC_ADDR_H_MASK) 1828 1829 /*! 1830 * @brief SMAC_PORT field in Frame Modification Table CFGE_DATA format. 1831 */ 1832 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SRC_MAC_ADDR_PORT_SHIFT (11U) 1833 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SRC_MAC_ADDR_PORT_MASK (0x0000F800UL) 1834 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SRC_MAC_ADDR_PORT(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SRC_MAC_ADDR_PORT_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SRC_MAC_ADDR_PORT_MASK) 1835 1836 /*! 1837 * @brief SQT_ACT field in Frame Modification Table CFGE_DATA format. 1838 */ 1839 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SEQUENCE_TAG_ACTION_SHIFT (8U) 1840 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SEQUENCE_TAG_ACTION_MASK (0x00000700UL) 1841 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SEQUENCE_TAG_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SEQUENCE_TAG_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SEQUENCE_TAG_ACTION_MASK) 1842 1843 /*! 1844 * @brief OUTER_VID_ACT field in Frame Modification Table CFGE_DATA format. 1845 */ 1846 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VID_ACTION_SHIFT (6U) 1847 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VID_ACTION_MASK (0x000000C0UL) 1848 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VID_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VID_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VID_ACTION_MASK) 1849 1850 /*! 1851 * @brief VLAN_HDR_ACT field in Frame Modification Table CFGE_DATA format. 1852 */ 1853 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_VLAN_HEADER_ACTION_SHIFT (4U) 1854 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_VLAN_HEADER_ACTION_MASK (0x00000030UL) 1855 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_VLAN_HEADER_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_VLAN_HEADER_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_VLAN_HEADER_ACTION_MASK) 1856 1857 /*! 1858 * @brief MAC_HDR_ACT field in Frame Modification Table CFGE_DATA format. 1859 */ 1860 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_MAC_HEADER_ACTION_SHIFT (1U) 1861 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_MAC_HEADER_ACTION_MASK (0x0000000EUL) 1862 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_MAC_HEADER_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_MAC_HEADER_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_MAC_HEADER_ACTION_MASK) 1863 1864 /*! 1865 * @brief L2_ACT field in Frame Modification Table CFGE_DATA format. 1866 */ 1867 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_LAYER2_ACTION_SHIFT (0U) 1868 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_LAYER2_ACTION_MASK (0x00000001UL) 1869 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_LAYER2_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_LAYER2_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_LAYER2_ACTION_MASK) 1870 1871 /*! 1872 * @brief PLD_ACT field in Frame Modification Table CFGE_DATA format. 1873 */ 1874 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_ACTION_SHIFT (24U) 1875 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_ACTION_MASK (0x07000000UL) 1876 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_ACTION_MASK) 1877 1878 /*! 1879 * @brief OUTER_DEI_ACT field in Frame Modification Table CFGE_DATA format. 1880 */ 1881 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_DEI_ACTION_SHIFT (22U) 1882 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_DEI_ACTION_MASK (0x00C00000UL) 1883 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_DEI_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_DEI_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_DEI_ACTION_MASK) 1884 1885 /*! 1886 * @brief OUTER_PCP_ACT field in Frame Modification Table CFGE_DATA format. 1887 */ 1888 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_PCP_ACTION_SHIFT (19U) 1889 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_PCP_ACTION_MASK (0x00380000UL) 1890 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_PCP_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_PCP_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_PCP_ACTION_MASK) 1891 1892 /*! 1893 * @brief OUTER_TPID_ACT field in Frame Modification Table CFGE_DATA format. 1894 */ 1895 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_TPID_ACTION_SHIFT (16U) 1896 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_TPID_ACTION_MASK (0x00070000UL) 1897 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_TPID_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_TPID_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_TPID_ACTION_MASK) 1898 1899 /*! 1900 * @brief OUTER_VLAN_DEI field in Frame Modification Table CFGE_DATA format. 1901 */ 1902 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_DEI_SHIFT (15U) 1903 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_DEI_MASK (0x00008000UL) 1904 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_DEI(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_DEI_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_DEI_MASK) 1905 1906 /*! 1907 * @brief OUTER_VLAN_PCP field in Frame Modification Table CFGE_DATA format. 1908 */ 1909 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_PCP_SHIFT (12U) 1910 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_PCP_MASK (0x00007000UL) 1911 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_PCP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_PCP_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_PCP_MASK) 1912 1913 /*! 1914 * @brief OUTER_VLAN_VID field in Frame Modification Table CFGE_DATA format. 1915 */ 1916 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_VID_SHIFT (0U) 1917 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_VID_MASK (0x00000FFFUL) 1918 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_VID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_VID_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_VID_MASK) 1919 1920 /*! 1921 * @brief PLD_OFFSET field in Frame Modification Table CFGE_DATA format. 1922 */ 1923 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_OFFSET_SHIFT (0U) 1924 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_OFFSET_MASK (0x000000FFUL) 1925 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_OFFSET(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_OFFSET_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_OFFSET_MASK) 1926 1927 /*! 1928 * @brief FMD_BYTES field in Frame Modification Table CFGE_DATA format. 1929 */ 1930 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_FRM_MODI_BYTES_SHIFT (0U) 1931 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_FRM_MODI_BYTES_MASK (0x0000FFFFUL) 1932 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_FRM_MODI_BYTES(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_FRM_MODI_BYTES_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_FRM_MODI_BYTES_MASK) 1933 1934 /*! 1935 * @brief Frame Modification Table response data type enumeration. Netc_EthSwt_Ip_FrmModificationTable_RspDataIndexType 1936 */ 1937 typedef enum { 1938 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_ENTRYID_FIELD = 0U, /*!< first uint32 item of Frame modification Table Response Data Buffer Format */ 1939 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_CFGEDATA0, /*!< first item of CFGEDATA but second item of Frame Modification Table Response Data Buffer Format */ 1940 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_CFGEDATA1, /*!< second item of CFGEDATA but third item of Frame Modification Table Response Data Buffer Format */ 1941 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_CFGEDATA2, /*!< third item of CFGEDATA but forth item of Frame Modification Table Response Data Buffer Format */ 1942 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_CFGEDATA3, /*!< forth item of CFGEDATA but fifth item of Frame Modification Table Response Data Buffer Format */ 1943 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_CFGEDATA4, /*!< fifth item of CFGEDATA but sixth item of Frame Modification Table Response Data Buffer Format */ 1944 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_CFGEDATA5 /*!< sixth item of CFGEDATA but seventh item of Frame Modification Table Response Data Buffer Format */ 1945 } Netc_EthSwt_Ip_FrmModificationTable_RspDataIndexType; 1946 1947 /*! 1948 * @brief defines Frame Modification Table entries. 1949 * @implements Netc_EthSwt_Ip_FrmModificationEntryDataType_struct 1950 */ 1951 typedef struct 1952 { 1953 uint32 FrmModificationEntryID; /*!< Frame Modification Table Entry ID */ 1954 uint32 FrmModificationDataEntryID; /*!< Frame Modification Data Table Entry ID */ 1955 uint16 FrmModificationDataBytes; /*!< Frame Modification Data Bytes */ 1956 uint8 DestMacAddr[6U]; /*!< Destination Mac Address, big-endian order */ 1957 uint8 SrcMacAddrRegisterPort; /*!< Source Mace Address Register Port */ 1958 uint8 SequenceTagAction; /*!< Sequence Tag Action */ 1959 uint8 OuterVidActions; /*!< Outer VID Actions */ 1960 uint8 L2HeaderVlanActions; /*!< Layer 2 VLAN Actions */ 1961 uint8 L2HeaderMacActions; /*!< Layer 2 Header Mac Actions */ 1962 uint8 L2Actions; /*!< Layer 2 Actions */ 1963 uint8 PayloadActions; /*!< Payload Actions */ 1964 uint8 OuterDeiAction; /*!< Outer DEI Action */ 1965 uint8 OuterPcpAction; /*!< Outer PCP Action */ 1966 uint8 OuterTpidAction; /*!< Outer TPID Action */ 1967 uint8 OuterVlanDei; /*!< Outer VLAN DEI */ 1968 uint8 OuterVlanPcp; /*!< Outer VLAN PCP */ 1969 uint16 OuterVlanVID; /*!< Outer VLAN VID */ 1970 uint8 PayloadOffset; /*!< Payload Offset */ 1971 } Netc_EthSwt_Ip_FrmModificationEntryDataType; 1972 1973 /*! 1974 * @brief Ingress Port Filter Table CFGE_DATA format enum type. Netc_EthSwt_Ip_IngressPortFilterTableCFGEDataIndexType 1975 */ 1976 typedef enum { 1977 NETC_ETHSWT_IP_INGRESSPORTFILTER_CFGE_CONFIG_FIELD = 54U, /*!< CONFIG field includes IPV, DR, FLTFA etc in Ingress Port Filter Table CFGE_DATA Format */ 1978 NETC_ETHSWT_IP_INGRESSPORTFILTER_CFGE_FLTATGT_FIELD = 55U /*!< FLTA_TGT (Target For Selected Filter Action) field in Ingress Port Filter Table CFGE_DATA Format */ 1979 } Netc_EthSwt_Ip_IngressPortFilterTableCFGEDataIndexType; 1980 1981 /*! 1982 * @brief Ingress Port Filter table CFGE_DATA config field. 1983 */ 1984 /* IPV field */ 1985 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IPV_SHIFT (0U) 1986 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IPV_MASK (0x0000000FUL) 1987 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IPV_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IPV_MASK) 1988 1989 /* OIPV */ 1990 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_OIPV_SHIFT (4U) 1991 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_OIPV_MASK (0x00000010UL) 1992 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_OIPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_OIPV_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_OIPV_MASK) 1993 1994 /* DR */ 1995 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_DR_SHIFT (5U) 1996 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_DR_MASK (0x00000060UL) 1997 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_DR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_DR_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_DR_MASK) 1998 1999 /* ODR */ 2000 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_ODR_SHIFT (7U) 2001 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_ODR_MASK (0x00000080UL) 2002 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_ODR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_ODR_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_ODR_MASK) 2003 2004 /* FLTFA */ 2005 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTFA_SHIFT (8U) 2006 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTFA_MASK (0x00000300UL) 2007 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTFA(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTFA_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTFA_MASK) 2008 2009 /* IMIRE */ 2010 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IMIRE_SHIFT (11U) 2011 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IMIRE_MASK (0x00000800UL) 2012 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IMIRE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IMIRE_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IMIRE_MASK) 2013 2014 /* WOLTE */ 2015 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_WOLTE_SHIFT (12U) 2016 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_WOLTE_MASK (0x00001000UL) 2017 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_WOLTE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_WOLTE_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_WOLTE_MASK) 2018 2019 /* FLTA */ 2020 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTA_SHIFT (13U) 2021 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTA_MASK (0x00006000UL) 2022 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTA(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTA_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTA_MASK) 2023 2024 /* RPR */ 2025 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_RPR_SHIFT (15U) 2026 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_RPR_MASK (0x00018000UL) 2027 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_RPR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_RPR_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_RPR_MASK) 2028 2029 /* CTD */ 2030 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_CTD_SHIFT (17U) 2031 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_CTD_MASK (0x00020000UL) 2032 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_CTD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_CTD_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_CTD_MASK) 2033 2034 /* HR */ 2035 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_HR_SHIFT (18U) 2036 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_HR_MASK (0x003C0000UL) 2037 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_HR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_HR_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_HR_MASK) 2038 2039 /* TIMECAP */ 2040 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_TIMECAP_SHIFT (22U) 2041 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_TIMECAP_MASK (0x00400000UL) 2042 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_TIMECAP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_TIMECAP_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_TIMECAP_MASK) 2043 2044 /*! 2045 * @brief Ingress Port Filter table KEYE_DATA field. 2046 */ 2047 /* DSCP field */ 2048 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DIFFSCP_SHIFT (0U) 2049 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DIFFSCP_MASK (0x0000003FUL) 2050 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DIFFSCP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DIFFSCP_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DIFFSCP_MASK) 2051 2052 /* DSCP Mask field */ 2053 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DSCPMASK_SHIFT (6U) 2054 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DSCPMASK_MASK (0x00000FC0UL) 2055 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DSCPMASK(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DSCPMASK_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DSCPMASK_MASK) 2056 2057 /* SRC_PORT field */ 2058 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPRTID_SHIFT (16U) 2059 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPRTID_MASK (0x001F0000UL) 2060 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPRTID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPRTID_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPRTID_MASK) 2061 2062 /* SRC_PORT Mask field */ 2063 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK_SHIFT (21U) 2064 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK_MASK (0x03E00000UL) 2065 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK_MASK) 2066 2067 /*! 2068 * @brief Ingress Port Filter table Request Data Buffer STSEU field. 2069 */ 2070 #define NETC_ETHSWT_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT (1U) 2071 #define NETC_ETHSWT_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK (0x00000002UL) 2072 #define NETC_ETHSWT_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK) 2073 2074 /*! 2075 * @brief Filter Forwarding Action data type definitions for Ingress Port Filter Table. 2076 */ 2077 typedef uint32 Netc_EthSwt_Ip_CfgeFilterForwardingActionDataType; 2078 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_DISCARDFRAMES (0x0U) /*!< discard frames */ 2079 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_PERMITFRAMES (0x1U) /*!< permit frames */ 2080 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_REDIRECTFRAMES (0x2U) /*!< Redirect frame to switch management port without any frame modification */ 2081 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_COPYFRAMES (0x3U) /*!< Copy frame to switch management port without any frame modification */ 2082 2083 /*! 2084 * @brief Filter Action data type definitions for Ingress Port Filter Table. 2085 */ 2086 typedef uint32 Netc_EthSwt_Ip_CfgeFilterActionDataType; 2087 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_NOACTION (0x0U) /*!< no action */ 2088 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_RATEACTION (0x1U) /*!< Rate action with the Rate Policer Entry ID (RP_EID) set to the value configured in the FLTA_TGT field of this entry */ 2089 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_INGRESSSTREAMIDENTIFICATIONACTION (0x2U) /*!< Ingress stream identification action where the Ingress Stream Entry ID (IS_EID) is set to the value configured in the FLTA_TGT field of this entry */ 2090 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_SETTINGL2FILTERINGSIBITMAP (0x3U) /*!< valid on ENETC side. Setting a pre L2 filtering SI bitmap that will be used by the L2 filtering function to determine the final SI bitmap */ 2091 2092 /*! 2093 * @brief defines Ingress Port Filter Table CFGE_DATA type. 2094 */ 2095 typedef struct 2096 { 2097 uint32 CfgeTargetForSelectedFilterAction; /*!< FLTA_TGT filed in CFGE_DATA format */ 2098 uint8 CfgeIpv; /*!< IPV (internal priority value) filed in CFGE_DATA format */ 2099 uint8 CfgeDr; /*!< DR (drop resilience) field in CFGE_DATA format */ 2100 uint8 CfgeRelativePrecedentResolution; /*!< RPR field in CFGE_DATA format */ 2101 uint8 CfgeHostReason; /*!< HR field in CFGE_DATA format */ 2102 boolean CfgeOverrideIpv; /*!< OIPV (override internal priority value) field in CFGE_DATA format*/ 2103 boolean CfgeOverrideDr; /*!< ODR (override drop resilience) field in CFGE_DATA format */ 2104 boolean CfgeIngressMirroringEnable; /*!< IMIRE field in CFGE_DATA format */ 2105 boolean CfgeWakeOnLanTriggerEnable; /*!< WOLTE filed in CFGE_DATA format */ 2106 boolean CfgeCutThroughDisable; /*!< CTD field in CFGE_DATA format */ 2107 boolean CfgeTimestampCaptureEable; /*!< TIMECAPE field in CFGE_DATA format */ 2108 Netc_EthSwt_Ip_CfgeFilterForwardingActionDataType CfgeFilterForwardingAction; /*!< FLTFA field in CFGE_DATA format */ 2109 Netc_EthSwt_Ip_CfgeFilterActionDataType CfgeFilterAction; /*!< FLTA field in CFGE_DATA format */ 2110 } Netc_EthSwt_Ip_IngressPortFilterCfgeDataType; 2111 2112 /*! 2113 * @brief defines Ingress Port Filter Table KEYE_DATA type. 2114 */ 2115 typedef struct 2116 { 2117 uint16 KeyePrecedence; /*!< Precedence field */ 2118 uint16 keyeFrmAttributeFlags; /*!< Frame Attribute Flags field */ 2119 uint16 KeyeFrmAttributeFlagsMask; /*!< Frame Attribute Flags Mask field */ 2120 uint8 KeyeDifferentiatedServicesCodePoint; /*!< Differentiated Services Code Point field */ 2121 uint8 KeyeDifferentiatedServicesCodePointMask; /*!< Differentiated Services Code Point Mask field */ 2122 uint8 KeyeSourcePortID; /*!< Source Port ID field */ 2123 uint8 KeyeSourcePortIDMask; /*!< Source Port ID Mask field */ 2124 uint16 KeyeOuterVLANTagControlInformation; /*!< Outer VLAN Tag Control Information field */ 2125 uint16 KeyeOuterVLANTagControlInformationMask; /*!< Outer VLAN Tag Control Information Mask field */ 2126 uint8 KeyeDstMacAddr[6U]; /*!< Destination MAC Address field */ 2127 uint8 KeyeDstMacAddrMask[6U]; /*!< Destination MAC Address Mask field */ 2128 uint8 KeyeSrcMacAddr[6U]; /*!< Source MAC Address field */ 2129 uint8 KeyeSrcMacAddrMask[6U]; /*!< Source MAC Address Mask field */ 2130 uint16 KeyeInnerVLANTagControlInformation; /*!< Inner VLAN Tag Control Information field */ 2131 uint16 KeyeInnerVLANTagControlInformationMask; /*!< Inner VLAN Tag Control Information Mask field */ 2132 uint16 KeyeEtherType; /*!< EtherType field */ 2133 uint16 KeyeEtherTypeMask; /*!< EtherType Mask field */ 2134 uint8 KeyeIPProtocol; /*!< IP Protocol field */ 2135 uint8 KeyeIPProtocolMask; /*!< IP Protocol Mask field */ 2136 uint32 KeyeIPSourceAddress[4U]; /*!< IP Source Address field */ 2137 uint32 KeyeIPSourceAddressMask[4U]; /*!< IP Source Address Mask field */ 2138 uint16 KeyeL4SourcePort; /*!< L4 Source Port field */ 2139 uint16 KeyeL4SourcePortMask; /*!< L4 Source Port Mask field */ 2140 uint32 KeyeIPDestinationAddress[4U]; /*!< IP Destination Address field */ 2141 uint32 KeyeIPDestinationAddressMask[4U]; /*!< IP Destination Address Mask field */ 2142 uint16 KeyeL4DestinationPort; /*!< L4 Destination Port field */ 2143 uint16 KeyeL4DestinationPortMask; /*!< L4 Destination Port Mask field */ 2144 uint8 KeyePayloadBytes[24U]; /*!< Payload Bytes field */ 2145 uint8 KeyePayloadBytesMask[24U]; /*!< Payload Bytes Mask field */ 2146 } Netc_EthSwt_Ip_IngressPortFilterKeyeDataType; 2147 2148 /*! 2149 * @brief defines Ingress Port Filter Table entries. 2150 * @implements Netc_EthSwt_Ip_IngressPortFilterEntryDataType_struct 2151 */ 2152 typedef struct 2153 { 2154 uint32 IngressPortFilterEntryID; /*!< Ingress Port Filter Table Entry ID */ 2155 Netc_EthSwt_Ip_IngressPortFilterCfgeDataType IngressPortFilterCfgeData; /*!< Ingress Port Filter Table CFGE_DATA format */ 2156 Netc_EthSwt_Ip_IngressPortFilterKeyeDataType IngressPortFilterkeyeData; /*!< Ingress Port Filter Table KEYE_DATA format */ 2157 uint64 IngressPortFilterMatchCount; /*!< Ingress Port Filter Table Match Count Data */ 2158 } Netc_EthSwt_Ip_IngressPortFilterEntryDataType; 2159 2160 /*! 2161 * @brief enum type for administrative gate operation type (as per IEEE 802.1Q-2018) field for gate control list entry. 2162 */ 2163 typedef enum { 2164 ETHSWT_HOST_REQUEST_UNCHANGED, /*!< 0x0: SetGateStates. HoldRequest is unchanged. */ 2165 ETHSWT_HOST_REQUEST_HOLD, /*!< 0x1: Set-And-Hold-MAC. HoldRequest is set to value hold (1). */ 2166 ETHSWT_HOST_REQUEST_RELEASE /*!< 0x2: Set-And-Release-MAC. HoldRequest is set to value release (0). */ 2167 } Netc_EthSwt_Ip_AdminGateOperationType; 2168 2169 /*! 2170 * @brief enum type for Administrative Traffic Class Gate States. 2171 */ 2172 typedef enum { 2173 ETHSWT_TRAFFIC_CLASS_GATE_CLOSED, /*!< 0x0: Gate closed. */ 2174 ETHSWT_TRAFFIC_CLASS_GATE_OPEN /*!< 0x1: Gate open. */ 2175 } Netc_EthSwt_Ip_AdminTrafficClassGateStateType; 2176 2177 /*! 2178 * @brief Time Gate Scheduling Table CFGE_DATA field. 2179 */ 2180 /* Administrative Traffic Class Gate States for Gate Entry */ 2181 #define NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_TC_STATES_SHIFT (0U) 2182 #define NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_TC_STATES_MASK (0x000000FFUL) 2183 #define NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_TC_STATES(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_TC_STATES_SHIFT)) & NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_TC_STATES_MASK) 2184 2185 /* Administrative gate operation type (as per IEEE 802.1Q-2018) field for gate control list entry */ 2186 #define NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_HR_CB_SHIFT (16U) 2187 #define NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_HR_CB_MASK (0x000F0000UL) 2188 #define NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_HR_CB(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_HR_CB_SHIFT)) & NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_HR_CB_MASK) 2189 2190 /*! 2191 * @brief defines Gate Entry Admin Control List Data type for Time Gate Scheduling Table. 2192 */ 2193 typedef struct 2194 { 2195 uint32 AdminTimeInterval; /*!< Administrative Time Interval for Gate Entry */ 2196 uint8 AdminTrafficClassGateStates; /*!< Administrative Traffic Class Gate States for Gate Entry */ 2197 Netc_EthSwt_Ip_AdminGateOperationType AdminGateOperationType; /*!< Administrative gate operation type (as per IEEE 802.1Q-2018) field for gate control list entry */ 2198 } Netc_EthSwt_Ip_GateEntryAdminControlListDataType; 2199 2200 /*! 2201 * @brief defines Time Gate Scheduling Table entries. 2202 * @implements Netc_EthSwt_Ip_TimeGateSchedulingEntryDataType_struct 2203 */ 2204 typedef struct 2205 { 2206 uint32 TimeGateSchedulingTable_EID; /*!< Time Gate Scheduling Table Entry ID, which is actually the port index of switch */ 2207 uint64 AdminBaseTime; /*!< Administrative Base Time */ 2208 uint32 AdminCycleTime; /*!< Administrative Cycle Time */ 2209 uint32 AdminCycleTimeExt; /*!< Administrative Cycle Time Extension */ 2210 uint16 AdminControlListLength; /*!< Administrative Control List Length */ 2211 Netc_EthSwt_Ip_GateEntryAdminControlListDataType GateEntryAdminControlListData[NETC_ETHSWT_MAX_NUMBER_OF_GATECONTROLLIST_ENTRIES]; 2212 } Netc_EthSwt_Ip_TimeGateSchedulingEntryDataType; 2213 2214 /** 2215 * @brief MAC learning optoin type enumeration. 2216 * @implements Netc_EthSwt_Ip_MacLearningOptionType_enum 2217 */ 2218 typedef enum { 2219 ETHSWT_MACLEARNINGOPTION_HWDISABLED = (uint8)0x1U, /*!< @brief If hardware learning disabled, the switch must not learn new MAC addresses */ 2220 ETHSWT_MACLEARNINGOPTION_HWENABLED = (uint8)0x2U, /*!< @brief If hardware learning enabled, the switch learns new MAC addresses */ 2221 ETHSWT_MACLEARNINGOPTION_SWSECUREENABLED = (uint8)0x3U, /*!< @brief If software learning secure enabled, A MAC learning lookup is performed into the FDB table. 2222 If there is no match, no attempt is made to add a new entry, and the frame is redirect to the switch management port. 2223 If there is match, and the entry's port number does not match frame ingress port number, the frame is redirected to the switch management port. */ 2224 ETHSWT_MACLEARNINGOPTION_SWUNSECUREENABLED = (uint8)0x4U, /*!< @brief If software learning unsecure enabled, A MAC learning lookup is performed into the FDB table. 2225 If there is no match, no attempt is made to add a new entry, and a copy of the frame is sent to the switch management port. 2226 If there is match, and the entry's port number does not match frame ingress port number, the frame is copied to the switch management port.*/ 2227 ETHSWT_MACLEARNINGOPTION_DISABLEDWITHSWVALIDATION = (uint8)0x5U /*!< @brief if Disable MAC learning with SMAC validation. A MAC learning lookup is performed into the FDB table. 2228 If there is no match or there is a match but the ingress port is not a member of the FDB entry, 2229 the frame is discarded and counted against the bridge port discard count register (BPDCR) with discard reason BPDCRR0[MACLNFDR]. */ 2230 } Netc_EthSwt_Ip_MacLearningOptionType; 2231 2232 typedef enum{ 2233 ETHSWT_NO_FDB_LOOKUP_FLOOD_FRAME = (uint8)0x1U, /**< @brief No FDB lookup is performed, the frame is flooded */ 2234 ETHSWT_FDB_LOOKUP_FLOOD_FRAME = (uint8)0x2U, /**< @brief FDB lookup is performed, and if there is no match, the frame is flooded. */ 2235 ETHSWT_FDB_LOOKUP_DISCARD_FRAME = (uint8)0x3U /**< @brief FDB lookup is performed, and if there is no match, the frame is discarded */ 2236 } Netc_EthSwt_Ip_MacForwardingOptionType; 2237 2238 typedef enum{ 2239 ETHSWT_EXTERNAL_REFERENCE_CLOCK = (uint8)0x0U, /**< @brief external reference clock is selected for 1588 timer */ 2240 ETHSWT_MODULE_REFERENCE_CLOCK = (uint8)0x1U, /**< @brief module reference clock (NETC system clock) is selected for 1588 timer */ 2241 ETHSWT_REFERENCE_CLOCK_DISABLED = (uint8)0x2U /**< @brief No reference clock selected for 1588 timer, means the timer is disabled */ 2242 } Netc_EthSwt_Ip_1588ClockSourceOptionType; 2243 2244 /*! 2245 * @brief Port selection enumeration Netc_EthSwt_Ip_PortSelectionType_Class 2246 */ 2247 typedef enum 2248 { 2249 NETC_ETHSWT_PORT2 = 2U, /**< Pseudo port 2 */ 2250 NETC_ETHSWT_PORT1 = 1U, /**< Switch port 1 */ 2251 NETC_ETHSWT_PORT0 = 0U /**< Switch port 0 */ 2252 } Netc_EthSwt_Ip_PortSelectionType; 2253 2254 /*! 2255 * @brief XMII mode of port Netc_EthSwt_Ip_XmiiModeType_Enumeration 2256 */ 2257 typedef enum 2258 { 2259 NETC_ETHSWT_MII_MODE = 0U, /**< MII interface mode */ 2260 NETC_ETHSWT_RMII_MODE = 1U, /**< RMII interface mode */ 2261 NETC_ETHSWT_RGMII_MODE = 2U, /**< RGMII interface mode */ 2262 NETC_ETHSWT_SGMII_MODE = 3U, /**< SGMII interface mode */ 2263 } Netc_EthSwt_Ip_XmiiModeType; 2264 2265 /*! 2266 * @brief Link duplex. 2267 * Netc_EthSwt_Ip_PortDuplexType_Class 2268 */ 2269 typedef enum 2270 { 2271 NETC_ETHSWT_PORT_FULL_DUPLEX = 1, /**< full duplex mode */ 2272 NETC_ETHSWT_PORT_HALF_DUPLEX = 0, /**< half duplex mode */ 2273 } Netc_EthSwt_Ip_PortDuplexType; 2274 2275 /*! 2276 * @brief Link speed. 2277 * Netc_EthSwt_Ip_PortSpeedType_Class 2278 */ 2279 typedef enum 2280 { 2281 NETC_ETHSWT_PORT_SPEED_100_MBPS = 1, /**< 100 Mbps */ 2282 NETC_ETHSWT_PORT_SPEED_10_MBPS = 0, /**< 10 Mbps */ 2283 } Netc_EthSwt_Ip_PortSpeedType; 2284 2285 /*! 2286 * @brief Direction selection enumeration Netc_EthSwt_Ip_DirectionType_Class 2287 */ 2288 typedef enum 2289 { 2290 NETC_ETHSWT_DIRECTION_INGRESS = 1U, /**< Ingress direction */ 2291 NETC_ETHSWT_DIRECTION_EGRESS = 0U /**< Egress direction */ 2292 } Netc_EthSwt_Ip_DirectionType; 2293 2294 /*! 2295 * @brief Mode of the port Netc_EthSwt_Ip_PortModeType_Class 2296 */ 2297 typedef enum 2298 { 2299 NETC_ETHSWT_PORT_MODE_INGRESS = 4U, /**< Port is enabled, ingress communication only */ 2300 NETC_ETHSWT_PORT_MODE_EGRESS = 3U, /**< Port is enabled, egress communication only */ 2301 NETC_ETHSWT_PORT_MODE_FULL = 1U, /**< Port is enabled, ingress and egress communication possible */ 2302 NETC_ETHSWT_PORT_MODE_OFF = 0U /**< Port is off, no communication possible */ 2303 } Netc_EthSwt_Ip_PortModeType; 2304 2305 /*! 2306 * @brief Interrupt flags shifts Netc_EthSwt_Ip_IrqType_Class 2307 */ 2308 typedef enum 2309 { 2310 NETC_ETHSWT_IRQ_CBTX = 14U, /**< 100BASETX */ 2311 NETC_ETHSWT_IRQ_SGMII4 = 13U, /**< SGMII 4 */ 2312 NETC_ETHSWT_IRQ_SGMII3 = 12U, /**< SGMII 3 */ 2313 NETC_ETHSWT_IRQ_SGMII2 = 11U, /**< SGMII 2 */ 2314 NETC_ETHSWT_IRQ_SGMII1 = 10U, /**< SGMII 1 */ 2315 NETC_ETHSWT_IRQ_CBT1_COMB = 9U, /**< 100BASE-T1 SubSystem Combined */ 2316 NETC_ETHSWT_IRQ_CBT1_PHY6 = 8U, /**< 100BASE-T1 SubSystem PHY # 6 */ 2317 NETC_ETHSWT_IRQ_CBT1_PHY5 = 7U, /**< 100BASE-T1 SubSystem PHY # 5 */ 2318 NETC_ETHSWT_IRQ_CBT1_PHY4 = 6U, /**< 100BASE-T1 SubSystem PHY # 4 */ 2319 NETC_ETHSWT_IRQ_CBT1_PHY3 = 5U, /**< 100BASE-T1 SubSystem PHY # 3 */ 2320 NETC_ETHSWT_IRQ_CBT1_PHY2 = 4U, /**< 100BASE-T1 SubSystem PHY # 2 */ 2321 NETC_ETHSWT_IRQ_CBT1_PHY1 = 3U, /**< 100BASE-T1 SubSystem PHY # 1 */ 2322 NETC_ETHSWT_IRQ_CBT1_PHYSS = 2U, /**< 100BASE-T1 SubSystem PHY Common module */ 2323 NETC_ETHSWT_IRQ_NETC_ETHSWTCORE1 = 1U, /**< Ethernet Netc_EthSwt SubSystem Automotive Netc_EthSwt Interrupt 1 */ 2324 NETC_ETHSWT_IRQ_NETC_ETHSWTCORE0 = 0U /**< Ethernet Netc_EthSwt SubSystem Automotive Netc_EthSwt Interrupt 0 */ 2325 } Netc_EthSwt_Ip_IrqType; 2326 2327 /* ---bits field and structure for Vlan Filter Table Data Buffer Format--- */ 2328 2329 /* index of Vlan Filter Table Request Data Buffer Format */ 2330 #define NETC_ETHSWT_IP_VLANFILTERTABLE_REQFMT_VID_FIELD (1U) /*!< second uint32 item of Vlan Filter Table Request Data Buffer Format when ACCESS_METHOD = 0x1 (Key Element Match) */ 2331 #define NETC_ETHSWT_IP_VLANFILTERTABLE_REQFMT_RESUMEENTRYID_FIELD (1U) /*!< second uint32 item of Vlan Filter Table Request Data Buffer Format when ACCESS_METHOD = 0x2 (Search) */ 2332 2333 typedef enum { 2334 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD = 0U, /*!< first uint32 item of Switch Tables Request Data Buffer Format */ 2335 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ENTRYID_FIELD, /*!< second uint32 item of Switch Tables Request Data Buffer Format when ACCESS_METHOD = 0x0 (ENTRY_ID Match) */ 2336 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA0, /*!< first item of CFGEDATA but third item of Switch Tables Request Data Buffer Format */ 2337 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA1, /*!< second item of CFGEDATA but forth item of Switch Tables Request Data Buffer Format */ 2338 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA2, /*!< third item of CFGEDATA but fifth item of Switch Tables Request Data Buffer Format */ 2339 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA3, /*!< forth item of CFGEDATA but sixth item of Switch Tables Request Data Buffer Format */ 2340 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA4, /*!< fifth item of CFGEDATA but seventh item of Switch Tables Request Data Buffer Format */ 2341 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA5, /*!< sixth item of CFGEDATA but eighth item of Switch Tables Request Data Buffer Format */ 2342 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA6, /*!< seventh item of CFGEDATA but ninth item of Switch Tables Request Data Buffer Format */ 2343 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA7, 2344 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA8, 2345 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA9 2346 } Netc_EthSwt_Ip_SwitchTableRequestDataIndexType; 2347 2348 /* bits field for Vlan Filter Table CFGE_DATA Format */ 2349 /*! 2350 * @brief Vlan Filter Table Config Data STG_ID field. 2351 */ 2352 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_STG_ID_SHIFT (24U) 2353 /*! 2354 * @brief Vlan Filter Table Config Data STG_ID field mask. 2355 */ 2356 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_STG_ID_MASK (0x0F000000UL) 2357 /*! 2358 * @brief Vlan Filter Table Config Data STG_ID. 2359 */ 2360 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_STG_ID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_STG_ID_SHIFT)) & NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_STG_ID_MASK) 2361 2362 /*! 2363 * @brief Vlan Filter Table Config Data PORT membership field. 2364 */ 2365 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_PORT_MEMBERSHIP_SHIFT (0U) 2366 /*! 2367 * @brief Vlan Filter Table Config Data PORT membership field mask. 2368 */ 2369 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_PORT_MEMBERSHIP_MASK (0x00FFFFFFUL) 2370 /*! 2371 * @brief Vlan Filter Table Config Data PORT membership. 2372 */ 2373 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_PORT_MEMBERSHIP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_PORT_MEMBERSHIP_SHIFT)) & NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_PORT_MEMBERSHIP_MASK) 2374 2375 /*! 2376 * @brief Vlan Filter Table Config Data IPMFLE field. 2377 */ 2378 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_IPMFLE_SHIFT (23U) 2379 /*! 2380 * @brief Vlan Filter Table Config Data IPMFLE field mask. 2381 */ 2382 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_IPMFLE_MASK (0x00800000UL) 2383 /*! 2384 * @brief Vlan Filter Table Config Data IPMFLE. 2385 */ 2386 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_IPMFLE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_IPMFLE_SHIFT)) & NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_IPMFLE_MASK) 2387 2388 /*! 2389 * @brief Vlan Filter Table Config Data IPMFE field. 2390 */ 2391 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_IPMFE_SHIFT (22U) 2392 /*! 2393 * @brief Vlan Filter Table Config Data IPMFE field mask. 2394 */ 2395 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_IPMFE_MASK (0x00400000UL) 2396 /*! 2397 * @brief Vlan Filter Table Config Data IPMFE. 2398 */ 2399 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_IPMFE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_IPMFE_SHIFT)) & NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_IPMFE_MASK) 2400 2401 /*! 2402 * @brief Vlan Filter Table Config Data MFO field. 2403 */ 2404 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_MFO_SHIFT (19U) 2405 /*! 2406 * @brief Vlan Filter Table Config Data MFO field mask. 2407 */ 2408 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_MFO_MASK (0x00180000UL) 2409 /*! 2410 * @brief Vlan Filter Table Config Data MFO. 2411 */ 2412 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_MFO(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_MFO_SHIFT)) & NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_MFO_MASK) 2413 2414 /*! 2415 * @brief Vlan Filter Table Config Data MLO field. 2416 */ 2417 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_MLO_SHIFT (16U) 2418 /*! 2419 * @brief Vlan Filter Table Config Data MLO field mask. 2420 */ 2421 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_MLO_MASK (0x00070000UL) 2422 /*! 2423 * @brief Vlan Filter Table Config Data MLO. 2424 */ 2425 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_MLO(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_MLO_SHIFT)) & NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_MLO_MASK) 2426 2427 /*! 2428 * @brief Vlan Filter Table Config Data FID field. 2429 */ 2430 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_FID_SHIFT (0U) 2431 /*! 2432 * @brief Vlan Filter Table Config Data FID field mask. 2433 */ 2434 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_FID_MASK (0x00000FFFUL) 2435 /*! 2436 * @brief Vlan Filter Table Config Data FID. 2437 */ 2438 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_FID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_FID_SHIFT)) & NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_FID_MASK) 2439 2440 /*! 2441 * @brief Vlan Filter Table Config Data ETA port bitmap field. 2442 */ 2443 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_ETA_PORT_BITMAP_SHIFT (0U) 2444 /*! 2445 * @brief Vlan Filter Table Config Data ETA port bitmap field mask. 2446 */ 2447 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_ETA_PORT_BITMAP_MASK (0x00FFFFFFUL) 2448 /*! 2449 * @brief Vlan Filter Table Config Data ETA port bitmap. 2450 */ 2451 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_ETA_PORT_BITMAP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_ETA_PORT_BITMAP_SHIFT)) & NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_ETA_PORT_BITMAP_MASK) 2452 2453 /*! 2454 * @brief Vlan Filter Table Config Data base ET_EID field. 2455 */ 2456 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_BASE_ET_EID_SHIFT (0U) 2457 /*! 2458 * @brief Vlan Filter Table Config Data base ET_EID field mask. 2459 */ 2460 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_BASE_ET_EID_MASK (0xFFFFFFFFUL) 2461 /*! 2462 * @brief Vlan Filter Table Config Data base ET_EID. 2463 */ 2464 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_BASE_ET_EID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_BASE_ET_EID_SHIFT)) & NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_BASE_ET_EID_MASK) 2465 2466 /*! 2467 * @brief Vlan Filter Table Config Data KEY_DATA bits field. 2468 */ 2469 #define NETC_ETHSWT_VLANFILTERTABLE_KEYEDATA_VID_SHIFT (0U) 2470 /*! 2471 * @brief Vlan Filter Table Config Data KEY_DATA bits field mask. 2472 */ 2473 #define NETC_ETHSWT_VLANFILTERTABLE_KEYEDATA_VID_MASK (0x00000FFFUL) 2474 /*! 2475 * @brief Vlan Filter Table Config Data KEY_DATA bits. 2476 */ 2477 #define NETC_ETHSWT_VLANFILTERTABLE_KEYEDATA_VID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_VLANFILTERTABLE_KEYEDATA_VID_SHIFT)) & NETC_ETHSWT_VLANFILTERTABLE_KEYEDATA_VID_MASK) 2478 2479 /*! 2480 * @brief Vlan Filter Table response data type enumeration. Netc_EthSwt_Ip_VlanFilterTable_ResponsDataIndexType 2481 */ 2482 typedef enum { 2483 NETC_ETHSWT_VLANFILTERTABLE_RSPDATA_STATUS = 0x0U, /*!< Status Field In Vlan Filter Table Response Data Buffer */ 2484 NETC_ETHSWT_VLANFILTERTABL_RSPDATA_ENTRYID, /*!< Entry_ID Field In Vlan Filter Table Response Data Buffer */ 2485 NETC_ETHSWT_VLANFILTERTABL_RSPDATA_VID, /*!< VID field of KEYE DATA In Vlan Filter Table Response Data Buffer */ 2486 NETC_ETHSWT_VLANFILTERTABL_RSPDATA_CFGEDATA0, /*!< The first element of CFGE DATA In Vlan Filter Table Response Data Buffer */ 2487 NETC_ETHSWT_VLANFILTERTABL_RSPDATA_CFGEDATA1, /*!< The second element of CFGE DATA In Vlan Filter Table Response Data Buffer */ 2488 NETC_ETHSWT_VLANFILTERTABL_RSPDATA_CFGEDATA2, /*!< The third element of CFGE DATA In Vlan Filter Table Response Data Buffer */ 2489 NETC_ETHSWT_VLANFILTERTABL_RSPDATA_CFGEDATA3 /*!< The last element of CFGE DATA In Vlan Filter Table Response Data Buffer */ 2490 } Netc_EthSwt_Ip_VlanFilterTable_ResponsDataIndexType; 2491 2492 /*! 2493 * @brief Vlan Filter Table CFGE_DATA format. 2494 */ 2495 typedef struct { 2496 uint32 Cfge_Data[NETC_ETHSWT_TABLE_CFGEDATA_ITEMS]; /*!< Config data for Vlan Filtre Table */ 2497 } Netc_EthSwt_Ip_VlanFilterTableCFGEDataType; 2498 /* ---bits field and structure for Vlan Filter Table Data Buffer Format--- */ 2499 2500 /*! 2501 * @brief VLAN Tag Netc_EthSwt_Ip_VlanTagType_Class 2502 */ 2503 typedef struct 2504 { 2505 uint16 id; /*!< Specifies the VLAN address 0..65535 */ 2506 uint8 pcp; /*!< Priority to be added in the tag 0..7 */ 2507 uint8 dei; /*!< 1 bit field - drop eligible indicator */ 2508 } Netc_EthSwt_Ip_VlanTagType; 2509 2510 /*! 2511 * @brief PHY configuration of a port Netc_EthSwt_Ip_FdbEntryType_Class 2512 */ 2513 typedef struct 2514 { 2515 uint16 ePortMask; /*!< Mask of the egress ports */ 2516 uint8 macAddr[6U]; /*!< Array containing the MAC addresses of the port */ 2517 } Netc_EthSwt_Ip_FdbEntryType; 2518 2519 /*! 2520 * @brief PHY configuration of a port Netc_EthSwt_Ip_VlanFilterEntryType 2521 */ 2522 typedef struct 2523 { 2524 uint16 iPortMask; /*!< Mask of the ingress ports */ 2525 uint16 vlanId; /*!< VLAN ID, VlanMembershipId */ 2526 } Netc_EthSwt_Ip_VlanFilterEntryType; 2527 2528 /*! 2529 * @brief Netc_EthSwt counter structure Netc_EthSwt_Ip_CounterType 2530 */ 2531 typedef struct { 2532 uint64 rxEtherOctetCounter; /*!< Port MAC 0 Receive Ethernet Octets Counter(etherStatsOctetsn) (PM0_REOCTn) */ 2533 uint64 rxOctetCounter; /*!< Supported by pseudo port. Port MAC 0 Receive Octets Counter(iflnOctetsn) (PM0_ROCTn) */ 2534 uint64 rxValidPauseFrmCounter; /*!< Port MAC 0 Receive Valid Pause Frame Counter Register(aPAUSEMACCtrlFramesReceivedn) (PM0_RXPFn) */ 2535 uint64 rxFrmCounter; /*!< MAC 0 Receive Frame Counter Register(aFramesReceivedOKn) (PM0_RFRMn) */ 2536 uint64 rxFrameCheckSequenceErrorCounter; /*!< Port MAC 0 Receive Frame Check Sequence Error Counter Register() (PM0_RFCSn) */ 2537 uint64 rxVlanFrmCounter; /*!< Port MAC 0 Receive VLAN Frame Counter Register(VLANReceivedOKn) (PM0_RVLANn) */ 2538 uint64 rxFrameErrorCounter; /*!< Port MAC 0 Receive Frame Error Counter Register(ifInErrorsn) (PM0_RERRn) */ 2539 uint64 rxUnicastFrmCounter; /*!< Supported by pseudo port. Port MAC 0 Receive Unicast Frame Counter Register(ifInUcastPktsn) (PM0_RUCAn) */ 2540 uint64 rxMulticastFrmCounter; /*!< Supported by pseudo port. Port MAC 0 Receive Multicast Frame Counter Register(ifInMulticastPktsn) (PM0_RMCAn) */ 2541 uint64 rxBroadcastFrmCounter; /*!< Supported by pseudo port. Port MAC 0 Receive Broadcast Frame Counter Register(ifInBroadcastPktsn) (PM0_RBCAn) */ 2542 uint64 rxDroppedPktCounter; /*!< Port MAC 0 Receive Dropped Packets Counter Register(etherStatsDropEventsn) (PM0_RDRPn) */ 2543 uint64 rxPktCounter; /*!< Port MAC 0 Receive Packets Counter Register(etherStatsPktsn) (PM0_RPKTn) */ 2544 uint64 rxUndersizePacketCounter; /*!< Port MAC 0 Receive Undersized Packet Counter Register(etherStatsUndersizePktsn) (PM0_RUNDn) */ 2545 uint64 rx64OctetPktCounter; /*!< Port MAC 0 Receive 64-Octet Packet Counter Register(etherStatsPkts64OctetsN) (PM0_R64n) */ 2546 uint64 rx65to127OctetPktCounter; /*!< Port MAC 0 Receive 65 to 127-Octet Packet Counter Register(etherStatsPkts65to127OctetsN) (PM0_R127n) */ 2547 uint64 rx128to255OctetPktCounter; /*!< Port MAC 0 Receive 128 to 255-Octet Packet Counter Register(etherStatsPkts128to255OctetsN) (PM0_R255n) */ 2548 uint64 rx256to511OctetPktCounter; /*!< Port MAC 0 Receive 256 to 511-Octet Packet Counter Register(etherStatsPkts256to511OctetsN) (PM0_R511n) */ 2549 uint64 rx512to1023OctetPktCounter; /*!< Port MAC 0 Receive 512 to 1023-Octet Packet Counter Register(etherStatsPkts512to1023OctetsN) (PM0_R1023n) */ 2550 uint64 rx1024to1522OctetPktCounter; /*!< Port MAC 0 Receive 1024 to 1522-Octet Packet Counter Register(etherStatsPkts1024to1522OctetsN) (PM0_R1522n) */ 2551 uint64 rx1523toMaxOctetPktCounter; /*!< Port MAC 0 Receive 1523 to Max-Octet Packet Counter Register(etherStatsPkts1523toMaxOctetsN) (PM0_R1523Xn) */ 2552 uint64 rxOversizedPacketsCounter; /*!< Port MAC 0 Receive Oversized Packet Counter Register(etherStatsOversizePktsn) (PM0_ROVRn) */ 2553 uint64 rxJabberPktCounter; /*!< Port MAC 0 Receive Jabber Packet Counter Register(etherStatsJabbersn) (PM0_RJBRn) */ 2554 uint64 rxFragmentPktCounter; /*!< Port MAC 0 Receive Fragment Packet Counter Register(etherStatsFragmentsn (PM0_RFRGn) */ 2555 uint64 rxControlPktCounter; /*!< Port MAC 0 Receive Control Packet Counter Register (PM0_RCNPn) */ 2556 uint64 rxDroppedNTruncatedPktCounter; /*!< Port MAC 0 Receive Dropped Not Truncated Packets Counter Register(etherStatsDropEventsn) (PM0_RDRNTPn) */ 2557 2558 uint64 txEtherOctetCounter; /*!< MAC 0 Transmit Ethernet Octets Counter(etherStatsOctetsn) (PM0_TEOCTn) */ 2559 uint64 txOctetCounter; /*!< Supported by pseudo port. Port MAC 0 Transmit Octets Counter Register(ifOutOctetsn) (PM0_TOCTn) */ 2560 uint64 txValidPauseFrmCounter; /*!< Port MAC 0 Transmit Valid Pause Frame Counter Register(aPAUSEMACCtrlFramesReceivedn) (PM0_TXPFn) */ 2561 uint64 txFrmCounter; /*!< Port MAC 0 Transmit Frame Counter Register(aFramesTransmittedOKn) (PM0_TFRMn) */ 2562 uint64 txFrameCheckSequenceErrorCounter; /*!< Port MAC 0 Transmit Frame Check Sequence Error Counter Register() (PM0_TFCSn) */ 2563 uint64 txVlanFrmCounter; /*!< Port MAC 0 Transmit VLAN Frame Counter Register(VLANTransmittedOKn) (PM0_TVLANn) */ 2564 uint64 txFrameErrorCounter; /*!< Port MAC 0 Transmit Frame Error Counter Register(ifOutErrorsn) (PM0_TERRn) */ 2565 uint64 txUnicastFrmCounter; /*!< Supported by pseudo port. Port MAC 0 Transmit Unicast Frame Counter Register(ifOutUcastPktsn) (PM0_TUCAn) */ 2566 uint64 txMulticastFrmCounter; /*!< Supported by pseudo port. Port MAC 0 Transmit Multicast Frame Counter Register(ifOutMulticastPktsn) (PM0_TMCAn) */ 2567 uint64 txBroadcastFrmCounter; /*!< Supported by pseudo port. Port MAC 0 Transmit Broadcast Frame Counter Register(ifOutBroadcastPktsn) (PM0_TBCAn) */ 2568 uint64 txPktCounter; /*!< Port MAC 0 Transmit Packets Counter Register(etherStatsPktsn) (PM0_TPKTn) */ 2569 uint64 txUndersizePacketCounter; /*!< Port MAC 0 Transmit Undersized Packet Counter Register(etherStatsUndersizePktsn) (PM0_TUNDn) */ 2570 uint64 tx64OctetPktCounter; /*!< Port MAC 0 Transmit 64-Octet Packet Counter Register (etherStatsPkts64OctetsN) (PM0_T64n) */ 2571 uint64 tx65to127OctetPktCounter; /*!< Port MAC 0 Transmit 65 to 127-Octet Packet Counter Register (etherStatsPkts65to127OctetsN) (PM0_T127n) */ 2572 uint64 tx128to255OctetPktCounter; /*!< Port MAC 0 Transmit 128 to 255-Octet Packet Counter Register (etherStatsPkts128to255OctetsN) (PM0_T255n) */ 2573 uint64 tx256to511OctetPktCounter; /*!< Port MAC 0 Transmit 256 to 511-Octet Packet Counter Register (etherStatsPkts256to511OctetsN) (PM0_T511n) */ 2574 uint64 tx512to1023OctetPktCounter; /*!< Port MAC 0 Transmit 512 to 1023-Octet Packet Counter Register (etherStatsPkts512to1023OctetsN) (PM0_T1023n) */ 2575 uint64 tx1024to1522OctetPktCounter; /*!< Port MAC 0 Transmit 1024 to 1522-Octet Packet Counter Register (etherStatsPkts1024to1522OctetsN) (PM0_T1522n) */ 2576 uint64 tx1523toMaxOctetPktCounter; /*!< Port MAC 0 Transmit 1523 to TX_MTU-Octet Packet Counter Register (etherStatsPkts1523toMaxOctetsN) (PM0_T1523Xn) */ 2577 uint64 txControlPktCounter; /*!< Port MAC 0 Transmit Control Packet Counter Register (PM0_TCNPn) */ 2578 uint64 txDeferredPktCounter; /*!< Port MAC 0 Transmit Deferred Packet Counter Register(aFramesWithDeferredXmissions) (PM0_TDFRn) */ 2579 uint64 txMultiCollisionCounter; /*!< Port MAC 0 Transmit Multiple Collisions Counter Register(aMultipleCollisionFrames) (PM0_TMCOLn) */ 2580 uint64 txSingleCollisionCounter; /*!< Port MAC 0 Transmit Single Collision Counter(aSingleCollisionFrames) Register (PM0_TSCOLn) */ 2581 uint64 txLateCollisionCounter; /*!< Port MAC 0 Transmit Late Collision Counter(aLateCollisions) Register (PM0_TLCOLn) */ 2582 uint64 txExcessiveCollisionCounter; /*!< Port MAC 0 Transmit Excessive Collisions Counter Register (PM0_TECOLn) */ 2583 2584 uint32 rxDiscardCounter; /*!< Port Rx discard count register (PRXDCR) */ 2585 uint32 txDiscardCounter; /*!< Port Tx discard count register (PTXDCR) */ 2586 uint32 unIntegrityErrorCounter; /* Uncorrectable non-fatal integrity error count register (UNIECTR) which tracks how many events have been detected. */ 2587 } Netc_EthSwt_Ip_CounterType; 2588 2589 typedef uint64 Netc_EthSwt_Ip_CounterValueType; 2590 2591 /*! 2592 * @brief Action to be taken when the rate policy criteria defined for this EthSwtPortPolicer are met. 2593 */ 2594 typedef enum { 2595 NETC_ETHSWT_BLOCK_SOURCE, /*!< Eth Switch rate violation block source. */ 2596 NETC_ETHSWT_DROP_FRAME /*!< Eth Switch rate violation drop frame. */ 2597 } Netc_EthSwt_Ip_RateViolationActionType; 2598 2599 /*! 2600 * @brief How the message with a specific VLAN Id shall be handled. 2601 */ 2602 typedef enum { 2603 NETC_ETHSWT_NOT_SENT, /*!< Eth Switch vlan frame not sent. */ 2604 NETC_ETHSWT_SENT_TAGGED, /*!< Eth Switch vlan frame sent tagged. */ 2605 NETC_ETHSWT_SENT_UNTAGGED /*!< Eth Switch vlan frame sent untagged. */ 2606 } Netc_EthSwt_Ip_VlanHandlingType; 2607 2608 /*! 2609 * @brief Message priority the incoming message will be tagged with. 2610 */ 2611 typedef struct { 2612 uint8 EthSwtPriorityRegenerationIngressPriority; /*!< Message priority of the incoming message. */ 2613 uint8 EthSwtPriorityRegenerationRegeneratedPriority; /*!< Message priority the incoming message will be tagged with. */ 2614 } Netc_EthSwt_Ip_PriorityRegenerationType; 2615 2616 /*! 2617 * @brief Priority based traffic class assignment. 2618 */ 2619 typedef struct { 2620 uint8 EthSwtPriorityTrafficClassAssignmentTrafficClass[8U]; /*!< Traffic Class value. */ 2621 } Netc_EthSwt_Ip_PriorityTrafficClassAssignmentType; 2622 2623 /*! 2624 * @brief Rate Policing parameters. 2625 */ 2626 typedef struct { 2627 Netc_EthSwt_Ip_PriorityRegenerationType priorityRegeneration[8U]; /*!< Message priority the incoming message will be tagged with. */ 2628 uint8 EthSwtPortRatePolicedPriority; /*!< The priority which this rate policy shall be limited on. */ 2629 Netc_EthSwt_Ip_RateViolationActionType EthSwtPortRateViolationAction; /*!< Action to be taken when the rate policy criteria defined for this EthSwtPortPolicer are met. */ 2630 uint32 EthSwtPriorityTrafficClassAssignmentType[8U]; /*!< Message priority. */ 2631 } Netc_EthSwt_Ip_PortPolicerType; 2632 2633 /*! 2634 * @brief Port ingress description 2635 */ 2636 typedef struct { 2637 uint8 EthSwtPortIngressDefaultPriority; /*!< Default priority for ingress. */ 2638 uint16 EthSwtPortIngressDefaultVlan; /*!< Default VLAN for ingress. */ 2639 boolean SentUntaggedFrames; /* EthSwtPortVlanForwardingType for the default VLAN */ 2640 boolean portIngressAllowCutThroughFrames; /*!< Allow cut through frames */ 2641 boolean EthSwtPortIngressDropUntagged; /*!< Defines the ingress behavior for untagged frames. */ 2642 boolean EthSwtDropDoubleTagged; /*!< if a switch shall drop double tagged frames. */ 2643 boolean EthSwtPortIngressDropSingleTagged; /*!< if a switch shall drop single tagged frames. */ 2644 boolean EthSwtPortIngressDropPriorityTagged; /*!< if a switch shall drop priority tagged frames. */ 2645 uint16 EthSwtPortIngressVlanModification; /*!< Tagged all frames with this VLAN Id. */ 2646 uint8 EthSwtPortTrafficClassAssignment; /*!< Priority based traffic class assignment. */ 2647 Netc_EthSwt_Ip_PortPolicerType *policer; /*!< Rate Policing parameters. */ 2648 Netc_EthSwt_Ip_PriorityRegenerationType (*priorityRegeneration)[8U]; /*!< Priority of the incoming message. */ 2649 Netc_EthSwt_Ip_PriorityTrafficClassAssignmentType PriorityTrafficClassAssignment[8U]; /*!< Priority based traffic class assignment. */ 2650 boolean vlanEnable; /*!< Use the IVP and DR from the frame or use port default */ 2651 uint8 vlanDefaultIpv; /*!< Default for untaged frames or when vlan is disable */ 2652 uint8 vlanDefaultDr; /*!< Default for untaged frames or when vlan is disable */ 2653 uint8 vlanMappingProfile; /*!< Select the VLANIPV profile 0/1 using the PCP and DEI */ 2654 boolean vlanEnableIngressPcpToPcpMapping; /*!< If there is frame modification enable the PCP change */ 2655 uint8 vlanIngressPcpToPcpProfile; /*!< If there is frame modification and enable use this profile */ 2656 } Netc_EthSwt_Ip_PortIngressType; 2657 2658 2659 /*! 2660 * @brief Port Egress Class Scheduler table CFGE_DATA config field. 2661 */ 2662 /* CQ_ASSG field */ 2663 #define NETC_ETHSWT_IP_SCHTABLE_CFGE_DATA_CQ_ASSG_SHIFT (0U) 2664 #define NETC_ETHSWT_IP_SCHTABLE_CFGE_DATA_CQ_ASSG_MASK (0x0000000FUL) 2665 #define NETC_ETHSWT_IP_SCHTABLE_CFGE_DATA_CQ_ASSG(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SCHTABLE_CFGE_DATA_CQ_ASSG_SHIFT)) & NETC_ETHSWT_IP_SCHTABLE_CFGE_DATA_CQ_ASSG_MASK) 2666 2667 /* OAL field */ 2668 #define NETC_ETHSWT_IP_SCHTABLE_CFGE_DATA_OAL_SHIFT (16U) 2669 #define NETC_ETHSWT_IP_SCHTABLE_CFGE_DATA_OAL_MASK (0x7FF0000UL) 2670 #define NETC_ETHSWT_IP_SCHTABLE_CFGE_DATA_OAL(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SCHTABLE_CFGE_DATA_OAL_SHIFT)) & NETC_ETHSWT_IP_SCHTABLE_CFGE_DATA_OAL_MASK) 2671 2672 /* WBFS_WEIGHT_0 field */ 2673 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_0_SHIFT (0U) 2674 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_0_MASK (0x000000FFUL) 2675 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_0(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_0_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_0_MASK) 2676 2677 /* WBFS_WEIGHT_1 field */ 2678 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_1_SHIFT (8U) 2679 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_1_MASK (0x0000FF00UL) 2680 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_1(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_1_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_1_MASK) 2681 2682 /* WBFS_WEIGHT_2 field */ 2683 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_2_SHIFT (16U) 2684 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_2_MASK (0x00FF0000UL) 2685 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_2(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_2_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_2_MASK) 2686 2687 /* WBFS_WEIGHT_3 field */ 2688 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_3_SHIFT (24U) 2689 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_3_MASK (0xFF000000UL) 2690 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_3(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_3_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_3_MASK) 2691 2692 /* WBFS_WEIGHT_4 field */ 2693 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_4_SHIFT (0U) 2694 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_4_MASK (0x000000FFUL) 2695 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_4(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_4_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_4_MASK) 2696 2697 /* WBFS_WEIGHT_5 field */ 2698 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_5_SHIFT (8U) 2699 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_5_MASK (0x0000FF00UL) 2700 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_5(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_5_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_5_MASK) 2701 2702 /* WBFS_WEIGHT_6 field */ 2703 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_6_SHIFT (16U) 2704 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_6_MASK (0x00FF0000UL) 2705 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_6(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_6_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_6_MASK) 2706 2707 /* WBFS_WEIGHT_7 field */ 2708 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_7_SHIFT (24U) 2709 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_7_MASK (0xFF000000UL) 2710 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_7(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_7_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_7_MASK) 2711 2712 /*! 2713 * @brief Defines the port egress class scheduler. 2714 * @implements Netc_EthSwt_Ip_PortSchedulerType_struct 2715 */ 2716 typedef struct { 2717 uint8 numberOfWBFSQueues; /* Number of queues using the weighted fair share algorithm */ 2718 uint16 overheadAccountingLength; /* Added to the actual length of each frame when performing class scheduler WBFS calculations */ 2719 uint8 portEgressSchedulerWeightList[NETC_ETHSWT_WBFS_QUEUES_NB]; /* Array holding the queue weights for WBFS (weighted fair share) scheduler inputs */ 2720 } Netc_EthSwt_Ip_PortSchedulerType; 2721 2722 /*! 2723 * @brief Represents a Shaper in the egress port. 2724 */ 2725 typedef struct { 2726 /* To improve the speed of the init of the drivers, Bandwidth and hiCredit are calculated in the upper layes */ 2727 boolean EthSwtPortEgressCBShaperEnable; /*!< Enable the Credit-Based Shaper. */ 2728 uint32 EthSwtPortEgressCBShaperBandwidth; /*!< Bandwidth of the Credit-Based Shaper. Bandwidth = (idleSlope/portTxRate) * 100, Note: total CBS bandwidth on a port should be less the 75% */ 2729 uint32 EthSwtPortEgressHiCredit; /*!< HiCredit if the Credit-Based Shaper. (hiCredit on credit) = maxSizedFrame * Bandwidth * (enetClockFrequency / portTxRate) */ 2730 uint32 EthSwtPortMaxSizedFrame; /*!< Max Frame Size, should be less the 2000 bytes */ 2731 } Netc_EthSwt_Ip_PortShaperType; 2732 2733 /*! 2734 * @brief Port egress description 2735 */ 2736 typedef struct { 2737 Netc_EthSwt_Ip_PortSchedulerType *portScheduler; /*!< Defines the scheduler algorithm. */ 2738 Netc_EthSwt_Ip_PortShaperType (*portShaper)[8U]; /*!< Represents a Shaper in the egress port. */ 2739 boolean portEgressAllowCutThroughFrames; /*!< Allow cut through frames */ 2740 boolean updateEgressDr; /*!< If there is frame modification and enable DEI change */ 2741 uint8 (*vlanDrToDei)[NETC_ETHSWT_NUMBER_OF_DR]; /*!< If there is frame modification and enable map DR to DEI */ 2742 uint8 vlanMappingProfile; /*!< Select the VLANIPV profile 0/1 using the PCP and DEI */ 2743 boolean vlanEnableEgressPcpToPcpMapping; /*!< If there is frame modification enable the PCP change */ 2744 uint8 vlanEgressPcpToPcpProfile; /*!< If there is frame modification and enable use this profile */ 2745 uint8 portPPDUByteCountOverhead; /* PPDU Byte count overhead which includes IPG, SFD and Preamble. */ 2746 uint8 portMACSecByteCountOverhead; /* Number of bytes of overhead due to MACSec encapsulation */ 2747 uint32 portTimeGateSchedulingAdvanceTimeOffsetReg; /* This is the port time gate scheduling advance time offset register */ 2748 boolean portTimeAwareShaperEnable; /*!< If the data for time gate scheduling talbe is configured */ 2749 uint64 portEgressAdminBaseTime; /*!< Administrative Base Time */ 2750 uint32 portEgressAdminCycleTime; /*!< Administrative Cycle Time */ 2751 uint32 portEgressAdminCycleTimeExt; /*!< Administrative Cycle Time Extension */ 2752 uint8 numberOfGateControlListEntries; /*!< Number of entries in Administrative Gate Control list. */ 2753 Netc_EthSwt_Ip_GateEntryAdminControlListDataType (*TimeGateControlListEntries)[NETC_ETHSWT_MAX_NUMBER_OF_GATECONTROLLIST_ENTRIES]; /*!< Pointer to an array containing the gate control list for port. */ 2754 } Netc_EthSwt_Ip_PortEgressType; 2755 2756 /*! 2757 * @brief Port description for initalisation 2758 */ 2759 typedef struct { 2760 boolean EthSwtPortMacLayerPortEnable; /*!< enable/disable port mac layer */ 2761 Netc_EthSwt_Ip_PortEgressType *ePort; /*!< Configuration of one Ethernet Switch Port Egress behavior. */ 2762 Netc_EthSwt_Ip_PortIngressType *iPort; /*!< Configuration of one Ethernet Switch Port Ingress behavior. */ 2763 EthTrcv_BaudRateType EthSwtPortMacLayerSpeed; /**< Defines the baud rate of the MAC layer. */ 2764 Netc_EthSwt_Ip_PortDuplexType EthSwtPortMacLayerDuplexMode; /*!< Defines the duplex mode of switch mac layer duplex mode*/ 2765 Netc_EthSwt_Ip_XmiiModeType EthSwtPortPhysicalLayerType; /*!< Defines the physical layer type of this EthSwtPort. */ 2766 uint8 EthSwtPortMacAddresses[6U]; /*!< Default MAC address. */ 2767 uint16 EthSwtPortMaxDynamicEntries; /*!< Specifies for a given port, the maximium number of dynamic entries in the FDB table.*/ 2768 boolean EthSwtPortEnableMagicPacketDetection; /*!< Enable/Disable packet magic detection*/ 2769 boolean EthSwtPortTimeStampSupport; /*!< Activates egress time stamping. */ 2770 boolean EthSwtPortPruningEnable; /*!< A received frame is not allowed to be transmitted on same port it was recceived. */ 2771 boolean EthSwtPortLoopbackEnable; /*!< Enable loopback mode for current port */ 2772 boolean EthSwtPortDisallowMacStationMove; /*!< MAC station move disallowed.*/ 2773 } Netc_EthSwt_Ip_PortType; 2774 2775 /*! 2776 * @brief Key Construction Rule 2777 * @implements : Netc_EthSwt_Ip_KeyConstructionRuleType_struct 2778 */ 2779 typedef struct 2780 { 2781 uint32 EthSwtKeyConstructionRegValue; /**< Value to be added in the Key Construction Register*/ 2782 uint32 EthSwtPayloadField0RegValue; /**< Value to be added in the Payload Field 0 Register*/ 2783 uint32 EthSwtPayloadField1RegValue; /**< Value to be added in the Payload Field 0 Register*/ 2784 } Netc_EthSwt_Ip_KeyConstructionRuleType; 2785 2786 /*! 2787 * @brief Configuration of one Ethernet Switch for initalisation 2788 */ 2789 typedef struct { 2790 Netc_EthSwt_Ip_MacLearningOptionType MacLearningOption; /*!< specifies the Mac learning mode */ 2791 Netc_EthSwt_Ip_MacForwardingOptionType MacForwardingOption; /*!< specifies the Mac forwarding option */ 2792 uint16 EthSwtMaxDynamicEntries; /*!< This field specifies the maximum number of dynamic entries allowed in the FDB table for the entire switch. A value of 0 implies no global switch limit imposed for dynamic entries.*/ 2793 uint16 EthSwtArlTableEntryTimeout; /*!< specifies the timeout in seconds for removing unused entries. */ 2794 boolean EthSwtEnableSharedLearning; /*!< Used to determine the FID when doing a lookup in the FDB table. 0: Independent VLAN learning: FID is set to to the VID assigned to the frame 1: Shared VLAN learning: Use the FID specified in this register */ 2795 uint16 EthSwtCustomVlanEtherType1; /*!< Custom VLAN */ 2796 uint16 EthSwtCustomVlanEtherType2; /*!< Custom VLAN */ 2797 Netc_EthSwt_Ip_PortType (*port)[NETC_ETHSWT_NUMBER_OF_PORTS]; /*!< Port description. */ 2798 Netc_EthSwt_Ip_KeyConstructionRuleType (*EthSwtKeyConstruction)[4U]; /*!< Represents a Key Construction Rule. */ 2799 #if (NETC_ETHSWT_NUMBER_OF_STREAMIDENTIFICATION_ENTRIES > 0U) 2800 uint8 NumberOfIsiEntries; /*!< Number of Ingress Stream Identification entries. */ 2801 const Netc_EthSwt_Ip_IngrStremIdentificationTableDataType (*IsiEntries)[NETC_ETHSWT_NUMBER_OF_STREAMIDENTIFICATION_ENTRIES]; /*!< Pointer to an array containing the StreamIdentification configuration. */ 2802 #endif 2803 2804 #if (NETC_ETHSWT_NUMBER_OF_SEQTAG_ENTRIES > 0U) 2805 uint8 NumberOfSeqTagEntries; /*!< Number of Sequence tag entries. */ 2806 const Netc_EthSwt_Ip_ISQGTableDataType (*SeqTagEntries)[NETC_ETHSWT_NUMBER_OF_SEQTAG_ENTRIES]; /*!< Pointer to an array containing the SequenceTag configuration. */ 2807 #endif 2808 2809 #if (NETC_ETHSWT_NUMBER_OF_SEQRECOVERY_ENTRIES > 0U) 2810 uint8 NumberOfSeqRecoveryEntries; /*!< Number of Sequence tag entries. */ 2811 const Netc_EthSwt_Ip_EgrSeqRecoveryTableDataType (*SeqRecoveryEntries)[NETC_ETHSWT_NUMBER_OF_SEQRECOVERY_ENTRIES]; /*!< Pointer to an array containing the SequenceRecovery configuration. */ 2812 #endif 2813 2814 #if (NETC_ETHSWT_NUMBER_OF_RP_ENTRIES > 0U) 2815 uint8 NumberOfRPEntries; /*!< Number of Rate Policer/Flow Meter entries */ 2816 const Netc_EthSwt_Ip_RatePolicerEntryDataType (*EthSwtRatePolicerEntries)[NETC_ETHSWT_NUMBER_OF_RP_ENTRIES]; /*!< Pointer to an array containing entries for the rate policer table. */ 2817 #endif 2818 #if (NETC_ETHSWT_NUMBER_OF_SGCL_ENTRIES > 0U) 2819 uint8 NumberOfSGCLEntries; /*!< Number of Stream Gate Instance entries */ 2820 const Netc_EthSwt_Ip_SGCLTableDataType (*StreamGateControlListEntries)[NETC_ETHSWT_NUMBER_OF_SGCL_ENTRIES]; /*!< Pointer to an array containing configurations for Stream Gate Control Lists. */ 2821 #endif 2822 #if (NETC_ETHSWT_NUMBER_OF_SGI_ENTRIES > 0U) 2823 uint8 NumberOfSGIEntries; /*!< Number of Stream Gate Instance entries */ 2824 const Netc_EthSwt_Ip_StreamGateInstanceEntryDataType (*StreamGateInstanceEntries)[NETC_ETHSWT_NUMBER_OF_SGI_ENTRIES]; /*!< Pointer to an array containing configurations for Stream Gate Instances. */ 2825 #endif 2826 #if (NETC_ETHSWT_NUMBER_OF_FRAMEMODIFICATION_ENTRIES > 0U) 2827 uint8 NumberOfFrmModifEntries; /*!< Number of Frame Modification entries */ 2828 const Netc_EthSwt_Ip_FrmModificationEntryDataType (*FrameModificationEntries)[NETC_ETHSWT_NUMBER_OF_FRAMEMODIFICATION_ENTRIES]; /*!< Pointer to an array containing configurations for Frame Modification. */ 2829 #endif 2830 #if (NETC_ETHSWT_NUMBER_OF_EGRESSTREATMENT_ENTRIES > 0U) 2831 uint8 NumberOfEgrTreatmentEntries; /*!< Number of Egress Treatment entries */ 2832 const Netc_EthSwt_Ip_EgressTreatmentEntryDataType (*EgressTreatmentEntries)[NETC_ETHSWT_NUMBER_OF_EGRESSTREATMENT_ENTRIES]; /*!< Pointer to an array containing configurations for Egress Treatment. */ 2833 #endif 2834 #if (NETC_ETHSWT_NUMBER_OF_INGRESSSTREAM_ENTRIES > 0U) 2835 uint8 NumberOfIngrStreamEntries; /*!< Number of Ingress Stream entries */ 2836 const Netc_EthSwt_Ip_IngressStreamEntryDataType (*IngressStreamEntries)[NETC_ETHSWT_NUMBER_OF_INGRESSSTREAM_ENTRIES]; /*!< Pointer to an array containing configurations for Ingress Stream. */ 2837 #endif 2838 #if (NETC_ETHSWT_NUMBER_OF_FDB_ENTRIES > 0U) 2839 uint8 NumberOfFdbEntries; /*!< Number of FDB entries. */ 2840 const Netc_EthSwt_Ip_FdbEntryType (*FdbEntries)[NETC_ETHSWT_NUMBER_OF_FDB_ENTRIES]; /*!< Pointer to an array containing the FDB configuration. */ 2841 #endif 2842 #if (NETC_ETHSWT_NUMBER_OF_VLANFILTER_ENTRIES > 0U) 2843 uint8 NumberOfVlanFilterEntries; /*!< Number of Vlan Filter entries. */ 2844 const Netc_EthSwt_Ip_VlanFilterEntryType (*VlanFilterEntries)[NETC_ETHSWT_NUMBER_OF_VLANFILTER_ENTRIES]; /*!< Pointer to an array containing the Vlan configuration. */ 2845 #endif 2846 uint8 (*vlanPcpDei2IpvProfile)[NETC_ETHSWT_NUMBER_OF_PROFILES][NETC_ETHSWT_NUMBER_OF_PCP_DEI]; /*!< Profiles for PCP_DEI to IPV ingress mapping. */ 2847 uint8 (*vlanPcpDei2DrProfile)[NETC_ETHSWT_NUMBER_OF_PROFILES][NETC_ETHSWT_NUMBER_OF_PCP_DEI]; /*!< Profiles for PCP_DEI to DR ingress mapping. */ 2848 uint8 (*vlanPcp2PcpProfile)[NETC_ETHSWT_NUMBER_OF_PROFILES][NETC_ETHSWT_NUMBER_OF_PCP]; /*!< Profiles for PCP to PCP frame modification. */ 2849 uint8 (*vlanIpvDr2PcpProfile)[NETC_ETHSWT_NUMBER_OF_PROFILES][NETC_ETHSWT_NUMBER_OF_IPV][NETC_ETHSWT_NUMBER_OF_DR]; /*!< Profiles for egress IPV/DR to PCP frame modification. */ 2850 uint32 netcClockFrequency; /*!< Netc system clock */ 2851 uint32 netcExternalClockFrequency; /*!< extern reference clock */ 2852 Netc_EthSwt_Ip_1588ClockSourceOptionType Timer1588ClkSrc; /*!< reference clock source for 1588 timer */ 2853 } Netc_EthSwt_Ip_ConfigType; 2854 2855 /** 2856 * @brief Type to request or obtain the mirroring state (enable/disable) for a particular Ethernet switch. 2857 * @implements Netc_EthSwt_Ip_SwitchMirrorStateType_enum 2858 */ 2859 typedef enum 2860 { 2861 NETC_ETHSWT_MIRROR_DISABLED = 0x0U, /*!< @brief switch mirroring disabled. */ 2862 NETC_ETHSWT_MIRROR_ENABLED = 0x1U /*!< @brief switch mirroring enabled. */ 2863 } Netc_EthSwt_Ip_SwitchMirrorStateType; 2864 2865 /** 2866 * @brief Switch Mirroring Mode Type 2867 */ 2868 typedef enum 2869 { 2870 NETC_ETHSWT_NO_VLAN_RETAGGING = 0x0U, /*!< @brief No VLAN retagging. */ 2871 NETC_ETHSWT_VLAN_RETAGGING = 0x1U, /*!< @brief VLAN retagging. */ 2872 NETC_ETHSWT_VLAN_DOUBLE_TAGGING = 0x2U /*!< @brief VLAN Double tagging. */ 2873 } Netc_EthSwt_Ip_SwitchMirroringModeType; 2874 2875 /** @brief The Netc_EthSwt_Ip_SwitchMirrorCfgType specify the mirror configuration which is set up per Ethernet switch. 2876 * @implements Netc_EthSwt_Ip_SwitchMirrorCfgType_struct 2877 * */ 2878 typedef struct 2879 { 2880 uint8 SrcMacAddrFilter[6U]; /*!< @brief Specifies the source MAC address [0..255,0..255,0..255,0..255,0..255,0..255] that should be mirrored. If set to 0,0,0,0,0,0, no source MAC address filtering shall take place. */ 2881 uint8 DstMacAddrFilter[6U]; /*!< @brief Specifies the destination MAC address [0..255,0..255,0..255,0..255,0..255,0..255] that should be mirrored. If set to 0,0,0,0,0,0, no destination MAC address filtering shall take place. */ 2882 uint16 VlanIdFilter; /*!< @brief Specifies the VLAN address 0..4094 that should be mirrored. If set to 65535, no VLAN filtering shall take place. */ 2883 uint32 TrafficDirectionIngressBitMask; /*!< @brief Specifies the bit mask of Ethernet switch ingress port traffic direction to be mirrored. The bit mask is calculated depending of the values of EthSwtPortIdx. (e.g. set EthSwtPortIdx == 2 => TrafficDirectionIngressBitMask = 0b0000 0000 0000 0000 0000 0000 0000 0100). 2884 0b0 == disable ingress port mirroring 0b1 == enable ingress port mirroring Example: TrafficDirectionIngressBitMask = 0b0000 0000 0000 0000 0000 0000 0000 0100 => Ingress traffic mirroring is enabled of Ethernet switch port with EthSwtPortIdx=2 */ 2885 uint8 CapturePortIdx; /*!< @brief Specifies the Ethernet switch port which capture the mirrored traffic */ 2886 uint16 VlanId; /*!< @brief Specifies the VLAN address 0..4094 which shall be used for re-tagging or double-tagging if MirroringMode is set to 0x01 (VLAN re-tagging) or 0x02 (VLAN double tagging). 2887 If the value is set to 65535, the value shall be ignored */ 2888 Netc_EthSwt_Ip_SwitchMirroringModeType MirroringMode; /*!< @brief specifies the mode how the mirrored traffic should be tagged : 0x00 == No VLAN retagging; 0x01 == VLAN retagging; 0x03 == VLAN Double tagging */ 2889 } Netc_EthSwt_Ip_SwitchMirrorCfgType; 2890 2891 /*! 2892 * @brief PTP time 2893 * @implements Netc_EthSwt_Ip_PtpTimeType_struct 2894 */ 2895 typedef struct 2896 { 2897 uint32 nanoseconds; /**< Nanoseconds */ 2898 uint32 seconds; /**< Lower 32-bit of seconds */ 2899 uint16 secondsHi; /**< Upper 16-bit of seconds */ 2900 } Netc_EthSwt_Ip_PtpTimeType; 2901 2902 /*================================================================================================== 2903 * GLOBAL VARIABLE DECLARATIONS 2904 ==================================================================================================*/ 2905 2906 /*================================================================================================== 2907 * FUNCTION PROTOTYPES 2908 ==================================================================================================*/ 2909 2910 #ifdef __cplusplus 2911 } 2912 #endif 2913 2914 /** @} */ 2915 2916 #endif /* NETC_ETHSWT_IP_TYPES_H */ 2917
