1 /* 2 * Copyright 2021-2024 NXP 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef NETC_ETHSWT_IP_TYPES_H 8 #define NETC_ETHSWT_IP_TYPES_H 9 10 /** 11 * @file Netc_EthSwt_Ip_Types.h 12 * @addtogroup NETC_ETHSWT_IP NETC_ETHSWT Driver 13 * @{ 14 */ 15 16 #ifdef __cplusplus 17 extern "C"{ 18 #endif 19 20 21 /*================================================================================================== 22 * INCLUDE FILES 23 * 1) system and project includes 24 * 2) needed interfaces from external units 25 * 3) internal and external interfaces from this unit 26 ==================================================================================================*/ 27 #include "Netc_EthSwt_Ip_Cfg.h" 28 #include "Netc_EthSwt_Ip_Cfg_Defines.h" 29 #include "Eth_GeneralTypes.h" 30 #include "Std_Types.h" 31 32 /*================================================================================================== 33 * SOURCE FILE VERSION INFORMATION 34 ==================================================================================================*/ 35 #define NETC_ETHSWT_IP_TYPES_VENDOR_ID 43 36 #define NETC_ETHSWT_IP_TYPES_MODULE_ID 89 37 #define NETC_ETHSWT_IP_TYPES_AR_RELEASE_MAJOR_VERSION 4 38 #define NETC_ETHSWT_IP_TYPES_AR_RELEASE_MINOR_VERSION 7 39 #define NETC_ETHSWT_IP_TYPES_AR_RELEASE_REVISION_VERSION 0 40 #define NETC_ETHSWT_IP_TYPES_SW_MAJOR_VERSION 2 41 #define NETC_ETHSWT_IP_TYPES_SW_MINOR_VERSION 0 42 #define NETC_ETHSWT_IP_TYPES_SW_PATCH_VERSION 0 43 44 /*================================================================================================== 45 * FILE VERSION CHECKS 46 ==================================================================================================*/ 47 48 /* Checks against Netc_EthSwt_Ip_Cfg.h */ 49 #if (NETC_ETHSWT_IP_TYPES_VENDOR_ID != NETC_ETHSWT_IP_CFG_VENDOR_ID) 50 #error "Netc_EthSwt_Ip_Types.h and Netc_EthSwt_Ip_Cfg.h have different vendor ids" 51 #endif 52 #if (( NETC_ETHSWT_IP_TYPES_AR_RELEASE_MAJOR_VERSION != NETC_ETHSWT_IP_CFG_AR_RELEASE_MAJOR_VERSION) || \ 53 ( NETC_ETHSWT_IP_TYPES_AR_RELEASE_MINOR_VERSION != NETC_ETHSWT_IP_CFG_AR_RELEASE_MINOR_VERSION) || \ 54 ( NETC_ETHSWT_IP_TYPES_AR_RELEASE_REVISION_VERSION != NETC_ETHSWT_IP_CFG_AR_RELEASE_REVISION_VERSION)) 55 #error "AUTOSAR Version Numbers of Netc_EthSwt_Ip_Types.h and Netc_EthSwt_Ip_Cfg.h are different" 56 #endif 57 #if (( NETC_ETHSWT_IP_TYPES_SW_MAJOR_VERSION != NETC_ETHSWT_IP_CFG_SW_MAJOR_VERSION) || \ 58 ( NETC_ETHSWT_IP_TYPES_SW_MINOR_VERSION != NETC_ETHSWT_IP_CFG_SW_MINOR_VERSION) || \ 59 ( NETC_ETHSWT_IP_TYPES_SW_PATCH_VERSION != NETC_ETHSWT_IP_CFG_SW_PATCH_VERSION)) 60 #error "Software Version Numbers of Netc_EthSwt_Ip_Types.h and Netc_EthSwt_Ip_Cfg.h are different" 61 #endif 62 63 /* Checks against Netc_EthSwt_Ip_Cfg_Defines.h */ 64 #if (NETC_ETHSWT_IP_TYPES_VENDOR_ID != NETC_ETHSWT_IP_CFG_DEFINES_VENDOR_ID) 65 #error "Netc_EthSwt_Ip_Types.c and Netc_EthSwt_Ip_Cfg_Defines.h have different vendor ids" 66 #endif 67 #if (( NETC_ETHSWT_IP_TYPES_AR_RELEASE_MAJOR_VERSION != NETC_ETHSWT_IP_CFG_DEFINES_AR_RELEASE_MAJOR_VERSION) || \ 68 ( NETC_ETHSWT_IP_TYPES_AR_RELEASE_MINOR_VERSION != NETC_ETHSWT_IP_CFG_DEFINES_AR_RELEASE_MINOR_VERSION) || \ 69 ( NETC_ETHSWT_IP_TYPES_AR_RELEASE_REVISION_VERSION != NETC_ETHSWT_IP_CFG_DEFINES_AR_RELEASE_REVISION_VERSION)) 70 #error "AUTOSAR Version Numbers of Netc_EthSwt_Ip_Types.c and Netc_EthSwt_Ip_Cfg_Defines.h are different" 71 #endif 72 #if (( NETC_ETHSWT_IP_TYPES_SW_MAJOR_VERSION != NETC_ETHSWT_IP_CFG_DEFINES_SW_MAJOR_VERSION) || \ 73 ( NETC_ETHSWT_IP_TYPES_SW_MINOR_VERSION != NETC_ETHSWT_IP_CFG_DEFINES_SW_MINOR_VERSION) || \ 74 ( NETC_ETHSWT_IP_TYPES_SW_PATCH_VERSION != NETC_ETHSWT_IP_CFG_DEFINES_SW_PATCH_VERSION)) 75 #error "Software Version Numbers of Netc_EthSwt_Ip_Types.c and Netc_EthSwt_Ip_Cfg_Defines.h are different" 76 #endif 77 78 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK 79 /* Check if header file and StandardTypes.h are of the same AUTOSAR version */ 80 #if ((NETC_ETHSWT_IP_TYPES_AR_RELEASE_MAJOR_VERSION != ETH_GENERALTYPES_AR_RELEASE_MAJOR_VERSION) || \ 81 (NETC_ETHSWT_IP_TYPES_AR_RELEASE_MINOR_VERSION != ETH_GENERALTYPES_AR_RELEASE_MINOR_VERSION) \ 82 ) 83 #error "AutoSar Version Numbers of Netc_EthSwt_Ip_Types.h and Eth_GeneralTypes.h are different" 84 #endif 85 /* Check if header file and Std_Types.h are of the same AUTOSAR version */ 86 #if ((NETC_ETHSWT_IP_TYPES_AR_RELEASE_MAJOR_VERSION != STD_AR_RELEASE_MAJOR_VERSION) || \ 87 (NETC_ETHSWT_IP_TYPES_AR_RELEASE_MINOR_VERSION != STD_AR_RELEASE_MINOR_VERSION)) 88 #error "AUTOSAR Version Numbers of Netc_EthSwt_Ip_Types.h and Std_Types.h are different" 89 #endif 90 #endif 91 /*================================================================================================== 92 * CONSTANTS 93 ==================================================================================================*/ 94 95 #define NETC_ETHSWT_IP_NUMBER_OF_PSEUDO_PORT (1U) /*!< number of pseudoport */ 96 #define NETC_ETHSWT_IP_NUMBER_OF_PORTS 3 /*!< number of ports */ 97 #define NETC_ETHSWT_IP_NUMBER_OF_MAC_PORTS (2U) /*!< number of mac ports*/ 98 #define NETC_ETHSWT_IP_NUMBER_OF_VID_PER_PORT (255U) /*!< 3 number of vid per port */ 99 100 #define NETC_ETHSWT_IP_FDB_KEYE_DATA_ITEMS (3U) /*!< 3 uint32 items of FDB table KEYE DATA Format */ 101 #define NETC_ETHSWT_IP_FDB_SEARCH_CRITERIA_DATA_ITEMS (8U) /*!< 8 uint32 items of FDB table SEARCH CRITERIA Format */ 102 103 #define NETC_ETHSWT_IP_TABLE_CFGEDATA_ITEMS (4U) /*!< 4 uint32 items of CFGE_DATA Format for Tables */ 104 105 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_KEYE_DATA_LEN (53U) /*!< 53 uint32 items of Ingress Port Filter Table KEYE_DATA Format */ 106 107 #define NETC_ETHSWT_IP_NUMBER_OF_PROFILES (2U) 108 #define NETC_ETHSWT_IP_NUMBER_OF_PCP_DEI (16U) 109 #define NETC_ETHSWT_IP_NUMBER_OF_PCP (8U) 110 #define NETC_ETHSWT_IP_NUMBER_OF_IPV (8U) 111 #define NETC_ETHSWT_IP_NUMBER_OF_DR (4U) 112 113 #define NETC_ETHSWT_IP_EFMEID_FOR_MIRRORING (0U) /* Default egress frame modification entry id for mirroring */ 114 #define NETC_ETHSWT_IP_EFM_LEN_CHANGE_FOR_MIRRORING (4U) /* EFM_LEN_CHANGE value for double tagging when modifying mirrored egress frames */ 115 /*================================================================================================== 116 * DEFINES AND MACROS 117 ==================================================================================================*/ 118 119 /*================================================================================================== 120 * ENUMS 121 ==================================================================================================*/ 122 123 124 /*! 125 * @brief Ingress congestion management priority. Used for congestion management. 126 */ 127 typedef enum 128 { 129 NETC_ETHSWT_IP_ICM_LOW_PRIORITY = 0U, /*!< ICM low priority */ 130 NETC_ETHSWT_IP_ICM_HIGH_PRIORITY = 1U /*!< ICM high priority */ 131 } Netc_EthSwt_Ip_ICMType; 132 133 /*! 134 * @brief Callback function invoked when a general event is encountered 135 */ 136 typedef void (*Netc_EthSwt_Ip_CallbackType)(uint8 Instance); 137 138 /*! 139 * @brief Callback function invoked when a channel event is encountered 140 */ 141 typedef void (*Netc_EthSwt_Ip_ChCallbackType)(uint8 Instance, uint8 Channel); 142 143 /*================================================================================================== 144 * STRUCTURES AND OTHER TYPEDEFS 145 ==================================================================================================*/ 146 /*! 147 * @brief Query action enum types for tables in Switch. 148 */ 149 typedef enum { 150 NETC_ETHSWT_TABLES_FULL_QUERY = 0x0U, /*!< Full Query */ 151 NETC_ETHSWT_TABLES_ENTRY_ID_QUERY = 0x1U /*!< Entry_Id query only */ 152 } Netc_EthSwt_Ip_TablesQueryActionType; 153 154 /*! 155 * @brief defines FDB entries. 156 * @implements Netc_EthSwt_Ip_FdbEntryDataType_struct 157 */ 158 typedef struct 159 { 160 uint8 MacAddr[6]; /*!< MAC Address - This field is defined in network byte order(big-endian). Most significant byte of the MAC address is stored at the lowest byte offset of this field.*/ 161 uint16 FID; /*!< Filtering ID - used to connect the FDB table with the VLAN Filter Table.*/ 162 /*!< - it can be set to 0 when shared learning is used.*/ 163 uint32 SwitchPortEgressBitMask; /*!< Port Bitmap - This field identifies the destination port(s) to which the frame is to be forwarded.*/ 164 /*!< - The destination port(s) are represented as a bitmap, where each bit of the bitmap corresponds to a port on the switch.*/ 165 /*!< - Least significant bit of the bitmap corresponds to the smallest port number; */ 166 /*!< - i.e. bit offset 0 of the bitmap corresponds to port numbered 0, bit offset 1 to port numbered 1, and so on. */ 167 uint32 ET_EID; /*!< Egress Treatment Table Entry ID - This field specifies the index (or base index) to be used when accessing the Egress Treatment table.*/ 168 /*!< - This field is valid if the OETEID Option field is set to value other than 00b.*/ 169 /*!< - When no egress treatment needed - set entry ID to 0xFFFFFFFFUL. */ 170 uint8 CutThroughDisable; /*!< CTD - 00b = Do not override cut-through state.*/ 171 /*!< - 01b = Disable cut-through for the outgoing port specified in the EPORT. Cut-through is not disabled for the other ports specified in destination port bitmap.*/ 172 /*!< - 10b = Disable cut-through for all ports specified in the destination port bitmap.*/ 173 /*!< - 11b = Reserved.*/ 174 /*!< - Note: Cut-through should be disabled for any outgoing port where its Egress Treatment table entry specifies an Egress Sequence Recovery action. */ 175 uint8 OverridETEID; /*!< OETEID - 00b = No egress packet processing actions specified. Do not override ET_EID (and associated applicability port bitmap).*/ 176 /*!< - 01b = Single-port Egress Treatment table access. Only one port requires egress packet processing. That port identifier is specified in the EPORT field of this entry. */ 177 /*!< = The applicability port bitmap is set with a 1 for the port that is been identified in the EPORT field of this entry. For other ports, the applicability port bitmap is set to 0. */ 178 /*!< = The group assigned to packets matching this entry will have a single Egress Treatment table entry, for the port identified in the EPORT field of this entry. */ 179 /*!< - 10b = Multi-port packed Egress Treatment table access. Applicability port bitmap is set to the port bitmap specified in PORT_BITMAP field of this entry.*/ 180 /*!< = The group assigned to packets matching this entry will have an Egress Treatment table entry for each port set to 1 in the applicability port bitmap.*/ 181 /*!< - 11b = Multi-port absolute Egress Treatment table access. Applicability port bitmap is set with 1 for all ports. */ 182 /*!< = The group assigned to packets matching this entry will have Egress Treatment table entries for all ports on the switch. */ 183 uint8 EgressPort; /*!< EPORT - This field specifies the identifier of the port requiring egress packet processing when the Override ET_EID Option field is set to 01b (single-port Egress Treatment table access option). */ 184 /*!< - The port is expressed as an integer value, and must correspond to a port that is set in the destination port bitmap.*/ 185 /*!< - Valid if OETEID = 1 or CTD = 1.*/ 186 boolean IngressMirroringEnable; /*!< IMIRE - 0b = No ingress mirroring action specified in this entry.*/ 187 /*!< - 1b = The frame is mirrored to the mirror destination specified in the IMDCR0 register. */ 188 /*!< - Mirroring should never be handled from the entries if the AUTOSAR mirroring is used.*/ 189 boolean DynamicEntry; /*!< DYNAMIC - This field determines whether the entry is static or dynamic. */ 190 /*!< - 0b = Static entry, */ 191 /*!< - 1b = Dynamic entry */ 192 boolean TimeStampCapture; /*!< TIMECAPE - set allways to 'false' */ 193 } Netc_EthSwt_Ip_FdbEntryDataType; 194 195 /*! 196 * @brief defines Vlan Filter entries. 197 * @implements Netc_EthSwt_Ip_VlanFilterEntryDataType_struct 198 */ 199 typedef struct 200 { 201 uint32 PortMembershipBitmap; /*!< Port Membership Bitmap - on this field are set the memberships of certain ports to a specified VLAN ID. */ 202 uint16 VlanID; /*!< Vlan ID */ 203 uint16 FID; /*!< Filtering ID - The Filtering ID (FID) is a locally significant identifier (global to the switch), */ 204 /*!< - that is used as a key value when hardware performs a lookup into the FDB table and the L2 IPV4 Multicast Filter table.*/ 205 /*!< - The FID is used to identify a set of VIDs, which in turn allows sharing of the same address (MAC, IP) between multiple VIDs during lookups into the FDB table and L2 IPV4 Multicast Filter table.*/ 206 /*!< - This allows the support of the independent and shared learning modes.*/ 207 uint32 EgressTreatmentApplicabilityPortBitmap; /*!< ETA_PORT_BITMAP - This field specifies the Egress Treatment applicability port bitmap. See BASE_ET_EID field for more details. */ 208 /*!< - All ports that have their bit set to 1 in the Egress Treatment applicability port bitmap must member of this VLAN.*/ 209 /*!< - Valid if BASE_ET_EID is not NULL.*/ 210 /*!< - Note: Bits beyond the valid range of switch ports will be ignored.*/ 211 uint32 BaseEgressTreatmentEntryID; /*!< BASE_ET_EID - This field is used to convey the egress packet processing actions to be applied to packets matching this entry.*/ 212 /*!< - The egress packet processing actions are specified in the Egress Treatment table, where each table entry contains the egress packet */ 213 /*!< - processing actions to be applied to a scope of packets (e.g. packets from a particular VLAN) exiting on a particular egress port of the switch.*/ 214 /*!< - The means by which one specifies the Egress Treatment table entries to be accessed, is through the Egress Treatment group.*/ 215 /*!< - Within the hardware, an Egress Treatment group is determined by a base index (first Egress Treatment table entry of the group) and */ 216 /*!< - an applicability port bitmap (a bitmap corresponding to all ports of the switch) which indicates (with a 1) which ports */ 217 /*!< - have Egress Treatment table entries present.*/ 218 uint8 SpanningTreeGroupMemberId; /*!< STG_ID - This field specifies the spanning tree protocol group to which this VLAN belongs.*/ 219 /*!< - The value in this field is expressed as an integer and is used to index the spanning tree protocol per-port state register (BPSTGSR) to */ 220 /*!< - obtain the port spanning tree protocol state. The BPSTGSR register maintains spanning tree protocol port states for every spanning tree protocol group.*/ 221 /*!< - The information retrieved from this register is used to perform spanning tree protocol (STP) port state checking */ 222 /*!< - during ingress VLAN filtering processing and egress VLAN filtering processing.*/ 223 uint8 MacForwardingOptions; /*!< MFO - 00b = Reserved.*/ 224 /*!< - 01b = No FDB lookup is performed, the frame is flooded.*/ 225 /*!< - 10b = FDB lookup is performed, and if there is no match, the frame is flooded.*/ 226 /*!< - 11b = FDB lookup is performed, and if there is no match, the frame is discarded.*/ 227 uint8 MacLearningOptions; /*!< MLO - 000b = Reserved. */ 228 /*!< - 001b = Disable MAC learing. Mac learning is not performed during the forwarding processing.*/ 229 /*!< - 010b = Hardware MAC learning is performed.*/ 230 /*!< - 011b = Software MAC learning secure. A MAC learning lookup is performed into the FDB table. */ 231 /*!< = If there is no match, no attempt is made to add a new entry, and the frame is redirect to the switch management port. */ 232 /*!< = If there is match, and the entry's port number does not match frame ingress port number, */ 233 /*!< = the frame is redirected to the switch management port if station move is allowed, otherwise the frame is discarded. */ 234 /*!< - 101b = Disable MAC learning with SMAC validation. A MAC learning lookup is performed into the FDB table.*/ 235 /*!< = If there is no match or there is a match but the ingress port is not a member of the FDB entry,*/ 236 /*!< = the frame is discarded and counted against the bridge port discard count register (BPDCR) with discard reason BPDCRR0[MACLNFDR] set to 1.*/ 237 boolean IpMulticastFloodingEnable; /*!< IPMFLE - If IP multicast filtering is performed (IPMFE = 1b, and the frame is identified as a multicast IP packet), and there was no match found,*/ 238 /*!< - then the frame is forwarded according to this field.*/ 239 /*!< - 0b = IP Multicast Flooding disabled, frame is discarded.*/ 240 /*!< - 1b = IP Multicast Flooding enabled, frame is flooded.*/ 241 /*!< - If IP multicast filtering is disabled (IPMFE = 0b), this field is ignored by hardware.*/ 242 boolean IpMulticastFilteringEnable; /*!< IPMFE - This field specifies whether IP multicast filtering is to be performed. */ 243 /*!< - IP multicast filtering is accomplished by executing one or two exact match lookups: Source Specific Multicast (SSM) exact match lookup (if at least one entry added) */ 244 /*!< - utilizing both source IP address and destination IP address,and if there is no match, followed by Any Source Multicast (ASM) exact match lookup (if at least one entry added) */ 245 /*!< - utilizing destination IP address only. If an entry is found, the frame is forwarded according to the matched table entry. */ 246 /*!< - If no entry is found, then the frame will be forwarded according to IPMFLE.*/ 247 /*!< - 0b = No IP multicast filtering is performed.*/ 248 /*!< - 1b = If the frame is identified as a multicast IP packet, then IP multicast filtering isperformed.*/ 249 /*!< = If the frame is not identified as an IP multicast packet, the IP multicast filtering is not performed.*/ 250 } Netc_EthSwt_Ip_VlanFilterEntryDataType; 251 252 /****************************************************************************** 253 * Definitions 254 *****************************************************************************/ 255 #define NETC_ETHSWT_IP_FDB_TABLE_ID (15U) /*!< FDB table id */ 256 #define NETC_ETHSWT_IP_VLAN_FILTER_TABLE_ID (18U) /*!< Vlan filter table id */ 257 #define NETC_ETHSWT_IP_EGRESS_COUNT_TABLE_ID (39U) /*!< Egress Count table id */ 258 #define NETC_ETHSWT_IP_EGRESS_TREATMENT_TABLE_ID (33U) /*!< Egress Treatment table id */ 259 #define NETC_ETHSWT_IP_FRM_MODIFICATION_TABLE_ID (40U) /*!< Frame Modification table id */ 260 #define NETC_ETHSWT_IP_INGRESS_PORT_FILTER_TABLE_ID (13U) /*!< Ingress Port Filter table id */ 261 #define NETC_ETHSWT_IP_TIME_GATE_SCHEDULING_TABLE_ID (5U) /*!< Ingress Port Filter table id */ 262 #define NETC_ETHSWT_IP_RATE_POLICER_TABLE_ID (10U) /*!< Rate Policer table id */ 263 #define NETC_ETHSWT_IP_INGRESS_STREAM_IDEN_TABLE_ID (30U) /*!< Ingress Stream Identification table id */ 264 #define NETC_ETHSWT_IP_INGRESS_STREAM_TABLE_ID (31U) /*!< Ingress Stream table id */ 265 #define NETC_ETHSWT_IP_INGRESS_STREAM_FILTER_TABLE_ID (32U) /*!< Ingress Stream Filter table id */ 266 #define NETC_ETHSWT_IP_INGRESS_SEQ_GENERATION_TABLE_ID (34U) /*!< Ingress Sequence Generation table id */ 267 #define NETC_ETHSWT_IP_EGRESS_SEQ_RECOVERY_TABLE_ID (35U) /*!< Egress Sequence Recovery table id */ 268 #define NETC_ETHSWT_IP_STREAM_GATE_INSTANCE_TABLE_ID (36U) /*!< Stream Gate Instance table id */ 269 #define NETC_ETHSWT_IP_STREAM_GATE_CTRL_LIST_TABLE_ID (37U) /*!< Stream Gate Control List table id */ 270 #define NETC_ETHSWT_IP_CLASS_SCHEDULER_TABLE_ID (23U) /*!< ETM Class Scheduler table id */ 271 #define NETC_ETHSWT_IP_INGRESS_STREAM_COUNT_TABLE_ID (38U) /*!< INgress Stream Count table id */ 272 273 #define NETC_ETHSWT_IP_BD_ENTRY_EXIST (1U) /*!< BD entry exist */ 274 #define NETC_ETHSWT_IP_BD_ENTRY_NOT_EXIST (0U) /*!< BD entry not exist*/ 275 276 #define NETC_ETHSWT_IP_BD_NULL_ENTRY_ID (0xFFFFFFFFUL) /*!< BD null entry */ 277 278 /*! 279 * @brief defines CBDR status type. 280 */ 281 typedef uint32 Netc_EthSwt_Ip_CBDRStatusType; 282 #define NETC_ETHSWT_IP_CBDRSTATUS_SUCCESS (0x0UL) /*!< cbdr status success */ 283 #define NETC_ETHSWT_IP_CBDRSTATUS_INDEX_ERROR (0x1UL) /*!< index of ring should be 0 or 1 */ 284 #define NETC_ETHSWT_IP_CBDRSTATUS_RINGFULL (0x2UL) /*!< Ring is full */ 285 #define NETC_ETHSWT_IP_CBDRSTATUS_RR_ERROR (0x3UL) /*!< The hardware does not consume the command, or the operation has not finished by hardware. */ 286 #define NETC_ETHSWT_IP_CBDRSTATUS_NUMMATCHED_ERROR (0x4UL) /*!< The NUM_MATCHED field should be 1 when the entry exists for any commands */ 287 #define NETC_ETHSWT_IP_CBDRSTATUS_ACCESSMETHOD_ERROR (0x5UL) /*!< Access_method should be 0, 1, or 2, or the command is not supported by this access method */ 288 #define NETC_ETHSWT_IP_CBDRSTATUS_TABLE_OPERATION_TIMEOUT (0x6UL) /*!< Table operations timeout for commands like add, query, delete etc. */ 289 #define NETC_ETHSWT_IP_CBDRSTATUS_INVALID_TABLE_ID (0x080UL) /*!< Invalid table ID */ 290 #define NETC_ETHSWT_IP_CBDRSTATUS_NOT_SUPPORTED_ACCESS_METHOD (0x081UL) /*!< Access method specified is not supported */ 291 #define NETC_ETHSWT_IP_CBDRSTATUS_TABLE_INDEX_OUTOFRANGE (0x082UL) /*!< Table index out of range */ 292 #define NETC_ETHSWT_IP_CBDRSTATUS_BUFFER_NOT_SUFFICIENT (0x083UL) /*!< Request data buffer size or response data buffer size is not sufficient */ 293 #define NETC_ETHSWT_IP_CBDRSTATUS_INVALID_CMD (0x084UL) /*!< Invalid command */ 294 #define NETC_ETHSWT_IP_CBDRSTATUS_REQUEST_DATA_BUFFER_ERROR (0x085UL) /*!< Request Data buffer error */ 295 #define NETC_ETHSWT_IP_CBDRSTATUS_ECC_OR_PARITY_ERROR (0x086UL) /*!< Multi-bit ECC or parity error observed during command processing */ 296 #define NETC_ETHSWT_IP_CBDRSTATUS_EXCEEDED_HASH_ENTRY_LIMIT (0x087UL) /*!< Exceeded hash entry limit */ 297 #define NETC_ETHSWT_IP_CBDRSTATUS_EXCEEDED_MAXIMUM_HASH_COLLISION_CHAIN_LIMIT (0x088UL) /*!< Exceeded maximum hash collision chain limit */ 298 #define NETC_ETHSWT_IP_CBDRSTATUS_INVALID_ENTRY_ID (0x089UL) /*!< Invalid ENTRY_ID for HW Managed tables (hash, TCAM) */ 299 #define NETC_ETHSWT_IP_CBDRSTATUS_SEARCH_CMD_FILLED_THE_RESPONSE_DATA_BUFFER (0x08AUL) /*!< Search command filled the response data buffer before completing the command */ 300 #define NETC_ETHSWT_IP_CBDRSTATUS_CMD_FOR_INDEX_TABLE_BEFORE_OSR (0x08BUL) /*!< Command for index table before OSR[ITM_STATE]=0 */ 301 #define NETC_ETHSWT_IP_CBDRSTATUS_INVALID_QUERRY_ACTION (0x08CUL) /*!< Query action specifed is invalid */ 302 #define NETC_ETHSWT_IP_CBDRSTATUS_INVALID_TABLE_ACCESS_PRIVILEGE (0x08DUL) /*!< Invalid table access privilege */ 303 #define NETC_ETHSWT_IP_CBDRSTATUS_SYSTEM_BUS_READ_ERROR (0x08EUL) /*!< System Bus Read Error encountered while processing the command. */ 304 #define NETC_ETHSWT_IP_CBDRSTATUS_SYSTEM_BUS_WRITE_ERROR (0x08FUL) /*!< System Bus Write Error encountered while processing the command. */ 305 #define NETC_ETHSWT_IP_CBDRSTATUS_CLIENT_FAULT (0x090UL) /*!< Client encountered a fault while processing the command. */ 306 #define NETC_ETHSWT_IP_CBDRSTATUS_RESERVED_ERROR (0x091UL) /*!< 0x091 to 0x0FF = reserved */ 307 #define NETC_ETHSWT_IP_CBDRSTATUS_TABLE_SPECIFIC_ERROR (0x100UL) /*!< 0x100 to 0xFFF = Table specific error codes */ 308 #define NETC_ETHSWT_IP_CBDRSTATUS_UPTATE_EXISTING_ADMIN_GATE_CONTROL (0x0D1UL) /* Update action attempted on an existing admin gate control. An existing admin gate control list cannot be modified, Delete admin gate control list first before creating a new admin list. (Use update action with ADMIN_CONTROL_LIST_LENGTH =0 to perform delete). */ 309 #define NETC_ETHSWT_IP_CBDRSTATUS_UPDATE_ACTION_EXCEED_MAX_GCL_LEN (0x0D2UL) /* Update action attempted exceeds TGSTCAPR[MAX_GCL_LEN]. */ 310 #define NETC_ETHSWT_IP_CBDRSTATUS_UPDATE_ACTION_EXCEED_NUM_WORDS (0x0D3UL) /* Update action attempted exceeds TGSTCAPR[NUM_WORDS]. */ 311 #define NETC_ETHSWT_IP_CBDRSTATUS_INSUFFICIENT_RESOURCES (0x0D4UL) /* Insufficient resources to perform the requested operation (not enough free time gate list entries) */ 312 #define NETC_ETHSWT_IP_CBDRSTATUS_TRANSMITTING_TIME_NOT_SUFFICIENT (0x0D5UL) /* Update action attempted with ADMIN_CYCLE_TIME, ADMIN_TIME_INTERVAL_GE_i or truncated ADMIN_TIME_INTERVAL_GE_n due ADMIN_CYCLE_TIME specified is not sufficient to transmit 64 byte of frame data + header overhead. Where header overhead = PTXSDUOR[PTXSDUOR] + PTXSDUOR[PPDU_BCO]. */ 313 #define NETC_ETHSWT_IP_CBDRSTATUS_ADMIN_BASE_TIME_IS_MORE_THAN_1S (0x0D6UL) /* Update action attempted with ADMIN_BASE_TIME specified is more than one second in the past from tcs advance time. */ 314 #define NETC_ETHSWT_IP_CBDRSTATUS_ADMIN_CYCLE_TIME_OVERFLOW (0x0D7UL) /* Update action attempted with ADMIN_CYCLE_TIME + ADMIN_CYCLE_TIME_EXT is greater than 2^32-1. */ 315 #define NETC_ETHSWT_IP_CBDRSTATUS_RETRY_QUERY (0x0D8UL) /* Query action issued when config change occurred. Retry query. */ 316 #define NETC_ETHSWT_IP_CBDRSTATUS_INVALID_ADMIN_HR_CB_GE (0x0D9UL) /* Update action attempted with ADMIN_HR_CB_GE_i set to an invalid value. */ 317 318 /*! 319 * @brief defines access method type. 320 */ 321 typedef enum { 322 NETC_ETHSWT_ENTRY_ID_MATCH = 0x0U, /*!< if entry id match */ 323 NETC_ETHSWT_EXACT_MATCH_KEY_ELEMENT_MATCH, /*!< if exact match key element match */ 324 NETC_ETHSWT_SEARCH_METHOD, /*!< search method */ 325 NETC_ETHSWT_TERNARY_MATCH_KEY_ELEMENT_MATCH /*!< if ternary match key element */ 326 } Netc_EthSwt_Ip_AccessMethodType; 327 328 /*! 329 * @brief defines commands type. 330 * @implements Netc_EthSwt_Ip_CommandsType_enum 331 */ 332 typedef enum { 333 NETC_ETHSWT_DELETE_CMD = 0x1U, /*!< delete command */ 334 NETC_ETHSWT_UPDATE_CMD = 0x2U, /*!< update command */ 335 NETC_ETHSWT_QUERY_CMD = 0x4U, /*!< query command*/ 336 NETC_ETHSWT_QUERY_FOLLOWEDBY_DELETE_CMD = 0x5U, /*!< query followed by delete command */ 337 NETC_ETHSWT_QUERY_FOLLOWEDBY_UPDATE_CMD = 0x6U, /*!< query followed by update command */ 338 NETC_ETHSWT_ADD_CMD = 0x8U, /*!< add a command */ 339 NETC_ETHSWT_ADD_OR_UPDATE_CMD = 0xAU, /*!< add or update a command */ 340 NETC_ETHSWT_ADD_FOLLOWEDBY_QUERY_CMD = 0xCU, /*!< add followed by query command */ 341 NETC_ETHSWT_ADD_FOLLOWEDBY_QUERY_FOLLOWEDBY_UPDATE_CMD = 0xEU /*!< add followed by query followed by update command */ 342 } Netc_EthSwt_Ip_CommandsType; 343 344 /*! 345 * @brief CMBDR requeste length field. 346 */ 347 #define NETC_ETHSWT_IP_CMDBD_REQFMT_REQUEST_LENGTH_SHIFT (20U) 348 /*! 349 * @brief CMBDR requeste length field mask. 350 */ 351 #define NETC_ETHSWT_IP_CMDBD_REQFMT_REQUEST_LENGTH_MASK (0xFFF00000UL) 352 /*! 353 * @brief CMBDR requeste lengtht. 354 */ 355 #define NETC_ETHSWT_IP_CMDBD_REQFMT_REQUEST_LENGTH(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_REQUEST_LENGTH_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_REQUEST_LENGTH_MASK) 356 357 /*! 358 * @brief CMBDR response length field. 359 */ 360 #define NETC_ETHSWT_IP_CMDBD_REQFMT_RESPONSE_LENGTH_SHIFT (0U) 361 /*! 362 * @brief CMBDR response length field mask. 363 */ 364 #define NETC_ETHSWT_IP_CMDBD_REQFMT_RESPONSE_LENGTH_MASK (0x000FFFFFUL) 365 /*! 366 * @brief CMBDR response length. 367 */ 368 #define NETC_ETHSWT_IP_CMDBD_REQFMT_RESPONSE_LENGTH(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_RESPONSE_LENGTH_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_RESPONSE_LENGTH_MASK) 369 370 /** @brief CMD field */ 371 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD_SHIFT (0U) 372 /** @brief CMD field mask */ 373 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD_MASK (0x0000000FUL) 374 /** @brief CMD field set */ 375 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD_MASK) 376 377 /*! 378 * @brief CMBDR request config access method field. 379 */ 380 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD_SHIFT (12U) 381 /*! 382 * @brief CMBDR request config access method field mask. 383 */ 384 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD_MASK (0x00003000UL) 385 /*! 386 * @brief CMBDR request config field access method. 387 */ 388 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD_MASK) 389 390 /*! 391 * @brief CMBDR request config field table id. 392 */ 393 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID_SHIFT (16U) 394 /*! 395 * @brief CMBDR request config field table id mask. 396 */ 397 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID_MASK (0x00FF0000UL) 398 /*! 399 * @brief CMBDR request config table id. 400 */ 401 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID_MASK) 402 403 /*! 404 * @brief CMBDR request version field. 405 */ 406 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION_SHIFT (24U) 407 /*! 408 * @brief CMBDR request version field mask. 409 */ 410 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION_MASK (0x3F000000UL) 411 /*! 412 * @brief CMBDR request version. 413 */ 414 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION_MASK) 415 416 /*! 417 * @brief CMBDR request config field. 418 */ 419 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI_SHIFT (30U) 420 /*! 421 * @brief CMBDR request config field mask. 422 */ 423 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI_MASK (0x4F000000UL) 424 /*! 425 * @brief CMBDR request config. 426 */ 427 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI_MASK) 428 429 /*! 430 * @brief CMBDR request RR field. 431 */ 432 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_RR_SHIFT (31U) 433 /*! 434 * @brief CMBDR request RR field mask. 435 */ 436 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_RR_MASK (0x80000000UL) 437 /*! 438 * @brief CMBDR request RR. 439 */ 440 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_RR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_RR_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_RR_MASK) 441 442 /*! 443 * @brief CMBDR request NPF field. 444 */ 445 #define NETC_ETHSWT_IP_CMDBD_REQFMT_NPF_FIELD_SHIFT (15U) 446 /*! 447 * @brief CMBDR request NPF field mask. 448 */ 449 #define NETC_ETHSWT_IP_CMDBD_REQFMT_NPF_FIELD_MASK (0x00008000UL) 450 /*! 451 * @brief CMBDR request NPF. 452 */ 453 #define NETC_ETHSWT_IP_CMDBD_REQFMT_NPF_FIELD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_NPF_FIELD_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_NPF_FIELD_MASK) 454 455 /*! 456 * @brief Rate Policer Table FEE_DATA Format 457 */ 458 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_FEE_DATA_FEN_SHIFT (0U) 459 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_FEE_DATA_FEN_MASK (0x00000001UL) 460 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_FEE_DATA_FEN(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_RATEPOLICERTABLE_FEE_DATA_FEN_SHIFT)) & NETC_ETHSWT_IP_RATEPOLICERTABLE_FEE_DATA_FEN_MASK) 461 462 /*! 463 * @brief Rate Policer Table CFGE_DATA config bits Format 464 */ 465 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_MREN_SHIFT (0U) 466 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_MREN_MASK (0x00000001UL) 467 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_MREN(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_MREN_SHIFT)) & NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_MREN_MASK) 468 469 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_DOY_SHIFT (1U) 470 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_DOY_MASK (0x00000002UL) 471 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_DOY(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_DOY_SHIFT)) & NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_DOY_MASK) 472 473 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_CM_SHIFT (2U) 474 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_CM_MASK (0x00000004UL) 475 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_CM(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_CM_SHIFT)) & NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_CM_MASK) 476 477 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_CF_SHIFT (3U) 478 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_CF_MASK (0x00000008UL) 479 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_CF(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_CF_SHIFT)) & NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_CF_MASK) 480 481 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_NDOR_SHIFT (4U) 482 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_NDOR_MASK (0x00000010UL) 483 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_NDOR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_NDOR_SHIFT)) & NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_NDOR_MASK) 484 485 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_SDU_TYPE_SHIFT (5U) 486 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_SDU_TYPE_MASK (0x00000060UL) 487 #define NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_SDU_TYPE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_SDU_TYPE_SHIFT)) & NETC_ETHSWT_IP_RATEPOLICERTABLE_CFGE_DATA_SDU_TYPE_MASK) 488 489 /*! 490 * @brief Ingress Stream Table CFGE_DATA config bits Format 491 */ 492 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SFE_SHIFT (0U) 493 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SFE_MASK (0x00000001UL) 494 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SFE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SFE_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SFE_MASK) 495 496 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IPV_SHIFT (4U) 497 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IPV_MASK (0x000000F0UL) 498 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IPV_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IPV_MASK) 499 500 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OIPV_SHIFT (8U) 501 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OIPV_MASK (0x00000100UL) 502 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OIPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OIPV_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OIPV_MASK) 503 504 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_DR_SHIFT (9U) 505 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_DR_MASK (0x00000600UL) 506 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_DR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_DR_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_DR_MASK) 507 508 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ODR_SHIFT (11U) 509 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ODR_MASK (0x00000800UL) 510 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ODR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ODR_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ODR_MASK) 511 512 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IMIRE_SHIFT (12U) 513 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IMIRE_MASK (0x00001000UL) 514 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IMIRE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IMIRE_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IMIRE_MASK) 515 516 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_TIMECAPE_SHIFT (13U) 517 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_TIMECAPE_MASK (0x00002000UL) 518 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_TIMECAPE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_TIMECAPE_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_TIMECAPE_MASK) 519 520 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SPPD_SHIFT (15U) 521 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SPPD_MASK (0x00008000UL) 522 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SPPD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SPPD_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SPPD_MASK) 523 524 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ISQA_SHIFT (16U) 525 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ISQA_MASK (0x00030000UL) 526 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ISQA(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ISQA_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ISQA_MASK) 527 528 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ORP_SHIFT (18U) 529 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ORP_MASK (0x00040000UL) 530 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ORP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ORP_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_ORP_MASK) 531 532 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OSGI_SHIFT (19U) 533 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OSGI_MASK (0x00080000UL) 534 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OSGI(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OSGI_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OSGI_MASK) 535 536 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_HR_SHIFT (20U) 537 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_HR_MASK (0x00F00000UL) 538 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_HR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_HR_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_HR_MASK) 539 540 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_FA_SHIFT (24U) 541 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_FA_MASK (0x07000000UL) 542 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_FA(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_FA_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_FA_MASK) 543 544 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SDUTYPE_SHIFT (27U) 545 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SDUTYPE_MASK (0x18000000UL) 546 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SDUTYPE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SDUTYPE_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SDUTYPE_MASK) 547 548 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_MSDU_SHIFT (0U) 549 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_MSDU_MASK (0x0000FFFFUL) 550 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_MSDU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_MSDU_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_MSDU_MASK) 551 552 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IFMELENCHG_SHIFT (16U) 553 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IFMELENCHG_MASK (0x007F0000UL) 554 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IFMELENCHG(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IFMELENCHG_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_IFMELENCHG_MASK) 555 556 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_EPORT_SHIFT (23U) 557 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_EPORT_MASK (0x0F800000UL) 558 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_EPORT(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_EPORT_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_EPORT_MASK) 559 560 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OETEID_SHIFT (28U) 561 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OETEID_MASK (0x30000000UL) 562 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OETEID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OETEID_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_OETEID_MASK) 563 564 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_CTD_SHIFT (30U) 565 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_CTD_MASK (0xC0000000UL) 566 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_CTD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_CTD_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_CTD_MASK) 567 568 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_EGRESSPORTMAP_SHIFT (0U) 569 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_EGRESSPORTMAP_MASK (0x00FFFFFFUL) 570 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_EGRESSPORTMAP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_EGRESSPORTMAP_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_EGRESSPORTMAP_MASK) 571 572 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SIMAP_SHIFT (0U) 573 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SIMAP_MASK (0x0000FFFFUL) 574 #define NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SIMAP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SIMAP_SHIFT)) & NETC_ETHSWT_IP_INGRESSSTREAMTABLE_CFGE_SIMAP_MASK) 575 576 /*! 577 * @brief Ingress Stream Filter Table KEYE_DATA config bits Format 578 */ 579 #define NETC_ETHSWT_IP_ISFILTERTABLE_KEYE_PCP_SHIFT (0U) 580 #define NETC_ETHSWT_IP_ISFILTERTABLE_KEYE_PCP_MASK (0x00000007UL) 581 #define NETC_ETHSWT_IP_ISFILTERTABLE_KEYE_PCP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_KEYE_PCP_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_KEYE_PCP_MASK) 582 583 /*! 584 * @brief Ingress Stream Filter Table CFGE_DATA config bits Format 585 */ 586 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_IPV_SHIFT (0U) 587 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_IPV_MASK (0x0000000FUL) 588 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_IPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_IPV_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_IPV_MASK) 589 590 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_OIPV_SHIFT (4U) 591 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_OIPV_MASK (0x00000010UL) 592 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_OIPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_OIPV_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_OIPV_MASK) 593 594 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_DR_SHIFT (5U) 595 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_DR_MASK (0x00000060UL) 596 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_DR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_DR_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_DR_MASK) 597 598 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_ODR_SHIFT (7U) 599 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_ODR_MASK (0x00000080UL) 600 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_ODR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_ODR_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_ODR_MASK) 601 602 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_IMIRE_SHIFT (8U) 603 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_IMIRE_MASK (0x00000100UL) 604 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_IMIRE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_IMIRE_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_IMIRE_MASK) 605 606 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_TIMECAPE_SHIFT (9U) 607 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_TIMECAPE_MASK (0x00000200UL) 608 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_TIMECAPE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_TIMECAPE_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_TIMECAPE_MASK) 609 610 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_OSGI_SHIFT (10U) 611 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_OSGI_MASK (0x00000400UL) 612 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_OSGI(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_OSGI_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_OSGI_MASK) 613 614 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_CTD_SHIFT (11U) 615 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_CTD_MASK (0x00000800UL) 616 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_CTD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_CTD_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_CTD_MASK) 617 618 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_ORP_SHIFT (12U) 619 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_ORP_MASK (0x00001000UL) 620 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_ORP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_ORP_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_ORP_MASK) 621 622 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_SDUTYPE_SHIFT (13U) 623 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_SDUTYPE_MASK (0x00006000UL) 624 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_SDUTYPE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_SDUTYPE_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_SDUTYPE_MASK) 625 626 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_MSDU_SHIFT (16U) 627 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_MSDU_MASK (0xFFFF0000UL) 628 #define NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_MSDU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_MSDU_SHIFT)) & NETC_ETHSWT_IP_ISFILTERTABLE_CFGE_MSDU_MASK) 629 630 /*! 631 * @brief Stream Gate Instance Table Request Data Buffer ACFGEU (Admin Configuration Element Update.) field. 632 */ 633 #define NETC_ETHSWT_IP_SGITABLE_REQFMT_ACFGEU_SHIFT (0U) 634 #define NETC_ETHSWT_IP_SGITABLE_REQFMT_ACFGEU_MASK (0x00000001UL) 635 #define NETC_ETHSWT_IP_SGITABLE_REQFMT_ACFGEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_REQFMT_ACFGEU_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_REQFMT_ACFGEU_MASK) 636 637 /*! 638 * @brief Stream Gate Instance Table Request Data Buffer CFGEU (Configuration Element Update) field. 639 */ 640 #define NETC_ETHSWT_IP_SGITABLE_REQFMT_CFGEU_SHIFT (1U) 641 #define NETC_ETHSWT_IP_SGITABLE_REQFMT_CFGEU_MASK (0x00000002UL) 642 #define NETC_ETHSWT_IP_SGITABLE_REQFMT_CFGEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_REQFMT_CFGEU_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_REQFMT_CFGEU_MASK) 643 644 /*! 645 * @brief Stream Gate Instance Table Request Data Buffer SGISEU (Stream Gate Instance State Element Update) field. 646 */ 647 #define NETC_ETHSWT_IP_SGITABLE_REQFMT_SGISEU_SHIFT (2U) 648 #define NETC_ETHSWT_IP_SGITABLE_REQFMT_SGISEU_MASK (0x00000004UL) 649 #define NETC_ETHSWT_IP_SGITABLE_REQFMT_SGISEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_REQFMT_SGISEU_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_REQFMT_SGISEU_MASK) 650 651 /*! 652 * @brief Stream Gate Instance Table CFGE_DATA config bits Format 653 */ 654 /* Octets Exceeded Enable */ 655 #define NETC_ETHSWT_IP_SGITABLE_CFGE_OEXEN_SHIFT (0U) 656 #define NETC_ETHSWT_IP_SGITABLE_CFGE_OEXEN_MASK (0x00000001UL) 657 #define NETC_ETHSWT_IP_SGITABLE_CFGE_OEXEN(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_CFGE_OEXEN_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_CFGE_OEXEN_MASK) 658 659 /* Invalid Receive Enable */ 660 #define NETC_ETHSWT_IP_SGITABLE_CFGE_IRXEN_SHIFT (1U) 661 #define NETC_ETHSWT_IP_SGITABLE_CFGE_IRXEN_MASK (0x00000002UL) 662 #define NETC_ETHSWT_IP_SGITABLE_CFGE_IRXEN(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_CFGE_IRXEN_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_CFGE_IRXEN_MASK) 663 664 /* Protocol/Service Data Unit */ 665 #define NETC_ETHSWT_IP_SGITABLE_CFGE_SDUTYPE_SHIFT (2U) 666 #define NETC_ETHSWT_IP_SGITABLE_CFGE_SDUTYPE_MASK (0x0000000CUL) 667 #define NETC_ETHSWT_IP_SGITABLE_CFGE_SDUTYPE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_CFGE_SDUTYPE_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_CFGE_SDUTYPE_MASK) 668 669 /*! 670 * @brief Stream Gate Instance Table ICFGE_DATA config bits Format 671 */ 672 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_IPV_SHIFT (0U) 673 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_IPV_MASK (0x0000000FUL) 674 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_IPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_ICFGE_IPV_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_ICFGE_IPV_MASK) 675 676 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_OIPV_SHIFT (4U) 677 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_OIPV_MASK (0x00000010UL) 678 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_OIPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_ICFGE_OIPV_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_ICFGE_OIPV_MASK) 679 680 /* Gate State */ 681 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_GST_SHIFT (5U) 682 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_GST_MASK (0x00000020UL) 683 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_GST(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_ICFGE_GST_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_ICFGE_GST_MASK) 684 685 /* Cut Through Disabled */ 686 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_CTD_SHIFT (6U) 687 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_CTD_MASK (0x00000040UL) 688 #define NETC_ETHSWT_IP_SGITABLE_ICFGE_CTD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_ICFGE_CTD_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_ICFGE_CTD_MASK) 689 690 /*! 691 * @brief ICFGE_DATA Gate State data format enum type. 692 * This field specifies the gate state to use before the administrative stream gate control list takes affect. 693 */ 694 typedef uint32 Netc_EthSwt_Ip_SGITABLE_GateStateType; 695 #define NETC_ETHSWT_IP_SGITABLE_GATE_CLOSE (0x0U) /*!< 0b = Closed; frames are not permitted to pass through. */ 696 #define NETC_ETHSWT_IP_SGITABLE_GATE_OPEN (0x1U) /*!< 1b = Open; frames are permitted to pass through. */ 697 698 /*! 699 * @brief Stream Gate Instance Table SGISE_DATA config bits Format 700 */ 701 #define NETC_ETHSWT_IP_SGITABLE_SGISE_OEX_SHIFT (0U) 702 #define NETC_ETHSWT_IP_SGITABLE_SGISE_OEX_MASK (0x00000001UL) 703 #define NETC_ETHSWT_IP_SGITABLE_SGISE_OEX(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_SGISE_OEX_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_SGISE_OEX_MASK) 704 705 #define NETC_ETHSWT_IP_SGITABLE_SGISE_IRX_SHIFT (1U) 706 #define NETC_ETHSWT_IP_SGITABLE_SGISE_IRX_MASK (0x00000002UL) 707 #define NETC_ETHSWT_IP_SGITABLE_SGISE_IRX(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_SGISE_IRX_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_SGISE_IRX_MASK) 708 709 #define NETC_ETHSWT_IP_SGITABLE_SGISE_STATE_SHIFT (2U) 710 #define NETC_ETHSWT_IP_SGITABLE_SGISE_STATE_MASK (0x0000001CUL) 711 #define NETC_ETHSWT_IP_SGITABLE_SGISE_STATE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGITABLE_SGISE_STATE_SHIFT)) & NETC_ETHSWT_IP_SGITABLE_SGISE_STATE_MASK) 712 713 /*! 714 * @brief Stream Gate Control List Table CFGE_DATA config bits Format 715 */ 716 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_LISTLEN_SHIFT (0U) 717 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_LISTLEN_MASK (0x000000FFUL) 718 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_LISTLEN(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_LISTLEN_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_LISTLEN_MASK) 719 720 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTOIPV_SHIFT (16U) 721 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTOIPV_MASK (0x00010000UL) 722 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTOIPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTOIPV_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTOIPV_MASK) 723 724 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTIPV_SHIFT (17U) 725 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTIPV_MASK (0x001E0000UL) 726 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTIPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTIPV_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTIPV_MASK) 727 728 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTCTD_SHIFT (21U) 729 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTCTD_MASK (0x00200000UL) 730 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTCTD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTCTD_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTCTD_MASK) 731 732 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTGTST_SHIFT (22U) 733 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTGTST_MASK (0x00400000UL) 734 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTGTST(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTGTST_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_EXTGTST_MASK) 735 736 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_IOM_SHIFT (0U) 737 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_IOM_MASK (0x00FFFFFFUL) 738 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_IOM(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_IOM_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_IOM_MASK) 739 740 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_IPV_SHIFT (24U) 741 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_IPV_MASK (0x0F000000UL) 742 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_IPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_IPV_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_IPV_MASK) 743 744 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_OIPV_SHIFT (28U) 745 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_OIPV_MASK (0x10000000UL) 746 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_OIPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_OIPV_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_OIPV_MASK) 747 748 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_CTD_SHIFT (29U) 749 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_CTD_MASK (0x20000000UL) 750 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_CTD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_CTD_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_CTD_MASK) 751 752 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_IOMEN_SHIFT (30U) 753 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_IOMEN_MASK (0x40000000UL) 754 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_IOMEN(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_IOMEN_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_IOMEN_MASK) 755 756 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_GTST_SHIFT (31U) 757 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_GTST_MASK (0x80000000UL) 758 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_GTST(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_GTST_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_GTST_MASK) 759 760 /*! 761 * @brief Stream Gate Control List Table SGCLSE_DATA format enum type. 762 * This field indicates whether or not a stream gate control list (SGCL) is in-use in a Stream Gate Instance (SGI). 763 */ 764 typedef uint32 Netc_EthSwt_Ip_SGCLTABLE_RefCountType; 765 #define NETC_ETHSWT_IP_SGCLTABLE_NOT_INUSE_BYSGI (0x00U) /*!< Not in-use by an SGI. */ 766 #define NETC_ETHSWT_IP_SGCLTABLE_INUSE_BYSGI (0x01U) /*!< In-use by an SGI. */ 767 #define NETC_ETHSWT_IP_SGCLTABLE_REFCOUNT_RESERVED (0x02U) /*!< others reserved. */ 768 769 /*! 770 * @brief Stream Gate Control List Table SGCLSE_DATA Format*/ 771 #define NETC_ETHSWT_IP_SGCLTABLE_SGCLSE_REFCOUNT_SHIFT (0U) 772 #define NETC_ETHSWT_IP_SGCLTABLE_SGCLSE_REFCOUNT_MASK (0x000000FFUL) 773 #define NETC_ETHSWT_IP_SGCLTABLE_SGCLSE_REFCOUNT(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_SGCLSE_REFCOUNT_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_SGCLSE_REFCOUNT_MASK) 774 775 typedef uint32 Netc_EthSwt_Ip_ISQGTABLE_SQTagType; 776 #define NETC_ETHSWT_IP_ISQGTABLE_RSVDTYPE (0x00U) /*!< reserved. */ 777 #define NETC_ETHSWT_IP_ISQGTABLE_DRAFT20_RTAG (0x01U) /*!< 802.1CB draft 2.0 R-TAG. */ 778 #define NETC_ETHSWT_IP_ISQGTABLE_RTAG (0x02U) /*!< 802.1CB R-TAG.. */ 779 #define NETC_ETHSWT_IP_ISQGTABLE_HSRTAG (0x03U) /*!< HSR Tag. */ 780 781 /*! 782 * @brief Ingress Sequence Generation Table CFGE_DATA config bits Format 783 */ 784 #define NETC_ETHSWT_IP_ISQGTABLE_CFGE_SQTAG_SHIFT (0U) 785 #define NETC_ETHSWT_IP_ISQGTABLE_CFGE_SQTAG_MASK (0x00000007UL) 786 #define NETC_ETHSWT_IP_ISQGTABLE_CFGE_SQTAG(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISQGTABLE_CFGE_SQTAG_SHIFT)) & NETC_ETHSWT_IP_ISQGTABLE_CFGE_SQTAG_MASK) 787 788 /*! 789 * @brief Egress Sequence Recovery Table CFGE_DATA config bits Format 790 */ 791 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQTAG_SHIFT (0U) 792 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQTAG_MASK (0x00000007UL) 793 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQTAG(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQTAG_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQTAG_MASK) 794 795 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTNSQ_SHIFT (3U) 796 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTNSQ_MASK (0x00000008UL) 797 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTNSQ(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTNSQ_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTNSQ_MASK) 798 799 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRALG_SHIFT (4U) 800 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRALG_MASK (0x00000010UL) 801 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRALG(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRALG_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRALG_MASK) 802 803 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTYPE_SHIFT (5U) 804 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTYPE_MASK (0x00000020UL) 805 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTYPE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTYPE_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTYPE_MASK) 806 807 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRHL_SHIFT (8U) 808 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRHL_MASK (0x00007F00UL) 809 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRHL(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRHL_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRHL_MASK) 810 811 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRFWL_SHIFT (16U) 812 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRFWL_MASK (0x0FFF0000UL) 813 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRFWL(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRFWL_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRFWL_MASK) 814 815 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTP_SHIFT (0U) 816 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTP_MASK (0x00000FFFUL) 817 #define NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTP_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_CFGE_SQRTP_MASK) 818 819 /*! 820 * @brief Egress Sequence Recovery Table SRSE_DATA config bits Format 821 */ 822 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_SQRNUM_SHIFT (0U) 823 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_SQRNUM_MASK (0x0000FFFFUL) 824 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_SQRNUM(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_SQRNUM_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_SQRNUM_MASK) 825 826 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_TAKEANY_SHIFT (16U) 827 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_TAKEANY_MASK (0x00010000UL) 828 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_TAKEANY(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_TAKEANY_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_TAKEANY_MASK) 829 830 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_LCE_SHIFT (17U) 831 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_LCE_MASK (0x00020000UL) 832 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_LCE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_LCE_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_LCE_MASK) 833 834 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_SQRTS_SHIFT (18U) 835 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_SQRTS_MASK (0x3FFC0000UL) 836 #define NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_SQRTS(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_SQRTS_SHIFT)) & NETC_ETHSWT_IP_EGRSQRTABLE_SRSE_SQRTS_MASK) 837 838 /*! 839 * @brief Ingres Stream Identification (ISI) Table KEYE_DATA bits Format 840 */ 841 #define NETC_ETHSWT_IP_ISITABLE_KEYE_KEYTYPE_SHIFT (0U) 842 #define NETC_ETHSWT_IP_ISITABLE_KEYE_KEYTYPE_MASK (0x00000003UL) 843 #define NETC_ETHSWT_IP_ISITABLE_KEYE_KEYTYPE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISITABLE_KEYE_KEYTYPE_SHIFT)) & NETC_ETHSWT_IP_ISITABLE_KEYE_KEYTYPE_MASK) 844 845 #define NETC_ETHSWT_IP_ISITABLE_KEYE_SRCPORTID_SHIFT (2U) 846 #define NETC_ETHSWT_IP_ISITABLE_KEYE_SRCPORTID_MASK (0x0000007CUL) 847 #define NETC_ETHSWT_IP_ISITABLE_KEYE_SRCPORTID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISITABLE_KEYE_SRCPORTID_SHIFT)) & NETC_ETHSWT_IP_ISITABLE_KEYE_SRCPORTID_MASK) 848 849 #define NETC_ETHSWT_IP_ISITABLE_KEYE_SPM_SHIFT (7U) 850 #define NETC_ETHSWT_IP_ISITABLE_KEYE_SPM_MASK (0x00000080UL) 851 #define NETC_ETHSWT_IP_ISITABLE_KEYE_SPM(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISITABLE_KEYE_SPM_SHIFT)) & NETC_ETHSWT_IP_ISITABLE_KEYE_SPM_MASK) 852 853 typedef uint32 Netc_EthSwt_Ip_KeyTypeIdxType; 854 #define NETC_ETHSWT_IP_SWT_KEYTYPE_0 (0x00U) /* Switch function, key construction is specified in ISIDKC0CR0 */ 855 #define NETC_ETHSWT_IP_SWT_KEYTYPE_1 (0x01U) /* Switch function, key construction is specified in ISIDKC1CR0 */ 856 #define NETC_ETHSWT_IP_SWT_KEYTYPE_2 (0x02U) /* Switch function, key construction is specified in ISIDKC2CR0 */ 857 #define NETC_ETHSWT_IP_SWT_KEYTYPE_3 (0x03U) /* Switch function, key construction is specified in ISIDKC3CR0 */ 858 #define NETC_ETHSWT_IP_ENETC_KEYTYPE_0 (0x00U) /* Enetc function, key construction is specified in ISIDKC0CR0 */ 859 #define NETC_ETHSWT_IP_ENETC_KEYTYPE_1 (0x01U) /* Enetc function, key construction is specified in ISIDKC1CR0 */ 860 861 typedef uint32 Netc_EthSwt_Ip_SrcPortMasqIdxType; 862 #define NETC_ETHSWT_IP_MATCH_FROM_SWT_PORTS (0x00U) /* Match frames from switch port(s). */ 863 #define NETC_ETHSWT_IP_MATCH_FROM_SWT_MANAGEMENT_PORTS (0x01U) /* Match frame from switch management port(s) that has switch port masquerading. */ 864 865 /*! 866 * @brief NTMP request and response message header format for buffer descriptors of command rings. 867 */ 868 typedef struct { 869 uint32 MessageHeaderDataField[8U]; /*!< used for both request and response message header data format */ 870 } Netc_EthSwt_Ip_NTMPMessageHeaderFormatType; 871 872 /*! 873 * @brief NTMP request message header format index enum for buffer descriptors of command rings. 874 */ 875 typedef enum { 876 NETC_ETHSWT_IP_REQHEADER_ADDR_L = 0x0U, /*!< a 16-byte aligned low part of memory address for a table, offset: 0x0 */ 877 NETC_ETHSWT_IP_REQHEADER_ADDR_H = 0x1U, /*!< a 16-byte aligned high part of memory address for a table, offset: 0x1 */ 878 NETC_ETHSWT_IP_REQHEADER_LENGTHFIELD = 0x2U, /*!< request and response buffer length in Request Header, offset: 0x2 */ 879 NETC_ETHSWT_IP_REQHEADER_CONFIGFIELD = 0x3U, /*!< config field includes Table id, access method, command etc. in Request Header, offset: 0x3 */ 880 NETC_ETHSWT_IP_REQHEADER_NPFFIELD = 0x7U /*!< NPF field in Request Header, offsext: 0x7 */ 881 } Netc_EthSwt_Ip_NTMPReqHeaderFormatIndexType; 882 883 #define NETC_ETHSWT_IP_RSPHEADER_STATUS_FIELD_INDEX (0x3U) /*!< status field includes RR bit, ERROR field and NUM_MATCHED field in Response Header Format */ 884 885 /*! 886 * @brief NTMP request message header format index enum for buffer descriptors of command rings. 887 */ 888 typedef struct { 889 uint16 ReqBuffLength; /*!< Table Request data buffer length field of NTMP Request Message Header Data Format */ 890 uint16 RspBuffLength; /*!< Table Response data buffer length field of NTMP Request Message Header Data Format */ 891 uint8 CmdCompletionInt; /*!< CCI (Command Completion Interrupt) in config field of Request Message Header Data Format */ 892 uint8 Version; /*!< Protocol Version in config field of Request Message Header Data Format */ 893 uint8 TableId; /*!< TABLE_ID in config field of Request Message Header Data Format */ 894 Netc_EthSwt_Ip_AccessMethodType AccessMethod; /*!< ACCESS_METHOD in config field of Request Message Header Data Format */ 895 Netc_EthSwt_Ip_CommandsType Cmd; /*!< COMMAND in config field of Request Message Header Data Format */ 896 } Netc_EthSwt_Ip_ReqHeaderTableOperationDataType; 897 898 /*! 899 * @brief buffer descriptors of command rings. 900 */ 901 typedef struct { 902 Netc_EthSwt_Ip_NTMPMessageHeaderFormatType *CmdBDAddr; /*!< Address where command buffer descriptor will be saved. The address must be 128 byte aligned. */ 903 uint8 lengthCBDR; /*!< the length of command ring. */ 904 } Netc_EthSwt_Ip_CmdBDType; 905 /* ---bits field for NTMP request message--- */ 906 907 /* +++bits field for NTMP response message+++ */ 908 /*! 909 * @brief CMBDR RR status field. 910 */ 911 #define NETC_ETHSWT_IP_CMDBD_RSPFMT_STATUS_FIELD_RR_SHIFT (31U) 912 /*! 913 * @brief CMBDR RR status field mask. 914 */ 915 #define NETC_ETHSWT_IP_CMDBD_RSPFMT_STATUS_FIELD_RR_MASK (0x80000000UL) 916 917 /*! 918 * @brief CMBDR error status field. 919 */ 920 #define NETC_ETHSWT_IP_CMDBD_RSPFMT_STATUS_FIELD_ERROR_SHIFT (16U) 921 /*! 922 * @brief CMBDR error status field mask. 923 */ 924 #define NETC_ETHSWT_IP_CMDBD_RSPFMT_STATUS_FIELD_ERROR_MASK (0x0FFF0000UL) 925 926 /*! 927 * @brief CMBDR status field num matched. 928 */ 929 #define NETC_ETHSWT_IP_CMDBD_RSPFMT_STATUS_FIELD_NUMMATCHED_SHIFT (0U) 930 /*! 931 * @brief CMBDR status field num matched mask. 932 */ 933 #define NETC_ETHSWT_IP_CMDBD_RSPFMT_STATUS_FIELD_NUMMATCHED_MASK (0x0000FFFFUL) 934 /* ---bits field for NTMP response message--- */ 935 936 /* +++bits field and structure for CFGE_DATA format+++ */ 937 /*! 938 * @brief FDB table config port bitmap field. 939 */ 940 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_PORT_BITMAP_SHIFT (0U) 941 /*! 942 * @brief FDB table config port bitmap map mask. 943 */ 944 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_PORT_BITMAP_MASK (0x00FFFFFFUL) 945 /*! 946 * @brief FDB table config port bitmap. 947 */ 948 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_PORT_BITMAP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_PORT_BITMAP_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_PORT_BITMAP_MASK) 949 950 /*! 951 * @brief FDB table config port OETEID field. 952 */ 953 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_OETEID_SHIFT (0U) 954 /*! 955 * @brief FDB table config port OETEID field mask. 956 */ 957 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_OETEID_MASK (0x00000003UL) 958 /*! 959 * @brief FDB table config port OETEID. 960 */ 961 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_OETEID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_OETEID_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_OETEID_MASK) 962 963 /*! 964 * @brief FDB table config port EPORT field. 965 */ 966 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_EPORT_SHIFT (2U) 967 /*! 968 * @brief FDB table config port EPORT field mask. 969 */ 970 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_EPORT_MASK (0x0000007CUL) 971 /*! 972 * @brief FDB table config port EPORT. 973 */ 974 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_EPORT(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_EPORT_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_EPORT_MASK) 975 976 /*! 977 * @brief FDB table config port IMIRE field. 978 */ 979 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_IMIRE_SHIFT (7U) 980 /*! 981 * @brief FDB table config port IMIRE field mask. 982 */ 983 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_IMIRE_MASK (0x00000080UL) 984 /*! 985 * @brief FDB table config port IMIRE. 986 */ 987 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_IMIRE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_IMIRE_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_IMIRE_MASK) 988 989 /*! 990 * @brief FDB table config port CTD field. 991 */ 992 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_CTD_SHIFT (9U) 993 /*! 994 * @brief FDB table config port CTD field mask. 995 */ 996 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_CTD_MASK (0x00000600UL) 997 /*! 998 * @brief FDB table config port CTD. 999 */ 1000 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_CTD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_CTD_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_CTD_MASK) 1001 1002 /*! 1003 * @brief FDB table config port DYNAMIC field. 1004 */ 1005 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_DYNAMIC_SHIFT (11U) 1006 /*! 1007 * @brief FDB table config port DYNAMIC field mask. 1008 */ 1009 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_DYNAMIC_MASK (0x00000800UL) 1010 /*! 1011 * @brief FDB table config port DYNAMIC. 1012 */ 1013 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_DYNAMIC(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_DYNAMIC_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_DYNAMIC_MASK) 1014 1015 /*! 1016 * @brief FDB table config port TIMECAPE field. 1017 */ 1018 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_TIMECAPE_SHIFT (12U) 1019 /*! 1020 * @brief FDB table config port TIMECAPE field mask. 1021 */ 1022 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_TIMECAPE_MASK (0x00001000UL) 1023 /*! 1024 * @brief FDB table config port TIMECAPE field. 1025 */ 1026 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_TIMECAPE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_TIMECAPE_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_TIMECAPE_MASK) 1027 1028 /*! 1029 * @brief FDB Table CFGE_DATA format. 1030 */ 1031 typedef struct { 1032 uint32 Cfge_PortBitmap; /*!< FDB table config port bitmap */ 1033 uint32 Cfge_ConfigField; /*!< FDB table config field */ 1034 uint32 Cfge_EtEid; /*!< FDB table eid */ 1035 } Netc_EthSwt_Ip_FDBTableCFGEDataType; 1036 1037 /*! 1038 * @brief Rate policer Table Service Data Unit enum type. 1039 */ 1040 typedef enum 1041 { 1042 NETC_ETHSWT_IP_PPDU = 0U, /*!< Physical Layer PDU */ 1043 NETC_ETHSWT_IP_MPDU = 1U, /*!< MAC PDU */ 1044 NETC_ETHSWT_IP_MSDU = 2U, /*!< MAC SDU */ 1045 NETC_ETHSWT_IP_RSDTYPE = 3U /* reservered type */ 1046 }Netc_EthSwt_Ip_SDUType; 1047 1048 /*! 1049 * @brief Rate Policer Table CFGE_DATA Format. 1050 */ 1051 typedef struct { 1052 uint32 Cfge_Cir; /*!< Committed Information Rate (CIR) field */ 1053 uint32 Cfge_Cbs; /*!< Committed Burst SizeExpressed (CBS) field */ 1054 uint32 Cfge_Eir; /*!< Excess Information Rate (EIR) field */ 1055 uint32 Cfge_Ebs; /*!< Excess Burst Size (EBS) field */ 1056 boolean Cfge_Mren; /*!< Mark All Frames Red Enable, 0:disable, 1:enable */ 1057 boolean Cfge_Doy; /*!< Drop on Yellow, 0:not dropped, 1:dropped */ 1058 boolean Cfge_Cm; /*!< Color mode, 0:color blind, 1:color aware */ 1059 boolean Cfge_Cf; /*!< Coupling flag, 0:C and E token buckets are not coupled. 1:C and E token buckets are coupled*/ 1060 boolean Cfge_Ndor; /*!< No Drop on Red, 0:frames marded "red" are alwayts dropped, 1: not dropped */ 1061 Netc_EthSwt_Ip_SDUType Cfge_SduType; /*!< Service Data Unit Type */ 1062 } Netc_EthSwt_Ip_RatePolicerTableCFGEDataType; 1063 1064 /*! 1065 * @brief Rate Policer Table STSE_DATA Format. 1066 */ 1067 typedef struct { 1068 uint64 Stse_ByteCount; /*!< Number of bytes received by the rate policer instance */ 1069 uint32 Stse_DropFrames; /*!< Number of frames dropped by the rate policer instance */ 1070 uint32 Stse_Dr0GrnFrames; /*!< Number of frames marked green with DR=0 by the rate policer instance */ 1071 uint32 Stse_Dr1GrnFrames; /*!< Number of frames marked green with DR=1 by the rate policer instance */ 1072 uint32 Stse_Dr2YlwFrames; /*!< Number of frames marked yellow with DR=2 by the rate policer instance */ 1073 uint32 Stse_RemarkYlwFrames; /*!< Number of frames re-marked from green to yellow by the rate policer instance */ 1074 uint32 Stse_Dr3RedFrames; /*!< Number of frames marked red (DR=3) by the rate policer instance */ 1075 uint32 Stse_RemarkRedFrames; /*!< Number of frames re-marked from green or yellow to red by the rate policer instance */ 1076 uint32 Stse_Lts; /*!< Last timestamp */ 1077 uint32 Stse_CommittedTokenBucketInteger; /*!< Committed token bucket contents, integer portion */ 1078 uint32 Stse_CommittedTokenBucketFractional; /*!< Committed token bucket contents, fractional portion (31 bits) + sign bit (1 bit, BCS) */ 1079 uint32 Stse_ExcessTokenBucketInteger; /*!< Excess token bucket contents, integer portion (32 bits)*/ 1080 uint32 Stse_ExcessTokenBucketFractional; /*!< Excess token bucket contents, fractional portion (31 bits) + sign bit (1 bit, BES) */ 1081 } Netc_EthSwt_Ip_RatePolicerTableSTSEDataType; 1082 1083 /*! 1084 * @brief defines Rate Policer entries. 1085 * 1086 */ 1087 typedef struct 1088 { 1089 uint32 RatePolicerEntryId; /* Entry ID */ 1090 Netc_EthSwt_Ip_RatePolicerTableCFGEDataType RatePolicerCfgeData; /* CFGE Data */ 1091 boolean ConfigurationElementUpdate; /* Update Actions, CFGEU */ 1092 boolean FunctionalEnableElementUpdate; /* Update Actions, FEEU */ 1093 boolean PolicerStateElementUpdate; /* Update Actions, PSEU */ 1094 boolean StatisticsElementUpdate; /* Update Actions, STSEU */ 1095 boolean RatePolicerFunctionEnable; /* False = The rate policer instance is disabled; True 1b = The rate policer instance is enabled */ 1096 } Netc_EthSwt_Ip_RatePolicerEntryDataType; 1097 1098 /*! 1099 * @brief defines Rate Policer entrie response data. 1100 * 1101 */ 1102 typedef struct 1103 { 1104 uint32 RatePolicerEntryId; /* Entry ID */ 1105 Netc_EthSwt_Ip_RatePolicerTableSTSEDataType RatePolicerStseData; /* Statistics Element Data */ 1106 Netc_EthSwt_Ip_RatePolicerTableCFGEDataType RatePolicerCfgeData; /* CFGE Data */ 1107 boolean RatePolicerFunctionEnable; /* False = The rate policer instance is disabled; True 1b = The rate policer instance is enabled */ 1108 boolean MarkRedFlag; /* 0b = Indicates that the rate policer blocking "mark all frames red" function has not been triggered */ 1109 /* 1b = Indicates that all frames arriving at this rate policer are marked red by the rate policer blocking "mark all frames red" function. */ 1110 } Netc_EthSwt_Ip_RatePolicerEntryRspDataType; 1111 1112 /*! 1113 * @brief Forwarding Action data type definitions for Ingress Stream Table. 1114 */ 1115 typedef uint32 Netc_EthSwt_Ip_SwtForwardingActionDataType; 1116 #define NETC_ETHSWT_IP_SWT_DISCARDFRAMES (0x0U) /*!< discard frames */ 1117 #define NETC_ETHSWT_IP_SWT_REDIRECTFRAMES (0x1U) /*!< Re-direct frame to switch management port without any frame modification */ 1118 #define NETC_ETHSWT_IP_SWT_STREAMFORWARDING (0x2U) /*!< Stream forwarding */ 1119 #define NETC_ETHSWT_IP_SWT_BRIDGEFORWARDING (0x3U) /*!< 802.1Q bridge forwarding */ 1120 #define NETC_ETHSWT_IP_SWT_COPYANDSTREAMFORWARDING (0x4U) /*!< Copy to switch management port with specified HR and stream forwarding */ 1121 #define NETC_ETHSWT_IP_SWT_COPYANDBRIDGEFORWARDING (0x5U) /*!< Copy to switch management port with specified HR and Bridge forwarding */ 1122 1123 typedef uint32 Netc_EthSwt_Ip_EnetcForwardingActionDataType; 1124 #define NETC_ETHSWT_IP_ENETC_DISCARDFRAMES (0x0U) /*!< discard frames */ 1125 #define NETC_ETHSWT_IP_ENETC_ALLOWWITHOUTSIBITMAP (0x1U) /*!< Allow without setting the pre L2 filtering SI bitmap. */ 1126 #define NETC_ETHSWT_IP_SWT_ALLOWWITHSIBITMAP (0x2U) /*!< Allow with setting the pre L2 filtering SI bitmap to the value configured in the SI_MAP field of this entry. */ 1127 1128 /*! 1129 * @brief Override ET_EID data format enum type. 1130 */ 1131 typedef uint32 Netc_EthSwt_Ip_OETEIDIdxType; 1132 #define NETC_ETHSWT_IP_NO_EGRESS_PKT_PROCESSING_ACTIONS_SPECIFIED (0x0U) /*!< No egress packet processing actions specified */ 1133 #define NETC_ETHSWT_IP_SINGLEPORT_EGRESS_TREATMENT_TABLE_ACCESS (0x1U) /*!< Single-port Egress Treatment table access. */ 1134 #define NETC_ETHSWT_IP_MULTIPORT_PKT_EGRESS_TREATMENT_TABLE_ACCESS (0x2U) /*!< Multi-port packet Egress Treatment table access */ 1135 #define NETC_ETHSWT_IP_MULTIPORT_ABS_EGRESS_TREATMENT_TABLE_ACCESS (0x3U) /*!< Multi-port absolute Egress Treatment table access */ 1136 1137 /*! 1138 * @brief Cut-Through Disable data format enum type. 1139 */ 1140 typedef uint32 Netc_EthSwt_Ip_CutThroughtDisableIdxType; 1141 #define NETC_ETHSWT_IP_DONOT_OVERRIDE_CUTTHROUGH_STATE (0x0U) /*!< Do not override cut-through state */ 1142 #define NETC_ETHSWT_IP_DISABLE_CUTTHROUGH_FOR_OUTGOING_PORT (0x1U) /*!< Disable cut-through for the outgoing port specified in the EPORT field */ 1143 #define NETC_ETHSWT_IP_DISABLE_CUTTHROUGH_FOR_ALL_PORTS (0x2U) /*!< Disable cut-through for all ports specified in the destination port bitmap */ 1144 #define NETC_ETHSWT_IP_DISABLE_CUTTHROUGH_RESERVED (0x3U) /*!< Reserved */ 1145 1146 /*! 1147 * @brief Ingress Sequence Action data format enum type. 1148 */ 1149 typedef uint32 Netc_EthSwt_Ip_IngressSeqActionIdxType; 1150 #define NETC_ETHSWT_IP_FRER_SEQ_GENERATION_FUNC_NOT_PERFORMED (0x0U) /*!< FRER sequence generation function is not performed. */ 1151 #define NETC_ETHSWT_IP_FRER_SEQ_GENERATION_FUNC_PERFORMED (0x1U) /*!< FRER sequence generation function is performed. */ 1152 1153 /*! 1154 * @brief Egress Sequence Recovery Table CFGE_DATA enum type. 1155 */ 1156 typedef uint32 Netc_EthSwt_Ip_ESQRTABLE_CFGE_SQRTnsqIdxType; 1157 #define NETC_ETHSWT_IP_ESQRTABLE_DISCARD_FRAME_AND_COUNT (0x0U) /*!< Discard frame and count in both the TAGLESS_PACKETS counter and in the port's PTXDCR register. */ 1158 #define NETC_ETHSWT_IP_ESQRTABLE_ACCEPT_FRAME_AND_NORECOVERY (0x1U) /*!< Accept frame and do not perform recovery function. */ 1159 1160 typedef uint32 Netc_EthSwt_Ip_ESQRTABLE_CFGE_SQRAlgIdxType; 1161 #define NETC_ETHSWT_IP_ESQRTABLE_VECTOR_ALGORITHM (0x0U) /*!< Vector algorithm. */ 1162 #define NETC_ETHSWT_IP_ESQRTABLE_MATCH_ALGORITHM (0x1U) /*!< Match algorithm. */ 1163 1164 typedef uint32 Netc_EthSwt_Ip_ESQRTABLE_CFGE_SQRTypeIdxType; 1165 #define NETC_ETHSWT_IP_ESQRTABLE_SEQUENCY_REC_FUNC (0x0U) /*!< Sequence recovery function. */ 1166 #define NETC_ETHSWT_IP_ESQRTABLE_INDIVIDUAL_REC_FUNC (0x1U) /*!< Individual recovery function. */ 1167 1168 /*! 1169 * @brief Ingress Stream Table CFGE_DATA Format. 1170 */ 1171 typedef struct { 1172 uint32 IngressSeqGeneration_EID; /*!< Ingress Sequence Generation Entry ID */ 1173 uint32 RatePolicer_EID; /*!< Rate Policer Entry ID */ 1174 uint32 StreamGateInstance_EID; /*!< Stream Gate Instance Entry ID */ 1175 uint32 IngressFrmModification_EID; /*!< Ingress Frame Modification Entry ID */ 1176 uint32 EgressTreatment_EID; /*!< Egress Treatment Entry ID */ 1177 uint32 IngressStreamCounter_EID; /*!< Ingress Stream counter Index */ 1178 uint32 EgressPortBitMap; /*!< Egress Port bitmap */ 1179 uint16 StationInterfaceMap; /*!< Station Interface Map */ 1180 uint16 MaximumServiceDataUnit; /*!< Maximum Service Data Unit */ 1181 uint8 IngressFrmModiEntryFrmLenChange; /*!< Ingress Frame Modification Entry Frame Length Change */ 1182 uint8 EgressPort; /*!< Egress Port */ 1183 Netc_EthSwt_Ip_OETEIDIdxType OverrideET_EID; /*!< Override ET_EID */ 1184 Netc_EthSwt_Ip_CutThroughtDisableIdxType CutThrDisable; /*!< Cut-Trought disable */ 1185 Netc_EthSwt_Ip_SDUType SduType; /*!< Service Data Unit type to use for MSDU (Maximum Service Data Unit) field. */ 1186 Netc_EthSwt_Ip_SwtForwardingActionDataType ForwardingActions; /*!< Forwarding actions */ 1187 uint8 HostReason; /*!< Host reason */ 1188 uint8 DropResilience; /*!< New Drop Resilience (DR) to be assigned to the frame, if ODR is 1. */ 1189 uint8 InternalPriorityValue; /*!< Internal Priority Value (IPV) */ 1190 boolean OverrideStreamGateInstanceEID; /*!< Override Stream Gate Instance Entry ID */ 1191 boolean OverrideRatePolicerInstanceEID; /*!< Override Rate Policer (instance) ID. */ 1192 Netc_EthSwt_Ip_IngressSeqActionIdxType IngressSeqAction; /*!< Ingress Sequence Action */ 1193 boolean SrcPortPruningDisable; /*!< Source Port Pruning Disable. */ 1194 boolean TimeStampCaptureEnable; /*!< Timestamp Capture Enable */ 1195 boolean IngressMirroringEnable; /*!< Ingress Mirroring Enable */ 1196 boolean OverrideDR; /*!< Override Drop Resilience (DR) */ 1197 boolean OverrideIPV; /*!< Override Internal Priority Value (IPV) */ 1198 boolean StreamFilteringEnable; /*!< Stream Filtering Enable */ 1199 } Netc_EthSwt_Ip_IngressStreamTableCFGEDataType; 1200 1201 /*! 1202 * @brief defines Ingress Stream entries. 1203 * @implements Netc_EthSwt_Ip_IngressStreamEntryDataType_struct 1204 */ 1205 typedef struct 1206 { 1207 uint32 IngressStreamEntryId; /* Entry ID */ 1208 Netc_EthSwt_Ip_IngressStreamTableCFGEDataType IngressStreamCfgeData; /* CFGE Data */ 1209 } Netc_EthSwt_Ip_IngressStreamEntryDataType; 1210 1211 /*! 1212 * @brief Ingress Stream Filter Table CFGE_DATA Format. 1213 */ 1214 typedef struct { 1215 uint32 RatePolicer_EID; /*!< Rate Policer Entry ID */ 1216 uint32 StreamGateInstance_EID; /*!< Stream Gate Instance Entry ID */ 1217 uint32 IngressStreamCounter_EID; /*!< Ingress Stream counter Index */ 1218 uint16 MaximumServiceDataUnit; /*!< Maximum Service Data Unit */ 1219 uint8 InternalPriorityValue; /*!< Internal Priority Value (IPV) */ 1220 uint8 DropResilience; /*!< New Drop Resilience (DR) to be assigned to the frame, if ODR is 1. */ 1221 Netc_EthSwt_Ip_CutThroughtDisableIdxType CutThrDisable; /*!< Cut-Trought disable */ 1222 Netc_EthSwt_Ip_SDUType SduType; /*!< Service Data Unit type to use for MSDU (Maximum Service Data Unit) field. */ 1223 boolean OverrideIPV; /*!< Override Internal Priority Value (IPV) */ 1224 boolean OverrideDR; /*!< Override Drop Resilience (DR) */ 1225 boolean TimeStampCaptureEnable; /*!< Timestamp Capture Enable */ 1226 boolean IngressMirroringEnable; /*!< Ingress Mirroring Enable */ 1227 boolean OverrideStreamGateInstanceEID; /*!< Override Stream Gate Instance Entry ID */ 1228 boolean OverrideRatePolicerInstanceEID; /*!< Override Rate Policer (instance) ID. */ 1229 } Netc_EthSwt_Ip_IngressStreamFilterTableCFGEDataType; 1230 1231 1232 /*! 1233 * @brief Define Ingress Stream Counter entries 1234 */ 1235 typedef struct 1236 { 1237 uint32 RxCount; /*!< Receive Count. */ 1238 uint32 MSduDropCount; /*!< MSDU (Maximum Service Data Unit) Drop Count. */ 1239 uint32 PolicerDropCount; /*!< Policer Drop Count. */ 1240 uint32 StreamGateDropCount; /*!< Stream Gating Drop Count. */ 1241 } Netc_EthSwt_Ip_IngressStreamCountTableSTSEDataType; 1242 1243 /*! 1244 * @implements Netc_EthSwt_Ip_IngressStreamCountTableRspDataType_struct 1245 */ 1246 typedef struct 1247 { 1248 uint32 IngressStreamCountId; 1249 Netc_EthSwt_Ip_IngressStreamCountTableSTSEDataType IngressStreamCountStseData; 1250 } Netc_EthSwt_Ip_IngressStreamCountTableRspDataType; 1251 1252 /*! 1253 * @brief Ingress Stream Filter Table KEYE_DATA Format. 1254 */ 1255 typedef struct { 1256 uint32 IngressStream_EID; /*!< Ingress Stream Entry ID */ 1257 uint8 Pcp; /*!< Priority Code Point. Outer VLAN TAG PCP of the received frame */ 1258 } Netc_EthSwt_Ip_IngressStreamFilterTableKEYEDataType; 1259 1260 /*! 1261 * @brief defines Ingress Stream Filter entries. 1262 * @implements Netc_EthSwt_Ip_IngressStreamFilterEntryDataType_struct 1263 */ 1264 typedef struct 1265 { 1266 Netc_EthSwt_Ip_IngressStreamFilterTableCFGEDataType IngressStreamFilterCfgeData; /* CFGE Data */ 1267 Netc_EthSwt_Ip_IngressStreamFilterTableKEYEDataType IngressStreamFilterKeyeData; /* KEYE Data */ 1268 uint32 IngressStreamFilterEntryId; /* Entry ID */ 1269 } Netc_EthSwt_Ip_IngressStreamFilterEntryDataType; 1270 1271 /*! 1272 * @brief defines Stream Gate Instance entries. 1273 * @implements Netc_EthSwt_Ip_StreamGateInstanceEntryDataType_struct 1274 */ 1275 typedef struct 1276 { 1277 uint32 SGIEntryId; /* Stream Gate Instance Entry ID */ 1278 uint32 AdminSGCLEntryId; /* Administrative Stream Gate Control List Entry ID */ 1279 uint64 AdminBaseTime; /* Admin Base Time */ 1280 uint32 AdminCycleTimeExt; /* Admin Cycle Time Extension */ 1281 Netc_EthSwt_Ip_SGITABLE_GateStateType Icfge_Gst; /* Gate State */ 1282 boolean Icfge_Ctd; /* Cut-Through Disable Flag */ 1283 uint8 Icfge_Ipv; /* Internal Priority Value (IPV) */ 1284 Netc_EthSwt_Ip_SDUType SduType; /* Protocol/Service Data Unit) */ 1285 boolean Icfge_Oipv; /* Override Internal Priority Value (IPV) */ 1286 boolean Cfge_Oexen; /* Octets Exceeded Enable */ 1287 boolean Cfge_Irxen; /* Invalid Receive Enable */ 1288 } Netc_EthSwt_Ip_StreamGateInstanceEntryDataType; 1289 1290 /*! 1291 * @brief defines Stream Gate Instance entries response data type. 1292 * @implements Netc_EthSwt_Ip_StreamGateInstanceEntryRspDataType_struct 1293 */ 1294 typedef struct 1295 { 1296 uint32 SGIEntryId; /* Stream Gate Instance Entry ID */ 1297 uint32 OperationalSGCLEntryID; /* Operational Stream Gate Control List Entry ID */ 1298 uint64 ConfigChangeTime; /* Configuration Change Time */ 1299 uint64 OperationalBaseTime; /* Operational Base Time */ 1300 uint32 OperationalCycleTimeExt; /* Oper Cycle Time Extension */ 1301 uint8 SGISEOex; /* Octets Exceeded Flag */ 1302 uint8 SGISEIrx; /* Invalid Receive Flag */ 1303 uint8 SGISEState; /* Current Gate Instance State */ 1304 uint32 AdminSGCLEntryId; /* Administrative Stream Gate Control List Entry ID */ 1305 uint64 AdminBaseTime; /* Admin Base Time */ 1306 uint32 AdminCycleTimeExt; /* Admin Cycle Time Extension */ 1307 Netc_EthSwt_Ip_SGITABLE_GateStateType Icfge_Gst; /* Gate State */ 1308 boolean Icfge_Ctd; /* Cut-Through Disable Flag */ 1309 uint8 Icfge_Ipv; /* Internal Priority Value (IPV) */ 1310 Netc_EthSwt_Ip_SDUType SduType; /* Protocol/Service Data Unit) */ 1311 boolean Icfge_Oipv; /* Override Internal Priority Value (IPV) */ 1312 boolean Cfge_Oexen; /* Octets Exceeded Enable */ 1313 boolean Cfge_Irxen; /* Invalid Receive Enable */ 1314 } Netc_EthSwt_Ip_StreamGateInstanceEntryRspDataType; 1315 1316 /*! 1317 * @brief defines Stream Gate Control List entries data type. 1318 */ 1319 typedef struct 1320 { 1321 uint32 SGCL_TimeInterval; /* Time Interval for Gate Entry i */ 1322 uint32 SGCL_IntervalOctetsMax; /* Interval Octets Maximum for Gate Entry i, */ 1323 uint8 SGCL_Ipv; /* Internal Priority Value for Gate Entry i */ 1324 boolean SGCL_Oipv; /* Override Internal Priority Value for Gate Entry i */ 1325 boolean SGCL_Ctd; /* Cut Through Disable for Gate Entry i */ 1326 boolean SGCL_IntervalOctetMaxEnable; /* Interval Octet Maximum Enabled for Gate Entry i, */ 1327 Netc_EthSwt_Ip_SGITABLE_GateStateType SGCL_GateState; /* Gate State for Gate Entry i, */ 1328 } Netc_EthSwt_Ip_SGCLEntriesDataType; 1329 1330 /*! 1331 * @brief defines Stream Gate Control List table data type. 1332 * @implements Netc_EthSwt_Ip_SGCLTableDataType_struct 1333 */ 1334 typedef struct 1335 { 1336 uint32 SGCLEntryId; /* Stream Gate Control List Entry ID */ 1337 uint32 Cfge_CycleTime; /* This field specifies the cycle time of the stream gate control list. */ 1338 uint8 Cfge_ListLength; /* This field indicates the number of entries in the stream gate control list. */ 1339 uint8 Cfge_ExtIpv; /* List Extension Internal Priority Value */ 1340 boolean Cfge_ExtOIPV; /* Extension Override Internal Priority Value */ 1341 boolean Cfge_ExtCtd; /* Extension Cut Through Disabled. 0b = No action. 1b = Cut-through disabled. */ 1342 Netc_EthSwt_Ip_SGITABLE_GateStateType Cfge_ExtGtst; /* Extension Gate State */ 1343 Netc_EthSwt_Ip_SGCLEntriesDataType *ListEntries; /* Stream Gate Control List entries pointer */ 1344 Netc_EthSwt_Ip_SGCLTABLE_RefCountType Sgclse_RefCount; /* Ref count, an element in response data buffer */ 1345 } Netc_EthSwt_Ip_SGCLTableDataType; 1346 1347 /*! 1348 * @brief defines Ingress Sequence Generation table data type. 1349 * @implements Netc_EthSwt_Ip_ISQGTableDataType_struct 1350 */ 1351 typedef struct 1352 { 1353 uint32 ISQGEntryId; /* Ingress Sequence Generation table Entry ID */ 1354 Netc_EthSwt_Ip_ISQGTABLE_SQTagType Cfge_SQTagType; /* This field specifies the sequence tag type to insert for sequence generation. */ 1355 uint16 Sgse_SQGNum; /* This field specifies the next sequence number value to be used in the tag to be added to the frame. */ 1356 } Netc_EthSwt_Ip_ISQGTableDataType; 1357 1358 /*! 1359 * @brief defines Egress Sequence Recovery table request data type. 1360 * @implements Netc_EthSwt_Ip_EgrSeqRecoveryTableDataType_struct 1361 */ 1362 typedef struct 1363 { 1364 uint32 EgrSeqRecEntryId; /* egress sequence recovery table Entry ID */ 1365 uint8 Cfge_SQTag; /* Sequence Tag */ 1366 uint8 Cfge_SQRHisLen; /* Sequence Recovery History Length */ 1367 uint16 Cfge_SQRFutureWinLen; /* Sequence Recovery Future Window LengthThis */ 1368 uint16 Cfge_SQRTimeOutPeriod; /* Sequence Timeout Period */ 1369 Netc_EthSwt_Ip_ESQRTABLE_CFGE_SQRTnsqIdxType Cfge_SqrTnsq; /* Sequence Recovery Take No Sequence */ 1370 Netc_EthSwt_Ip_ESQRTABLE_CFGE_SQRAlgIdxType Cfge_SqrAlg; /* Sequence Recovery Algorithm */ 1371 Netc_EthSwt_Ip_ESQRTABLE_CFGE_SQRTypeIdxType Cfge_SqrType; /* Sequence Recovery Function type */ 1372 } Netc_EthSwt_Ip_EgrSeqRecoveryTableDataType; 1373 1374 /*! 1375 * @brief defines Egress Sequence Recovery table response data type. 1376 * @implements Netc_EthSwt_Ip_EgrSeqRecoveryTableRspDataType_struct 1377 */ 1378 typedef struct 1379 { 1380 uint32 EgrSeqRecEntryId; /* egress sequence recovery table Entry ID */ 1381 uint64 Stse_InOrderPkts; /* In Order Packets */ 1382 uint64 Stse_OutOfOrderPkts; /* Out of Order Packets */ 1383 uint64 Stse_RoguePkts; /* Rogue Packets */ 1384 uint64 Stse_DuplicatePkts; /* Duplicate Packets */ 1385 uint64 Stse_LostPkts; /* Lost Packets */ 1386 uint64 Stse_TaglessPkts; /* Tag-Less Packets */ 1387 uint32 Stse_SeqRecResets; /* Sequence Recovery Resets */ 1388 uint32 Srse_SqrHistory[4U]; /* Recovery History */ 1389 uint16 Srse_SqrNum; /* Sequence Recovery Number */ 1390 uint16 Srse_SqrTimeStamp; /* Sequence Recovery Timestamp */ 1391 boolean Srse_LostCntEnable; /* Lost Count Enable */ 1392 uint8 Srse_TakeAny; /* This field is set to 1 when the recovery function is reset, and cleared after the first frame is received. */ 1393 uint8 Cfge_SQTag; /* Sequence Tag */ 1394 uint8 Cfge_SQRHisLen; /* Sequence Recovery History Length */ 1395 uint16 Cfge_SQRFutureWinLen; /* Sequence Recovery Future Window LengthThis */ 1396 uint16 Cfge_SQRTimeOutPeriod; /* Sequence Timeout Period */ 1397 Netc_EthSwt_Ip_ESQRTABLE_CFGE_SQRTnsqIdxType Cfge_SqrTnsq; /* Sequence Recovery Take No Sequence */ 1398 Netc_EthSwt_Ip_ESQRTABLE_CFGE_SQRAlgIdxType Cfge_SqrAlg; /* Sequence Recovery Algorithm */ 1399 Netc_EthSwt_Ip_ESQRTABLE_CFGE_SQRTypeIdxType Cfge_SqrType; /* Sequence Recovery Function type */ 1400 } Netc_EthSwt_Ip_EgrSeqRecoveryTableRspDataType; 1401 1402 /*! 1403 * @brief defines Ingress Stream Identification table request/response data type. 1404 * @implements Netc_EthSwt_Ip_IngrStremIdentificationTableDataType_struct 1405 */ 1406 typedef struct 1407 { 1408 uint32 IngrStreamIdenResumeEntryId; /* Ingress Stream Identification tabel Resume Entry ID */ 1409 uint32 IngrStreamIdenEntryId; /* Ingress Stream Identification tabel Entry ID */ 1410 uint32 IngrStreamEntryId; /* Ingress Stream table Entry ID */ 1411 Netc_EthSwt_Ip_KeyTypeIdxType Keye_Keytype; /* Key type for key construction */ 1412 uint8 Keye_SrcPortId; /* Source port Id */ 1413 Netc_EthSwt_Ip_SrcPortMasqIdxType Keye_Spm; /* Source port masquerading */ 1414 uint32 Keye_FrmKey[4U]; /* Frame portion of the Key */ 1415 }Netc_EthSwt_Ip_IngrStremIdentificationTableDataType; 1416 1417 /*! 1418 * @brief FDB Table CFGE_DATA format enum type. 1419 */ 1420 typedef enum { 1421 NETC_ETHSWT_IP_FDBTABLE_CFGE_PORT_BITMAP_FIELD = 9U, /*!< PORT_BITMAP field in FDB Table CFGE_DATA Format */ 1422 NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD = 10U, /*!< CONFIG field includes TIMECAPE, DYNAMIC etc in FDB Table CFGE_DATA Format */ 1423 NETC_ETHSWT_IP_FDBTABLE_CFGE_ETEID_FIELD = 11U /*!< ET_EID field in FDB Table CFGE_DATA Format */ 1424 } Netc_EthSwt_Ip_FDBTableCFGEDataIndexType; 1425 /* +++bits field and structure for CFGE_DATA format+++ */ 1426 1427 /* +++bits field for KEYE_DATA format+++ */ 1428 /*! 1429 * @brief FDB table config MACC_ADDR_L field. 1430 */ 1431 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_L_SHIFT (0U) 1432 /*! 1433 * @brief FDB table config MACC_ADDR_L field mask. 1434 */ 1435 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_L_MASK (0xFFFFFFFFUL) 1436 /*! 1437 * @brief FDB table config MACC_ADDR_L. 1438 */ 1439 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_L(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_L_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_L_MASK) 1440 1441 /*! 1442 * @brief FDB table config MACC_ADDR_H field. 1443 */ 1444 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_H_SHIFT (0U) 1445 /*! 1446 * @brief FDB table config MACC_ADDR_H field mask. 1447 */ 1448 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_H_MASK (0x0000FFFFUL) 1449 /*! 1450 * @brief FDB table config MACC_ADDR_H. 1451 */ 1452 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_H(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_H_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_H_MASK) 1453 1454 /*! 1455 * @brief FDB table config FID field. 1456 */ 1457 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_FID_SHIFT (0U) 1458 /*! 1459 * @brief FDB table config FID field mask. 1460 */ 1461 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_FID_MASK (0x00000FFFUL) 1462 /*! 1463 * @brief FDB table config FID. 1464 */ 1465 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_FID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_FID_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_FID_MASK) 1466 1467 /*! 1468 * @brief FDB Table KEYE_DATA format. Netc_EthSwt_Ip_FDBTableKEYEDataType 1469 */ 1470 typedef struct { 1471 uint32 MacAddrL; /*!< FDB Mac addr L where the most significant byte of the MAC address is stored */ 1472 uint32 MacAddrH; /*!< FDB Mac addr H */ /* [notice]: just 16 bits */ 1473 uint32 Fid; /*!< FDB Fid */ /* [notice]: just 12 bits */ 1474 } Netc_EthSwt_Ip_FDBTableKEYEDataType; 1475 /* ---bits field for KEYE_DATA format--- */ 1476 1477 /* +++bits field for SEARCH_CRITERIA format+++ */ 1478 /*! 1479 * @brief FDB table search criteria ACTE_MC field. 1480 */ 1481 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTEMC_SHIFT (24U) 1482 /*! 1483 * @brief FDB table search criteria ACTE_MC field mask. 1484 */ 1485 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTEMC_MASK (0x01000000UL) 1486 /*! 1487 * @brief FDB table search criteria ACTE_MC. 1488 */ 1489 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTEMC(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTEMC_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTEMC_MASK) 1490 1491 /*! 1492 * @brief FDB table search criteria CFGE_MC field. 1493 */ 1494 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_CFGEMC_SHIFT (16U) 1495 /*! 1496 * @brief FDB table search criteria CFGE_MC field mask. 1497 */ 1498 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_CFGEMC_MASK (0x00070000UL) 1499 /*! 1500 * @brief FDB table search criteria CFGE_MC. 1501 */ 1502 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_CFGEMC(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_CFGEMC_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_CFGEMC_MASK) 1503 1504 /*! 1505 * @brief FDB table search criteria KEYE_MC field. 1506 */ 1507 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_KEYEMC_SHIFT (8U) 1508 /*! 1509 * @brief FDB table search criteria KEYE_MC field mask. 1510 */ 1511 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_KEYEMC_MASK (0x00000300UL) 1512 /*! 1513 * @brief FDB table search criteria KEYE_MC. 1514 */ 1515 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_KEYEMC(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_KEYEMC_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_KEYEMC_MASK) 1516 1517 /*! 1518 * @brief FDB table search criteria ACTF_LAG field. 1519 */ 1520 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTFLAG_SHIFT (7U) 1521 /*! 1522 * @brief FDB table search criteria ACTF_LAG field mask. 1523 */ 1524 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTFLAG_MASK (0x00000080UL) 1525 /*! 1526 * @brief FDB table search criteria ACTF_LAG. 1527 */ 1528 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTFLAG(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTFLAG_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTFLAG_MASK) 1529 1530 /*! 1531 * @brief FDB table search criteria ACT_CNT field. 1532 */ 1533 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTCNT_SHIFT (0U) 1534 /*! 1535 * @brief FDB table search criteria ACT_CNT field mask. 1536 */ 1537 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTCNT_MASK (0x0000007FUL) 1538 /*! 1539 * @brief FDB table search criteria ACT_CNT. 1540 */ 1541 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTCNT(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTCNT_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTCNT_MASK) 1542 1543 /*! 1544 * @brief FDB Table Match Criteria field data type enumeration. Netc_EthSwt_Ip_FDBTableMatchCriteriaDataType 1545 */ 1546 typedef enum { 1547 NETC_ETHSWT_IP_FDBTABLE_MATCH_ANY_CRITERIA = 0U, /*!< 0x0 = Match Any Criteria. */ 1548 NETC_ETHSWT_IP_FDBTABLE_MATCH_ACTE_DATA_FIELD, /*!< 0x1 = Exact match with ACTE_DATA. */ 1549 NETC_ETHSWT_IP_FDBTABLE_MATCH_CFGE_DYNAMIC_FIELD, /*!< 0x2: Match CFGE_DATA[DYNAMIC] field, will be remapped to 0x1 */ 1550 NETC_ETHSWT_IP_FDBTABLE_MATCH_CFGE_PORTBITMSP_FIELD, /*!< 0x3: Match CFGE_DATA[PORT_BITMAP] field, will be remapped to 0x2 */ 1551 NETC_ETHSWT_IP_FDBTABLE_MATCH_CFGE_DYNAMIC_AND_PORTBITMAP_FIELD, /*!< 0x4: Match CFGE_DATA[DYNAMIC & PORT_BITMAP] field, will be remapped to 0x3 */ 1552 NETC_ETHSWT_IP_FDBTABLE_MATCH_KEYE_FID_FIELD, /*!< 0x5: Match KEYE_DATA[FID] provided, will be remapped to 0x1 */ 1553 NETC_ETHSWT_IP_FDBTABLE_MATCH_KEYE_MULTICAST_BIT_OF_MACADDR, /*!< 0x6: Match KEYE_DATA[MAC_ADDR][MULTICAST], will be remapped to 0x2. 1554 Where the MAC Multicast bit is least significant bit of the most significant byte of the destination MAC address. 1555 KEYE_DATA[MAC_ADDR][MULTICAST] = 0b1, matching entries with multicast mac address 1556 KEYE_DATA[MAC_ADDR][MULTICAST] = 0b0, matching entries with unicast mac address */ 1557 NETC_ETHSWT_IP_FDBTABLE_MATCH_KEYE_FID_AND_MULTICAST_BIT_OF_MACADDR /*!< 0x7: Match KEYE_DATA[FID] and KEYE_DATA[MAC_ADDR][MULTICAST], will be remapped to 0x3. */ 1558 } Netc_EthSwt_Ip_FDBTableMatchCriteriaDataType; 1559 1560 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_MATCH_CRITERIA_ADJUSTING_FACTOR (1U) /*!< for remapping CFGE match criteria flag */ 1561 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_MATCH_CRITERIA_ADJUSTING_FACTOR (4U) /*!< for remapping KEYE match criteria flag */ 1562 1563 /*! 1564 * @brief Multicast bit of Mac Address field. 1565 */ 1566 #define NETC_ETHSWT_IP_MULTICASTBIT_OF_MAC_ADDRESS_SHIFT (0U) 1567 /*! 1568 * @brief Multicast bit of Mac Address field mask. 1569 */ 1570 #define NETC_ETHSWT_IP_MULTICASTBIT_OF_MAC_ADDRESS_MASK (0x00000001UL) 1571 /*! 1572 * @brief Multicast bit of Mac Address. 1573 */ 1574 #define NETC_ETHSWT_IP_MULTICASTBIT_OF_MAC_ADDRESS(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_MULTICASTBIT_OF_MAC_ADDRESS_SHIFT)) & NETC_ETHSWT_IP_MULTICASTBIT_OF_MAC_ADDRESS_MASK) 1575 1576 /*! 1577 * @brief FDB Table CFGE Match Criteria format in SEARCH_CRITERIA. Netc_EthSwt_Ip_FDBTableCFGEMatchDataType 1578 */ 1579 typedef struct { 1580 uint32 SearchPortBitMap; /*!< Fdb table search port bitmap data */ 1581 boolean SearchDynamicEntry; /*!< Fdb table search dynamic field in CFGE_DATA */ 1582 } Netc_EthSwt_Ip_FDBTableCFGEMatchDataType; 1583 1584 /*! 1585 * @brief FDB Table KEYE Match Criteria format in SEARCH_CRITERIA. Netc_EthSwt_Ip_FDBTableKEYEMatchDataType 1586 */ 1587 typedef struct { 1588 uint32 SearchFid; /*!< Fdb table search FID data */ 1589 boolean SearchMulticastMacAddr; /*!< TRUE: search Multicast Mac Address Entries 1590 FALSE: search Unicast Mac Address Entries */ 1591 } Netc_EthSwt_Ip_FDBTableKEYEMatchDataType; 1592 1593 /*! 1594 * @brief FDB Table ACTE_DATA (Activity Element Data) format. Netc_EthSwt_Ip_FDBTableACTEDataType 1595 */ 1596 typedef struct { 1597 uint8 ActivityCounter; /*!< Activity Counter data in ACTE_DATA format */ 1598 boolean ActivityFlag; /*!< Activity Flag data in ACTE_DATA format */ 1599 } Netc_EthSwt_Ip_FDBTableACTEDataType; 1600 1601 /*! 1602 * @brief FDB Table SEARCH_CRITERIA format. Netc_EthSwt_Ip_FDBTableSearchCriteriaDataType 1603 */ 1604 typedef struct { 1605 uint32 SearchResumeEntryId; /*!< Fdb table search criteria resume entry id */ 1606 Netc_EthSwt_Ip_FDBTableMatchCriteriaDataType SearchMatchCriteria; /*!< Fdb table search Match Criteria */ 1607 Netc_EthSwt_Ip_FDBTableACTEDataType SearchActeData; /*!< Fdb table search ACTE data */ 1608 Netc_EthSwt_Ip_FDBTableCFGEMatchDataType SearchCfgeData; /*!< Fdb table search CFGE data */ 1609 Netc_EthSwt_Ip_FDBTableKEYEMatchDataType SearchKeyeData; /*!< Fdb table search KEYE data */ 1610 } Netc_EthSwt_Ip_FDBTableSearchCriteriaDataType; 1611 1612 /*! 1613 * @brief FDB Table SEARCH_CRITERIA format enum type. 1614 * [notes:] the enum starts from 1U because it is the second item in FDB table request data buffer format 1615 */ 1616 typedef enum { 1617 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_RESUMEENTRYID = 1U, /*!< RESUME_ENTRY_ID field in Search Criteria Format */ 1618 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_MACADDRESS_L, /*!< Low part of Mac Address Field of KEYE DATA in Search Criteria Format */ 1619 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_MACADDRESS_H, /*!< High part of Mac Address Field of KEYE DATA in Search Criteria Format */ 1620 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_FID, /*!< FID Field of KEYE DATA in Search Criteria Format */ 1621 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_PORTBITMAP, /*!< Port_Bitmap Field of CFGE DATA in Search Criteria Format */ 1622 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_CFGECONFIG, /*!< Config Field of CFGE DATA in Search Criteria Format */ 1623 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ETEID, /*!< ET_EID Field of CFGE DATA in Search Criteria Format */ 1624 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_MATCHCRITERIA /*!< Match Criteria Field includes ACTE_MC, CFGE_MC etc in Search Criteria Format */ 1625 } Netc_EthSwt_Ip_FDBTableSearchCriteriaDataIndexType; 1626 /* ---bits field for SEARCH_CRITERIA format--- */ 1627 1628 /* +++bits field and structure for FDB Table Request Data Buffer Format+++ */ 1629 /*! 1630 * @brief Switch Tables Request Data Buffer CFGEU field. 1631 */ 1632 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_CFGEU_SHIFT (0U) 1633 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_CFGEU_MASK (0x00000001UL) 1634 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_CFGEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_CFGEU_SHIFT)) & NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_CFGEU_MASK) 1635 1636 /*! 1637 * @brief Rate Policer Table Request Data Buffer FEEU field. 1638 */ 1639 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_FEEU_SHIFT (1U) 1640 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_FEEU_MASK (0x00000002UL) 1641 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_FEEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_FEEU_SHIFT)) & NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_FEEU_MASK) 1642 1643 /*! 1644 * @brief Rate Policer Table Request Data Buffer PSEU field. 1645 */ 1646 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_PSEU_SHIFT (2U) 1647 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_PSEU_MASK (0x00000004UL) 1648 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_PSEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_PSEU_SHIFT)) & NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_PSEU_MASK) 1649 1650 /*! 1651 * @brief Rate Policer Table Request Data Buffer STSEU field. 1652 */ 1653 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT (3U) 1654 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK (0x00000008UL) 1655 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_STSEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT)) & NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK) 1656 1657 /*! 1658 * @brief FDB table Request Data Buffer ACTEU field. 1659 */ 1660 #define NETC_ETHSWT_IP_FDBTABLE_REQFMT_ACTIONS_FIELD_ACTEU_SHIFT (1U) 1661 #define NETC_ETHSWT_IP_FDBTABLE_REQFMT_ACTIONS_FIELD_ACTEU_MASK (0x00000002UL) 1662 #define NETC_ETHSWT_IP_FDBTABLE_REQFMT_ACTIONS_FIELD_ACTEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_REQFMT_ACTIONS_FIELD_ACTEU_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_REQFMT_ACTIONS_FIELD_ACTEU_MASK) 1663 1664 /*! 1665 * @brief Ingress Sequence Generation Table Request Data Buffer SGSEU field. 1666 */ 1667 #define NETC_ETHSWT_IP_ISQGTABLE_REQFMT_ACTIONS_FIELD_SGSEU_SHIFT (1U) 1668 #define NETC_ETHSWT_IP_ISQGTABLE_REQFMT_ACTIONS_FIELD_SGSEU_MASK (0x00000002UL) 1669 #define NETC_ETHSWT_IP_ISQGTABLE_REQFMT_ACTIONS_FIELD_SGSEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ISQGTABLE_REQFMT_ACTIONS_FIELD_SGSEU_SHIFT)) & NETC_ETHSWT_IP_ISQGTABLE_REQFMT_ACTIONS_FIELD_SGSEU_MASK) 1670 1671 /*! 1672 * @brief Egress Sequence Recovery Table Request Data Buffer STSEU field. 1673 */ 1674 #define NETC_ETHSWT_IP_ESQRTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT (1U) 1675 #define NETC_ETHSWT_IP_ESQRTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK (0x00000002UL) 1676 #define NETC_ETHSWT_IP_ESQRTABLE_REQFMT_ACTIONS_FIELD_STSEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ESQRTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT)) & NETC_ETHSWT_IP_ESQRTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK) 1677 1678 /*! 1679 * @brief Egress Sequence Recovery Table Request Data Buffer SRSEU field. 1680 */ 1681 #define NETC_ETHSWT_IP_ESQRTABLE_REQFMT_ACTIONS_FIELD_SRSEU_SHIFT (2U) 1682 #define NETC_ETHSWT_IP_ESQRTABLE_REQFMT_ACTIONS_FIELD_SRSEU_MASK (0x00000004UL) 1683 #define NETC_ETHSWT_IP_ESQRTABLE_REQFMT_ACTIONS_FIELD_SRSEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ESQRTABLE_REQFMT_ACTIONS_FIELD_SRSEU_SHIFT)) & NETC_ETHSWT_IP_ESQRTABLE_REQFMT_ACTIONS_FIELD_SRSEU_MASK) 1684 1685 /*! 1686 * @brief Switch Tables Request Data Buffer DEBUG_OPTIONS field. 1687 */ 1688 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_DEBUG_OPTIONS_SHIFT (16U) 1689 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_DEBUG_OPTIONS_MASK (0x00FF0000UL) 1690 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_DEBUG_OPTIONS(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_DEBUG_OPTIONS_SHIFT)) & NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_DEBUG_OPTIONS_MASK) 1691 /*! 1692 * @brief Switch Tables Request Data Buffer QUERY_ACTIONS field. 1693 */ 1694 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS_SHIFT (24U) 1695 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS_MASK (0x0F000000UL) 1696 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS_SHIFT)) & NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS_MASK) 1697 1698 /*! 1699 * @brief Switch Tables Request Data Buffer TABLE_VERSION field. 1700 */ 1701 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSION_SHIFT (28U) 1702 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSION_MASK (0xF0000000UL) 1703 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSIONS(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSION_SHIFT)) & NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSION_MASK) 1704 1705 /*! 1706 * @brief Request and Response Data Buffer Format of Tables supported by Switch. 1707 */ 1708 typedef struct { 1709 uint32 TableDataField[NETC_ETHSWT_IP_TABLEDATA_BUFFER_LENGTH]; /*!< the request and response data buffer share the same memory */ 1710 } Netc_EthSwt_Ip_SwitchTableDataType; 1711 1712 1713 /*! 1714 * @brief FDB Table response data type enumeration. Netc_EthSwt_Ip_FDBTable_ResponsDataIndexType 1715 */ 1716 typedef enum { 1717 NETC_ETHSWT_FDBTABLE_RSPDATA_STATUS = 0x0U, /*!< Status Field In FDB Table Response Data Buffer */ 1718 NETC_ETHSWT_FDBTABLE_RSPDATA_ENTRYID, /*!< Entry_ID Field In FDB Table Response Data Buffer */ 1719 NETC_ETHSWT_FDBTABLE_RSPDATA_MACADDRESS_L, /*!< Low part of Mac Address Field of KEYE DATA In FDB Table Response Data Buffer */ 1720 NETC_ETHSWT_FDBTABLE_RSPDATA_MACADDRESS_H, /*!< High part of Mac Address Field of KEYE DATA In FDB Table Response Data Buffer */ 1721 NETC_ETHSWT_FDBTABLE_RSPDATA_FID, /*!< FID Field of KEYE DATA In FDB Table Response Data Buffer */ 1722 NETC_ETHSWT_FDBTABLE_RSPDATA_PORTBITMAP, /*!< Port_Bitmap Field of CFGE DATA In FDB Table Response Data Buffer */ 1723 NETC_ETHSWT_FDBTABLE_RSPDATA_CFGECONFIG, /*!< Config Field of CFGE DATA In FDB Table Response Data Buffer */ 1724 NETC_ETHSWT_FDBTABLE_RSPDATA_ETEID, /*!< ET_EID Field of CFGE DATA In FDB Table Response Data Buffer */ 1725 NETC_ETHSWT_FDBTABLE_RSPDATA_ACTEDATA /*!< ACTE Data Field In FDB Table Response Data Buffer */ 1726 } Netc_EthSwt_Ip_FDBTable_ResponsDataIndexType; 1727 /* ---bits field and structure for FDB Table Request Data Buffer Format--- */ 1728 1729 /* index of Ingress Count Table Request Data Buffer Format */ 1730 #define NETC_ETHSWT_IP_INGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD (0U) /*!< first uint32 item of Ingress Count Table Request Data Buffer Format */ 1731 #define NETC_ETHSWT_IP_INGRESSCOUNTTABLE_REQFMT_ACCESSKEY_FIELD (1U) /*!< second uint32 item of Ingress Count Table Request Data Buffer Format */ 1732 1733 /*! 1734 * @brief Data fields in Ingress Count Table Request Data Buffer Format. 1735 */ 1736 #define NETC_ETHSWT_IP_INGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT (0U) 1737 #define NETC_ETHSWT_IP_INGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK (0x00000001UL) 1738 #define NETC_ETHSWT_IP_INGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_INGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT)) & NETC_ETHSWT_IP_INGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK) 1739 1740 /* index of Egress Count Table Request Data Buffer Format */ 1741 #define NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD (0U) /*!< first uint32 item of Egress Count Table Request Data Buffer Format */ 1742 #define NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACCESSKEY_FIELD (1U) /*!< second uint32 item of Egress Count Table Request Data Buffer Format */ 1743 1744 /*! 1745 * @brief Data fields in Egress Count Table Request Data Buffer Format. 1746 */ 1747 #define NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT (0U) 1748 #define NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK (0x00000001UL) 1749 #define NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT)) & NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK) 1750 1751 /* index of data fields in FDB Table Response Action Buffer Format, ACT_FLAG */ 1752 #define NETC_ETHSWT_IP_FDBTABLE_REPFMT_ACTE_DATA_FIELD_ACT_FLAG_INACTIVE_FIELD (0U) /*!< FDB table entry was not active during this time period */ 1753 #define NETC_ETHSWT_IP_FDBTABLE_REPFMT_ACTE_DATA_FIELD_ACT_FLAG_ACTIVE_FIELD (1U) /*!< FDB table entry was active during this time period */ 1754 1755 /*! 1756 * @brief Data fields in FDB Table Response Action Buffer Format, ACT_FLAG. 1757 */ 1758 #define NETC_ETHSWT_IP_FDBTABLE_REPFMT_ACTE_DATA_FIELD_ACT_FLAG_SHIFT (7U) 1759 #define NETC_ETHSWT_IP_FDBTABLE_REPFMT_ACTE_DATA_FIELD_ACT_FLAG_MASK (0x00000080UL) 1760 #define NETC_ETHSWT_IP_FDBTABLE_REPFMT_ACTE_DATA_FIELD_ACT_FLAG(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT)) & NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK) 1761 1762 /*! 1763 * @brief Data fields in FDB Table Response Action Buffer Format, ACT_CNT. 1764 */ 1765 #define NETC_ETHSWT_IP_FDBTABLE_REPFMT_ACTE_DATA_FIELD_ACT_CNT_SHIFT (0U) 1766 #define NETC_ETHSWT_IP_FDBTABLE_REPFMT_ACTE_DATA_FIELD_ACT_CNT_MASK (0x0000007FUL) 1767 #define NETC_ETHSWT_IP_FDBTABLE_REPFMT_ACTE_DATA_FIELD_ACT_CNT(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT)) & NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK) 1768 1769 /*! 1770 * @brief Egress Count Table update actions data type enumeration. Netc_EthSwt_Ip_ECTableUpdateActionsDataType 1771 */ 1772 typedef enum { 1773 NETC_ETHSWT_EGRESSCOUNTTABLE_NO_UPDATE_STATISTICS_ELEMENT = 0U, /*!< No update performed to the Statistics Element */ 1774 NETC_ETHSWT_EGRESSCOUNTTABLE_RESET_STATISTICS_ELEMENT /*!< All counters within the Statistics Element are reset */ 1775 } Netc_EthSwt_Ip_ECTableUpdateActionsDataType; 1776 1777 typedef enum { 1778 NETC_ETHSWT_INGRESSCOUNTTABLE_NO_UPDATE_STATISTICS_ELEMENT = 0U, /*!< No update performed to the Statistics Element */ 1779 NETC_ETHSWT_INGRESSCOUNTTABLE_RESET_STATISTICS_ELEMENT /*!< All counters within the Statistics Element are reset */ 1780 } Netc_EthSwt_Ip_ICTableUpdateActionsDataType; 1781 1782 /*! 1783 * @brief Statistics data of Egress Count Table in response data buffer. Netc_EthSwt_Ip_ECTableStatisticsDataType 1784 * @implements Netc_EthSwt_Ip_ECTableStatisticsDataType_struct 1785 */ 1786 typedef struct { 1787 uint64 EnqueuedFrmCnt; /*!< Enqueued Frame Count data, the number of frames enqueued on egress class queues */ 1788 uint64 RejectedFrmCnt; /*!< Rejected Frame Count data, he number of frames rejected in egress class queues, due to tail drop */ 1789 } Netc_EthSwt_Ip_ECTableStatisticsDataType; 1790 1791 /*! 1792 * @brief Egress Count Table response data type enumeration. Netc_EthSwt_Ip_EgressCountTable_RspDataIndexType 1793 */ 1794 typedef enum { 1795 NETC_ETHSWT_ECTABLE_RSPDATA_ENTRYID = 0x0U, /*!< Entry Id Field In Egress Count Table Response Data Buffer */ 1796 NETC_ETHSWT_ECTABLE_RSPDATA_ENQFRMCNT_L, /*!< Lower 32bits of Enqueued Frame Count Field In Egress Count Table Response Data Buffer */ 1797 NETC_ETHSWT_ECTABLE_RSPDATA_ENQFRMCNT_H, /*!< Higher 32bits of Enqueued Frame Count Field In Egress Count Table Response Data Buffer */ 1798 NETC_ETHSWT_ECTABLE_RSPDATA_REJFRMCNT_L, /*!< Lower 32bits of Rejected Frame Count Field In Egress Count Table Response Data Buffer */ 1799 NETC_ETHSWT_ECTABLE_RSPDATA_REJFRMCNT_H /*!< Higher 32bits of Rejected Frame Count Field In Egress Count Table Response Data Buffer */ 1800 } Netc_EthSwt_Ip_EgressCountTable_RspDataIndexType; 1801 1802 /*! 1803 * @brief EFM_DATA_LEN field in Egress Treatment Table CFGE_DATA format. 1804 */ 1805 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_DATA_LEN_SHIFT (16U) 1806 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_DATA_LEN_MASK (0x07FF0000UL) 1807 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_DATA_LEN(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_DATA_LEN_SHIFT)) & NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_DATA_LEN_MASK) 1808 1809 /*! 1810 * @brief EFM_LEN_CHANGE field in Egress Treatment Table CFGE_DATA format. 1811 */ 1812 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_LEN_CHANGE_SHIFT (9U) 1813 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_LEN_CHANGE_MASK (0x0000FE00UL) 1814 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_LEN_CHANGE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_LEN_CHANGE_SHIFT)) & NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_LEN_CHANGE_MASK) 1815 1816 /*! 1817 * @brief ECA field in Egress Treatment Table CFGE_DATA format. 1818 */ 1819 #define NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_COUNTER_ACTION_SHIFT (6U) 1820 #define NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_COUNTER_ACTION_MASK (0x000001C0UL) 1821 #define NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_COUNTER_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_COUNTER_ACTION_SHIFT)) & NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_COUNTER_ACTION_MASK) 1822 1823 /*! 1824 * @brief ESQA field in Egress Treatment Table CFGE_DATA format. 1825 */ 1826 #define NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_SEQUENCE_ACTION_SHIFT (4U) 1827 #define NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_SEQUENCE_ACTION_MASK (0x00000030UL) 1828 #define NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_SEQUENCE_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_SEQUENCE_ACTION_SHIFT)) & NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_SEQUENCE_ACTION_MASK) 1829 1830 /*! 1831 * @brief EFM_MODE field in Egress Treatment Table CFGE_DATA format. 1832 */ 1833 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_MODE_SHIFT (0U) 1834 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_MODE_MASK (0x00000003UL) 1835 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_MODE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_MODE_SHIFT)) & NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_MODE_MASK) 1836 1837 /*! 1838 * @brief Egress Treatment Table egress counter action data type definitions. 1839 */ 1840 typedef uint32 Netc_EthSwt_Ip_EgressTreatmentTableCounterActionType; 1841 #define NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_NOT_INCREMENT_EGRESSFRMCOUNTER (0x0U) /*!< Do not increment egress frame counter */ 1842 #define NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_INCREMENT_EGRESSFRMCOUNTER (0x1U) /*!< Increment egress frame counter */ 1843 1844 /*! 1845 * @brief Egress Treatment Table egress sequence actions data type definitions. 1846 */ 1847 typedef uint32 Netc_EthSwt_Ip_EgressTreatmentTableSequenceActionType; 1848 #define NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_NO_SEQUENCE_ACTION_REQUIRED (0x0U) /*!< No Sequence Action required */ 1849 #define NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_SEQUENCE_RECOVERY_ACTION (0x2U) /*!< Sequence Recovery action */ 1850 1851 /*! 1852 * @brief Egress Treatment Table egress frame modification mode data type definitions. 1853 */ 1854 typedef uint32 Netc_EthSwt_Ip_EgressTreatmentTableFrmModificationModeType; 1855 #define NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_DEFAULT_FRM_MODIFICATION_MODE (0x0U) /*!< Normal/Default mode */ 1856 #define NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_L2ACTION_FRM_MODIFICATION_MODE (0x1U) /*!< When EFM_EID[L2_ACT]=1b */ 1857 #define NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_PAYLOADACTION_FRM_MODIFICATION_MODE (0x2U) /*!< When EFM_EID[PLD_ACT]=001b */ 1858 1859 /*! 1860 * @brief Egress Treatment Table response data type enumeration. Netc_EthSwt_Ip_EgressTreatmentTable_RspDataIndexType 1861 */ 1862 typedef enum { 1863 NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_RSPFMT_ENTRYID_FIELD = 0U, /*!< first uint32 item of Egress Treatment Table Response Data Buffer Format */ 1864 NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_RSPFMT_CFGEDATA0, /*!< first item of CFGEDATA but second item of Egress Treatment Table Response Data Buffer Format */ 1865 NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_RSPFMT_CFGEDATA1, /*!< second item of CFGEDATA but third item of Egress Treatment Table Response Data Buffer Format */ 1866 NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_RSPFMT_CFGEDATA2, /*!< third item of CFGEDATA but forth item of Egress Treatment Table Response Data Buffer Format */ 1867 NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_RSPFMT_CFGEDATA3 /*!< forth item of CFGEDATA but fifth item of Egress Treatment Table Response Data Buffer Format */ 1868 } Netc_EthSwt_Ip_EgressTreatmentTable_RspDataIndexType; 1869 1870 /*! 1871 * @brief defines Egress Treatment Table entries. 1872 * @implements Netc_EthSwt_Ip_EgressTreatmentEntryDataType_struct 1873 */ 1874 typedef struct 1875 { 1876 uint32 EgressTreatmentEntryID; /*!< Egress Treatment Table Entry ID */ 1877 uint32 EgressSeqActionsTargetEID; /*!< Egress Sequence Actions Target Entry ID */ 1878 uint32 EgressCountTableEID; /*!< Egress Count Table Entry ID */ 1879 uint32 EgressFrmModificationEID; /*!< Egress Frame Modification Entry ID */ 1880 uint16 EgressFrmModificationDataLength; /*!< Egress Frame Modification Data Length */ 1881 uint8 EgressFrmModificationLengthChange; /*!< Egress Frame Modification Length Change */ 1882 Netc_EthSwt_Ip_EgressTreatmentTableCounterActionType EgressCounterAction; /*!< Egress Counter Action */ 1883 Netc_EthSwt_Ip_EgressTreatmentTableSequenceActionType EgressSequenceAction; /*!< Egress Sequence Actions */ 1884 Netc_EthSwt_Ip_EgressTreatmentTableFrmModificationModeType EgressFrmModificationMode; /*!< Egress Frame Modification Mode */ 1885 } Netc_EthSwt_Ip_EgressTreatmentEntryDataType; 1886 1887 /*! 1888 * @brief DEST_MAC_ADDR (most significant portion) field in Frame Modification Table CFGE_DATA format. 1889 */ 1890 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_DEST_MAC_ADDR_H_SHIFT (16U) 1891 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_DEST_MAC_ADDR_H_MASK (0xFFFF0000UL) 1892 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_DEST_MAC_ADDR_H(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_DEST_MAC_ADDR_H_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_DEST_MAC_ADDR_H_MASK) 1893 1894 /*! 1895 * @brief SMAC_PORT field in Frame Modification Table CFGE_DATA format. 1896 */ 1897 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SRC_MAC_ADDR_PORT_SHIFT (11U) 1898 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SRC_MAC_ADDR_PORT_MASK (0x0000F800UL) 1899 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SRC_MAC_ADDR_PORT(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SRC_MAC_ADDR_PORT_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SRC_MAC_ADDR_PORT_MASK) 1900 1901 /*! 1902 * @brief SQT_ACT field in Frame Modification Table CFGE_DATA format. 1903 */ 1904 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SEQUENCE_TAG_ACTION_SHIFT (8U) 1905 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SEQUENCE_TAG_ACTION_MASK (0x00000700UL) 1906 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SEQUENCE_TAG_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SEQUENCE_TAG_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SEQUENCE_TAG_ACTION_MASK) 1907 1908 /*! 1909 * @brief OUTER_VID_ACT field in Frame Modification Table CFGE_DATA format. 1910 */ 1911 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VID_ACTION_SHIFT (6U) 1912 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VID_ACTION_MASK (0x000000C0UL) 1913 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VID_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VID_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VID_ACTION_MASK) 1914 1915 /*! 1916 * @brief VLAN_HDR_ACT field in Frame Modification Table CFGE_DATA format. 1917 */ 1918 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_VLAN_HEADER_ACTION_SHIFT (4U) 1919 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_VLAN_HEADER_ACTION_MASK (0x00000030UL) 1920 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_VLAN_HEADER_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_VLAN_HEADER_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_VLAN_HEADER_ACTION_MASK) 1921 1922 /*! 1923 * @brief MAC_HDR_ACT field in Frame Modification Table CFGE_DATA format. 1924 */ 1925 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_MAC_HEADER_ACTION_SHIFT (1U) 1926 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_MAC_HEADER_ACTION_MASK (0x0000000EUL) 1927 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_MAC_HEADER_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_MAC_HEADER_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_MAC_HEADER_ACTION_MASK) 1928 1929 /*! 1930 * @brief L2_ACT field in Frame Modification Table CFGE_DATA format. 1931 */ 1932 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_LAYER2_ACTION_SHIFT (0U) 1933 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_LAYER2_ACTION_MASK (0x00000001UL) 1934 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_LAYER2_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_LAYER2_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_LAYER2_ACTION_MASK) 1935 1936 /*! 1937 * @brief PLD_ACT field in Frame Modification Table CFGE_DATA format. 1938 */ 1939 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_ACTION_SHIFT (24U) 1940 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_ACTION_MASK (0x07000000UL) 1941 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_ACTION_MASK) 1942 1943 /*! 1944 * @brief OUTER_DEI_ACT field in Frame Modification Table CFGE_DATA format. 1945 */ 1946 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_DEI_ACTION_SHIFT (22U) 1947 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_DEI_ACTION_MASK (0x00C00000UL) 1948 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_DEI_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_DEI_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_DEI_ACTION_MASK) 1949 1950 /*! 1951 * @brief OUTER_PCP_ACT field in Frame Modification Table CFGE_DATA format. 1952 */ 1953 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_PCP_ACTION_SHIFT (19U) 1954 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_PCP_ACTION_MASK (0x00380000UL) 1955 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_PCP_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_PCP_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_PCP_ACTION_MASK) 1956 1957 /*! 1958 * @brief OUTER_TPID_ACT field in Frame Modification Table CFGE_DATA format. 1959 */ 1960 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_TPID_ACTION_SHIFT (16U) 1961 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_TPID_ACTION_MASK (0x00070000UL) 1962 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_TPID_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_TPID_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_TPID_ACTION_MASK) 1963 1964 /*! 1965 * @brief OUTER_VLAN_DEI field in Frame Modification Table CFGE_DATA format. 1966 */ 1967 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_DEI_SHIFT (15U) 1968 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_DEI_MASK (0x00008000UL) 1969 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_DEI(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_DEI_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_DEI_MASK) 1970 1971 /*! 1972 * @brief OUTER_VLAN_PCP field in Frame Modification Table CFGE_DATA format. 1973 */ 1974 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_PCP_SHIFT (12U) 1975 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_PCP_MASK (0x00007000UL) 1976 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_PCP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_PCP_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_PCP_MASK) 1977 1978 /*! 1979 * @brief OUTER_VLAN_VID field in Frame Modification Table CFGE_DATA format. 1980 */ 1981 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_VID_SHIFT (0U) 1982 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_VID_MASK (0x00000FFFUL) 1983 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_VID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_VID_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_VID_MASK) 1984 1985 /*! 1986 * @brief PLD_OFFSET field in Frame Modification Table CFGE_DATA format. 1987 */ 1988 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_OFFSET_SHIFT (0U) 1989 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_OFFSET_MASK (0x000000FFUL) 1990 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_OFFSET(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_OFFSET_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_OFFSET_MASK) 1991 1992 /*! 1993 * @brief FMD_BYTES field in Frame Modification Table CFGE_DATA format. 1994 */ 1995 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_FRM_MODI_BYTES_SHIFT (0U) 1996 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_FRM_MODI_BYTES_MASK (0x0000FFFFUL) 1997 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_FRM_MODI_BYTES(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_FRM_MODI_BYTES_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_FRM_MODI_BYTES_MASK) 1998 1999 /*! 2000 * @brief Frame Modification Table response data type enumeration. Netc_EthSwt_Ip_FrmModificationTable_RspDataIndexType 2001 */ 2002 typedef enum { 2003 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_ENTRYID_FIELD = 0U, /*!< first uint32 item of Frame modification Table Response Data Buffer Format */ 2004 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_CFGEDATA0, /*!< first item of CFGEDATA but second item of Frame Modification Table Response Data Buffer Format */ 2005 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_CFGEDATA1, /*!< second item of CFGEDATA but third item of Frame Modification Table Response Data Buffer Format */ 2006 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_CFGEDATA2, /*!< third item of CFGEDATA but forth item of Frame Modification Table Response Data Buffer Format */ 2007 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_CFGEDATA3, /*!< forth item of CFGEDATA but fifth item of Frame Modification Table Response Data Buffer Format */ 2008 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_CFGEDATA4, /*!< fifth item of CFGEDATA but sixth item of Frame Modification Table Response Data Buffer Format */ 2009 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_CFGEDATA5 /*!< sixth item of CFGEDATA but seventh item of Frame Modification Table Response Data Buffer Format */ 2010 } Netc_EthSwt_Ip_FrmModificationTable_RspDataIndexType; 2011 2012 /*! 2013 * @brief defines Frame Modification Table entries. 2014 * @implements Netc_EthSwt_Ip_FrmModificationEntryDataType_struct 2015 */ 2016 typedef struct 2017 { 2018 uint32 FrmModificationEntryID; /*!< Frame Modification Table Entry ID */ 2019 uint32 FrmModificationDataEntryID; /*!< Frame Modification Data Table Entry ID */ 2020 uint16 FrmModificationDataBytes; /*!< Frame Modification Data Bytes */ 2021 uint8 DestMacAddr[6U]; /*!< Destination Mac Address, big-endian order */ 2022 uint8 SrcMacAddrRegisterPort; /*!< Source Mace Address Register Port */ 2023 uint8 SequenceTagAction; /*!< Sequence Tag Action */ 2024 uint8 OuterVidActions; /*!< Outer VID Actions */ 2025 uint8 L2HeaderVlanActions; /*!< Layer 2 VLAN Actions */ 2026 uint8 L2HeaderMacActions; /*!< Layer 2 Header Mac Actions */ 2027 uint8 L2Actions; /*!< Layer 2 Actions */ 2028 uint8 PayloadActions; /*!< Payload Actions */ 2029 uint8 OuterDeiAction; /*!< Outer DEI Action */ 2030 uint8 OuterPcpAction; /*!< Outer PCP Action */ 2031 uint8 OuterTpidAction; /*!< Outer TPID Action */ 2032 uint8 OuterVlanDei; /*!< Outer VLAN DEI */ 2033 uint8 OuterVlanPcp; /*!< Outer VLAN PCP */ 2034 uint16 OuterVlanVID; /*!< Outer VLAN VID */ 2035 uint8 PayloadOffset; /*!< Payload Offset */ 2036 } Netc_EthSwt_Ip_FrmModificationEntryDataType; 2037 2038 /*! 2039 * @brief Ingress Port Filter Table CFGE_DATA format enum type. Netc_EthSwt_Ip_IngressPortFilterTableCFGEDataIndexType 2040 */ 2041 typedef enum { 2042 NETC_ETHSWT_IP_INGRESSPORTFILTER_CFGE_CONFIG_FIELD = 54U, /*!< CONFIG field includes IPV, DR, FLTFA etc in Ingress Port Filter Table CFGE_DATA Format */ 2043 NETC_ETHSWT_IP_INGRESSPORTFILTER_CFGE_FLTATGT_FIELD = 55U /*!< FLTA_TGT (Target For Selected Filter Action) field in Ingress Port Filter Table CFGE_DATA Format */ 2044 } Netc_EthSwt_Ip_IngressPortFilterTableCFGEDataIndexType; 2045 2046 /*! 2047 * @brief Ingress Port Filter table CFGE_DATA config field. 2048 */ 2049 /* IPV field */ 2050 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IPV_SHIFT (0U) 2051 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IPV_MASK (0x0000000FUL) 2052 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IPV_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IPV_MASK) 2053 2054 /* OIPV */ 2055 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_OIPV_SHIFT (4U) 2056 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_OIPV_MASK (0x00000010UL) 2057 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_OIPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_OIPV_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_OIPV_MASK) 2058 2059 /* DR */ 2060 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_DR_SHIFT (5U) 2061 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_DR_MASK (0x00000060UL) 2062 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_DR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_DR_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_DR_MASK) 2063 2064 /* ODR */ 2065 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_ODR_SHIFT (7U) 2066 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_ODR_MASK (0x00000080UL) 2067 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_ODR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_ODR_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_ODR_MASK) 2068 2069 /* FLTFA */ 2070 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTFA_SHIFT (8U) 2071 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTFA_MASK (0x00000300UL) 2072 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTFA(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTFA_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTFA_MASK) 2073 2074 /* IMIRE */ 2075 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IMIRE_SHIFT (11U) 2076 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IMIRE_MASK (0x00000800UL) 2077 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IMIRE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IMIRE_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IMIRE_MASK) 2078 2079 /* WOLTE */ 2080 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_WOLTE_SHIFT (12U) 2081 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_WOLTE_MASK (0x00001000UL) 2082 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_WOLTE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_WOLTE_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_WOLTE_MASK) 2083 2084 /* FLTA */ 2085 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTA_SHIFT (13U) 2086 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTA_MASK (0x00006000UL) 2087 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTA(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTA_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTA_MASK) 2088 2089 /* RPR */ 2090 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_RPR_SHIFT (15U) 2091 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_RPR_MASK (0x00018000UL) 2092 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_RPR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_RPR_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_RPR_MASK) 2093 2094 /* CTD */ 2095 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_CTD_SHIFT (17U) 2096 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_CTD_MASK (0x00020000UL) 2097 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_CTD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_CTD_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_CTD_MASK) 2098 2099 /* HR */ 2100 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_HR_SHIFT (18U) 2101 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_HR_MASK (0x003C0000UL) 2102 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_HR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_HR_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_HR_MASK) 2103 2104 /* TIMECAP */ 2105 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_TIMECAP_SHIFT (22U) 2106 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_TIMECAP_MASK (0x00400000UL) 2107 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_TIMECAP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_TIMECAP_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_TIMECAP_MASK) 2108 2109 /*! 2110 * @brief Ingress Port Filter table KEYE_DATA field. 2111 */ 2112 /* DSCP field */ 2113 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DIFFSCP_SHIFT (0U) 2114 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DIFFSCP_MASK (0x0000003FUL) 2115 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DIFFSCP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DIFFSCP_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DIFFSCP_MASK) 2116 2117 /* DSCP Mask field */ 2118 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DSCPMASK_SHIFT (6U) 2119 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DSCPMASK_MASK (0x00000FC0UL) 2120 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DSCPMASK(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DSCPMASK_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DSCPMASK_MASK) 2121 2122 /* SRC_PORT field */ 2123 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPRTID_SHIFT (16U) 2124 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPRTID_MASK (0x001F0000UL) 2125 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPRTID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPRTID_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPRTID_MASK) 2126 2127 /* SRC_PORT Mask field */ 2128 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK_SHIFT (21U) 2129 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK_MASK (0x03E00000UL) 2130 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK_MASK) 2131 2132 /*! 2133 * @brief Ingress Port Filter table Request Data Buffer STSEU field. 2134 */ 2135 #define NETC_ETHSWT_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT (1U) 2136 #define NETC_ETHSWT_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK (0x00000002UL) 2137 #define NETC_ETHSWT_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK) 2138 2139 /*! 2140 * @brief Filter Forwarding Action data type definitions for Ingress Port Filter Table. 2141 */ 2142 typedef uint32 Netc_EthSwt_Ip_CfgeFilterForwardingActionDataType; 2143 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_DISCARDFRAMES (0x0U) /*!< discard frames */ 2144 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_PERMITFRAMES (0x1U) /*!< permit frames */ 2145 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_REDIRECTFRAMES (0x2U) /*!< Redirect frame to switch management port without any frame modification */ 2146 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_COPYFRAMES (0x3U) /*!< Copy frame to switch management port without any frame modification */ 2147 2148 /*! 2149 * @brief Filter Action data type definitions for Ingress Port Filter Table. 2150 */ 2151 typedef uint32 Netc_EthSwt_Ip_CfgeFilterActionDataType; 2152 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_NOACTION (0x0U) /*!< no action */ 2153 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_RATEACTION (0x1U) /*!< Rate action with the Rate Policer Entry ID (RP_EID) set to the value configured in the FLTA_TGT field of this entry */ 2154 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_INGRESSSTREAMIDENTIFICATIONACTION (0x2U) /*!< Ingress stream identification action where the Ingress Stream Entry ID (IS_EID) is set to the value configured in the FLTA_TGT field of this entry */ 2155 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_SETTINGL2FILTERINGSIBITMAP (0x3U) /*!< valid on ENETC side. Setting a pre L2 filtering SI bitmap that will be used by the L2 filtering function to determine the final SI bitmap */ 2156 2157 /*! 2158 * @brief defines Ingress Port Filter Table CFGE_DATA type. 2159 */ 2160 typedef struct 2161 { 2162 uint32 CfgeTargetForSelectedFilterAction; /*!< FLTA_TGT filed in CFGE_DATA format */ 2163 uint8 CfgeIpv; /*!< IPV (internal priority value) filed in CFGE_DATA format */ 2164 uint8 CfgeDr; /*!< DR (drop resilience) field in CFGE_DATA format */ 2165 uint8 CfgeRelativePrecedentResolution; /*!< RPR field in CFGE_DATA format */ 2166 uint8 CfgeHostReason; /*!< HR field in CFGE_DATA format */ 2167 boolean CfgeOverrideIpv; /*!< OIPV (override internal priority value) field in CFGE_DATA format*/ 2168 boolean CfgeOverrideDr; /*!< ODR (override drop resilience) field in CFGE_DATA format */ 2169 boolean CfgeIngressMirroringEnable; /*!< IMIRE field in CFGE_DATA format */ 2170 boolean CfgeWakeOnLanTriggerEnable; /*!< WOLTE filed in CFGE_DATA format */ 2171 boolean CfgeCutThroughDisable; /*!< CTD field in CFGE_DATA format */ 2172 boolean CfgeTimestampCaptureEable; /*!< TIMECAPE field in CFGE_DATA format */ 2173 Netc_EthSwt_Ip_CfgeFilterForwardingActionDataType CfgeFilterForwardingAction; /*!< FLTFA field in CFGE_DATA format */ 2174 Netc_EthSwt_Ip_CfgeFilterActionDataType CfgeFilterAction; /*!< FLTA field in CFGE_DATA format */ 2175 } Netc_EthSwt_Ip_IngressPortFilterCfgeDataType; 2176 2177 /*! 2178 * @brief defines Ingress Port Filter Table KEYE_DATA type. 2179 */ 2180 typedef struct 2181 { 2182 uint16 KeyePrecedence; /*!< Precedence field */ 2183 uint16 keyeFrmAttributeFlags; /*!< Frame Attribute Flags field */ 2184 uint16 KeyeFrmAttributeFlagsMask; /*!< Frame Attribute Flags Mask field */ 2185 uint8 KeyeDifferentiatedServicesCodePoint; /*!< Differentiated Services Code Point field */ 2186 uint8 KeyeDifferentiatedServicesCodePointMask; /*!< Differentiated Services Code Point Mask field */ 2187 uint8 KeyeSourcePortID; /*!< Source Port ID field */ 2188 uint8 KeyeSourcePortIDMask; /*!< Source Port ID Mask field */ 2189 uint16 KeyeOuterVLANTagControlInformation; /*!< Outer VLAN Tag Control Information field */ 2190 uint16 KeyeOuterVLANTagControlInformationMask; /*!< Outer VLAN Tag Control Information Mask field */ 2191 uint8 KeyeDstMacAddr[6U]; /*!< Destination MAC Address field */ 2192 uint8 KeyeDstMacAddrMask[6U]; /*!< Destination MAC Address Mask field */ 2193 uint8 KeyeSrcMacAddr[6U]; /*!< Source MAC Address field */ 2194 uint8 KeyeSrcMacAddrMask[6U]; /*!< Source MAC Address Mask field */ 2195 uint16 KeyeInnerVLANTagControlInformation; /*!< Inner VLAN Tag Control Information field */ 2196 uint16 KeyeInnerVLANTagControlInformationMask; /*!< Inner VLAN Tag Control Information Mask field */ 2197 uint16 KeyeEtherType; /*!< EtherType field */ 2198 uint16 KeyeEtherTypeMask; /*!< EtherType Mask field */ 2199 uint8 KeyeIPProtocol; /*!< IP Protocol field */ 2200 uint8 KeyeIPProtocolMask; /*!< IP Protocol Mask field */ 2201 uint32 KeyeIPSourceAddress[4U]; /*!< IP Source Address field */ 2202 uint32 KeyeIPSourceAddressMask[4U]; /*!< IP Source Address Mask field */ 2203 uint16 KeyeL4SourcePort; /*!< L4 Source Port field */ 2204 uint16 KeyeL4SourcePortMask; /*!< L4 Source Port Mask field */ 2205 uint32 KeyeIPDestinationAddress[4U]; /*!< IP Destination Address field */ 2206 uint32 KeyeIPDestinationAddressMask[4U]; /*!< IP Destination Address Mask field */ 2207 uint16 KeyeL4DestinationPort; /*!< L4 Destination Port field */ 2208 uint16 KeyeL4DestinationPortMask; /*!< L4 Destination Port Mask field */ 2209 uint8 KeyePayloadBytes[24U]; /*!< Payload Bytes field */ 2210 uint8 KeyePayloadBytesMask[24U]; /*!< Payload Bytes Mask field */ 2211 } Netc_EthSwt_Ip_IngressPortFilterKeyeDataType; 2212 2213 /*! 2214 * @brief defines Ingress Port Filter Table entries. 2215 * @implements Netc_EthSwt_Ip_IngressPortFilterEntryDataType_struct 2216 */ 2217 typedef struct 2218 { 2219 uint32 IngressPortFilterEntryID; /*!< Ingress Port Filter Table Entry ID */ 2220 Netc_EthSwt_Ip_IngressPortFilterCfgeDataType IngressPortFilterCfgeData; /*!< Ingress Port Filter Table CFGE_DATA format */ 2221 Netc_EthSwt_Ip_IngressPortFilterKeyeDataType IngressPortFilterkeyeData; /*!< Ingress Port Filter Table KEYE_DATA format */ 2222 uint64 IngressPortFilterMatchCount; /*!< Ingress Port Filter Table Match Count Data */ 2223 } Netc_EthSwt_Ip_IngressPortFilterEntryDataType; 2224 2225 /*! 2226 * @brief enum type for administrative gate operation type (as per IEEE 802.1Q-2018) field for gate control list entry. 2227 */ 2228 typedef enum { 2229 ETHSWT_HOST_REQUEST_UNCHANGED, /*!< 0x0: SetGateStates. HoldRequest is unchanged. */ 2230 ETHSWT_HOST_REQUEST_HOLD, /*!< 0x1: Set-And-Hold-MAC. HoldRequest is set to value hold (1). */ 2231 ETHSWT_HOST_REQUEST_RELEASE /*!< 0x2: Set-And-Release-MAC. HoldRequest is set to value release (0). */ 2232 } Netc_EthSwt_Ip_AdminGateOperationType; 2233 2234 /*! 2235 * @brief enum type for Administrative Traffic Class Gate States. 2236 */ 2237 typedef enum { 2238 ETHSWT_TRAFFIC_CLASS_GATE_CLOSED, /*!< 0x0: Gate closed. */ 2239 ETHSWT_TRAFFIC_CLASS_GATE_OPEN /*!< 0x1: Gate open. */ 2240 } Netc_EthSwt_Ip_AdminTrafficClassGateStateType; 2241 2242 /*! 2243 * @brief Time Gate Scheduling Table CFGE_DATA field. 2244 */ 2245 /* Administrative Traffic Class Gate States for Gate Entry */ 2246 #define NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_TC_STATES_SHIFT (0U) 2247 #define NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_TC_STATES_MASK (0x000000FFUL) 2248 #define NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_TC_STATES(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_TC_STATES_SHIFT)) & NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_TC_STATES_MASK) 2249 2250 /* Administrative gate operation type (as per IEEE 802.1Q-2018) field for gate control list entry */ 2251 #define NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_HR_CB_SHIFT (16U) 2252 #define NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_HR_CB_MASK (0x000F0000UL) 2253 #define NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_HR_CB(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_HR_CB_SHIFT)) & NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_HR_CB_MASK) 2254 2255 /*! 2256 * @brief defines Gate Entry Admin Control List Data type for Time Gate Scheduling Table. 2257 */ 2258 typedef struct 2259 { 2260 uint32 AdminTimeInterval; /*!< Administrative Time Interval for Gate Entry */ 2261 uint8 AdminTrafficClassGateStates; /*!< Administrative Traffic Class Gate States for Gate Entry */ 2262 Netc_EthSwt_Ip_AdminGateOperationType AdminGateOperationType; /*!< Administrative gate operation type (as per IEEE 802.1Q-2018) field for gate control list entry */ 2263 } Netc_EthSwt_Ip_GateEntryAdminControlListDataType; 2264 2265 /*! 2266 * @brief defines Time Gate Scheduling Table entries. 2267 * @implements Netc_EthSwt_Ip_TimeGateSchedulingEntryDataType_struct 2268 */ 2269 typedef struct 2270 { 2271 uint32 TimeGateSchedulingTable_EID; /*!< Time Gate Scheduling Table Entry ID, which is actually the port index of switch */ 2272 uint64 AdminBaseTime; /*!< Administrative Base Time */ 2273 uint32 AdminCycleTime; /*!< Administrative Cycle Time */ 2274 uint32 AdminCycleTimeExt; /*!< Administrative Cycle Time Extension */ 2275 uint16 AdminControlListLength; /*!< Administrative Control List Length */ 2276 #if (NETC_ETHSWT_MAX_NUMBER_OF_GATECONTROLLIST_ENTRIES > 0U) 2277 Netc_EthSwt_Ip_GateEntryAdminControlListDataType GateEntryAdminControlListData[NETC_ETHSWT_MAX_NUMBER_OF_GATECONTROLLIST_ENTRIES]; 2278 #endif 2279 } Netc_EthSwt_Ip_TimeGateSchedulingEntryDataType; 2280 2281 /** 2282 * @brief MAC learning optoin type enumeration. 2283 * @implements Netc_EthSwt_Ip_MacLearningOptionType_enum 2284 */ 2285 typedef enum { 2286 ETHSWT_MACLEARNINGOPTION_HWDISABLED = (uint8)0x1U, /*!< @brief If hardware learning disabled, the switch must not learn new MAC addresses */ 2287 ETHSWT_MACLEARNINGOPTION_HWENABLED = (uint8)0x2U, /*!< @brief If hardware learning enabled, the switch learns new MAC addresses */ 2288 ETHSWT_MACLEARNINGOPTION_SWSECUREENABLED = (uint8)0x3U, /*!< @brief If software learning secure enabled, A MAC learning lookup is performed into the FDB table. 2289 If there is no match, no attempt is made to add a new entry, and the frame is redirect to the switch management port. 2290 If there is match, and the entry's port number does not match frame ingress port number, the frame is redirected to the switch management port. */ 2291 ETHSWT_MACLEARNINGOPTION_SWUNSECUREENABLED = (uint8)0x4U, /*!< @brief If software learning unsecure enabled, A MAC learning lookup is performed into the FDB table. 2292 If there is no match, no attempt is made to add a new entry, and a copy of the frame is sent to the switch management port. 2293 If there is match, and the entry's port number does not match frame ingress port number, the frame is copied to the switch management port.*/ 2294 ETHSWT_MACLEARNINGOPTION_DISABLEDWITHSWVALIDATION = (uint8)0x5U /*!< @brief if Disable MAC learning with SMAC validation. A MAC learning lookup is performed into the FDB table. 2295 If there is no match or there is a match but the ingress port is not a member of the FDB entry, 2296 the frame is discarded and counted against the bridge port discard count register (BPDCR) with discard reason BPDCRR0[MACLNFDR]. */ 2297 } Netc_EthSwt_Ip_MacLearningOptionType; 2298 2299 typedef enum{ 2300 ETHSWT_NO_FDB_LOOKUP_FLOOD_FRAME = (uint8)0x1U, /**< @brief No FDB lookup is performed, the frame is flooded */ 2301 ETHSWT_FDB_LOOKUP_FLOOD_FRAME = (uint8)0x2U, /**< @brief FDB lookup is performed, and if there is no match, the frame is flooded. */ 2302 ETHSWT_FDB_LOOKUP_DISCARD_FRAME = (uint8)0x3U /**< @brief FDB lookup is performed, and if there is no match, the frame is discarded */ 2303 } Netc_EthSwt_Ip_MacForwardingOptionType; 2304 2305 typedef enum{ 2306 ETHSWT_EXTERNAL_REFERENCE_CLOCK = (uint8)0x0U, /**< @brief external reference clock is selected for 1588 timer */ 2307 ETHSWT_MODULE_REFERENCE_CLOCK = (uint8)0x1U, /**< @brief module reference clock (NETC system clock) is selected for 1588 timer */ 2308 ETHSWT_REFERENCE_CLOCK_DISABLED = (uint8)0x2U /**< @brief No reference clock selected for 1588 timer, means the timer is disabled */ 2309 } Netc_EthSwt_Ip_1588ClockSourceOptionType; 2310 2311 /*! 2312 * @brief Port selection enumeration Netc_EthSwt_Ip_PortSelectionType_Class 2313 */ 2314 typedef enum 2315 { 2316 NETC_ETHSWT_PORT2 = 2U, /**< Pseudo port 2 */ 2317 NETC_ETHSWT_PORT1 = 1U, /**< Switch port 1 */ 2318 NETC_ETHSWT_PORT0 = 0U /**< Switch port 0 */ 2319 } Netc_EthSwt_Ip_PortSelectionType; 2320 2321 /*! 2322 * @brief XMII mode of port Netc_EthSwt_Ip_XmiiModeType_Enumeration 2323 */ 2324 typedef enum 2325 { 2326 NETC_ETHSWT_MII_MODE = 0U, /**< MII interface mode */ 2327 NETC_ETHSWT_RMII_MODE = 1U, /**< RMII interface mode */ 2328 NETC_ETHSWT_RGMII_MODE = 2U, /**< RGMII interface mode */ 2329 NETC_ETHSWT_SGMII_MODE = 3U, /**< SGMII interface mode */ 2330 } Netc_EthSwt_Ip_XmiiModeType; 2331 2332 /*! 2333 * @brief Link duplex. 2334 * Netc_EthSwt_Ip_PortDuplexType_Class 2335 */ 2336 typedef enum 2337 { 2338 NETC_ETHSWT_PORT_FULL_DUPLEX = 1, /**< full duplex mode */ 2339 NETC_ETHSWT_PORT_HALF_DUPLEX = 0, /**< half duplex mode */ 2340 } Netc_EthSwt_Ip_PortDuplexType; 2341 2342 /*! 2343 * @brief Link speed. 2344 * Netc_EthSwt_Ip_PortSpeedType_Class 2345 */ 2346 typedef enum 2347 { 2348 NETC_ETHSWT_PORT_SPEED_100_MBPS = 1, /**< 100 Mbps */ 2349 NETC_ETHSWT_PORT_SPEED_10_MBPS = 0, /**< 10 Mbps */ 2350 } Netc_EthSwt_Ip_PortSpeedType; 2351 2352 /*! 2353 * @brief Direction selection enumeration Netc_EthSwt_Ip_DirectionType_Class 2354 */ 2355 typedef enum 2356 { 2357 NETC_ETHSWT_DIRECTION_INGRESS = 1U, /**< Ingress direction */ 2358 NETC_ETHSWT_DIRECTION_EGRESS = 0U /**< Egress direction */ 2359 } Netc_EthSwt_Ip_DirectionType; 2360 2361 /*! 2362 * @brief Mode of the port Netc_EthSwt_Ip_PortModeType_Class 2363 */ 2364 typedef enum 2365 { 2366 NETC_ETHSWT_PORT_MODE_INGRESS = 4U, /**< Port is enabled, ingress communication only */ 2367 NETC_ETHSWT_PORT_MODE_EGRESS = 3U, /**< Port is enabled, egress communication only */ 2368 NETC_ETHSWT_PORT_MODE_FULL = 1U, /**< Port is enabled, ingress and egress communication possible */ 2369 NETC_ETHSWT_PORT_MODE_OFF = 0U /**< Port is off, no communication possible */ 2370 } Netc_EthSwt_Ip_PortModeType; 2371 2372 /*! 2373 * @brief Interrupt flags shifts Netc_EthSwt_Ip_IrqType_Class 2374 */ 2375 typedef enum 2376 { 2377 NETC_ETHSWT_IRQ_CBTX = 14U, /**< 100BASETX */ 2378 NETC_ETHSWT_IRQ_SGMII4 = 13U, /**< SGMII 4 */ 2379 NETC_ETHSWT_IRQ_SGMII3 = 12U, /**< SGMII 3 */ 2380 NETC_ETHSWT_IRQ_SGMII2 = 11U, /**< SGMII 2 */ 2381 NETC_ETHSWT_IRQ_SGMII1 = 10U, /**< SGMII 1 */ 2382 NETC_ETHSWT_IRQ_CBT1_COMB = 9U, /**< 100BASE-T1 SubSystem Combined */ 2383 NETC_ETHSWT_IRQ_CBT1_PHY6 = 8U, /**< 100BASE-T1 SubSystem PHY # 6 */ 2384 NETC_ETHSWT_IRQ_CBT1_PHY5 = 7U, /**< 100BASE-T1 SubSystem PHY # 5 */ 2385 NETC_ETHSWT_IRQ_CBT1_PHY4 = 6U, /**< 100BASE-T1 SubSystem PHY # 4 */ 2386 NETC_ETHSWT_IRQ_CBT1_PHY3 = 5U, /**< 100BASE-T1 SubSystem PHY # 3 */ 2387 NETC_ETHSWT_IRQ_CBT1_PHY2 = 4U, /**< 100BASE-T1 SubSystem PHY # 2 */ 2388 NETC_ETHSWT_IRQ_CBT1_PHY1 = 3U, /**< 100BASE-T1 SubSystem PHY # 1 */ 2389 NETC_ETHSWT_IRQ_CBT1_PHYSS = 2U, /**< 100BASE-T1 SubSystem PHY Common module */ 2390 NETC_ETHSWT_IRQ_NETC_ETHSWTCORE1 = 1U, /**< Ethernet Netc_EthSwt SubSystem Automotive Netc_EthSwt Interrupt 1 */ 2391 NETC_ETHSWT_IRQ_NETC_ETHSWTCORE0 = 0U /**< Ethernet Netc_EthSwt SubSystem Automotive Netc_EthSwt Interrupt 0 */ 2392 } Netc_EthSwt_Ip_IrqType; 2393 2394 /* ---bits field and structure for Vlan Filter Table Data Buffer Format--- */ 2395 2396 /* index of Vlan Filter Table Request Data Buffer Format */ 2397 #define NETC_ETHSWT_IP_VLANFILTERTABLE_REQFMT_VID_FIELD (1U) /*!< second uint32 item of Vlan Filter Table Request Data Buffer Format when ACCESS_METHOD = 0x1 (Key Element Match) */ 2398 #define NETC_ETHSWT_IP_VLANFILTERTABLE_REQFMT_RESUMEENTRYID_FIELD (1U) /*!< second uint32 item of Vlan Filter Table Request Data Buffer Format when ACCESS_METHOD = 0x2 (Search) */ 2399 2400 typedef enum { 2401 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD = 0U, /*!< first uint32 item of Switch Tables Request Data Buffer Format */ 2402 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ENTRYID_FIELD, /*!< second uint32 item of Switch Tables Request Data Buffer Format when ACCESS_METHOD = 0x0 (ENTRY_ID Match) */ 2403 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA0, /*!< first item of CFGEDATA but third item of Switch Tables Request Data Buffer Format */ 2404 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA1, /*!< second item of CFGEDATA but forth item of Switch Tables Request Data Buffer Format */ 2405 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA2, /*!< third item of CFGEDATA but fifth item of Switch Tables Request Data Buffer Format */ 2406 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA3, /*!< forth item of CFGEDATA but sixth item of Switch Tables Request Data Buffer Format */ 2407 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA4, /*!< fifth item of CFGEDATA but seventh item of Switch Tables Request Data Buffer Format */ 2408 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA5, /*!< sixth item of CFGEDATA but eighth item of Switch Tables Request Data Buffer Format */ 2409 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA6, /*!< seventh item of CFGEDATA but ninth item of Switch Tables Request Data Buffer Format */ 2410 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA7, 2411 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA8, 2412 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA9 2413 } Netc_EthSwt_Ip_SwitchTableRequestDataIndexType; 2414 2415 /* bits field for Vlan Filter Table CFGE_DATA Format */ 2416 /*! 2417 * @brief Vlan Filter Table Config Data STG_ID field. 2418 */ 2419 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_STG_ID_SHIFT (24U) 2420 /*! 2421 * @brief Vlan Filter Table Config Data STG_ID field mask. 2422 */ 2423 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_STG_ID_MASK (0x0F000000UL) 2424 /*! 2425 * @brief Vlan Filter Table Config Data STG_ID. 2426 */ 2427 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_STG_ID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_STG_ID_SHIFT)) & NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_STG_ID_MASK) 2428 2429 /*! 2430 * @brief Vlan Filter Table Config Data PORT membership field. 2431 */ 2432 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_PORT_MEMBERSHIP_SHIFT (0U) 2433 /*! 2434 * @brief Vlan Filter Table Config Data PORT membership field mask. 2435 */ 2436 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_PORT_MEMBERSHIP_MASK (0x00FFFFFFUL) 2437 /*! 2438 * @brief Vlan Filter Table Config Data PORT membership. 2439 */ 2440 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_PORT_MEMBERSHIP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_PORT_MEMBERSHIP_SHIFT)) & NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_PORT_MEMBERSHIP_MASK) 2441 2442 /*! 2443 * @brief Vlan Filter Table Config Data IPMFLE field. 2444 */ 2445 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_IPMFLE_SHIFT (23U) 2446 /*! 2447 * @brief Vlan Filter Table Config Data IPMFLE field mask. 2448 */ 2449 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_IPMFLE_MASK (0x00800000UL) 2450 /*! 2451 * @brief Vlan Filter Table Config Data IPMFLE. 2452 */ 2453 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_IPMFLE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_IPMFLE_SHIFT)) & NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_IPMFLE_MASK) 2454 2455 /*! 2456 * @brief Vlan Filter Table Config Data IPMFE field. 2457 */ 2458 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_IPMFE_SHIFT (22U) 2459 /*! 2460 * @brief Vlan Filter Table Config Data IPMFE field mask. 2461 */ 2462 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_IPMFE_MASK (0x00400000UL) 2463 /*! 2464 * @brief Vlan Filter Table Config Data IPMFE. 2465 */ 2466 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_IPMFE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_IPMFE_SHIFT)) & NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_IPMFE_MASK) 2467 2468 /*! 2469 * @brief Vlan Filter Table Config Data MFO field. 2470 */ 2471 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_MFO_SHIFT (19U) 2472 /*! 2473 * @brief Vlan Filter Table Config Data MFO field mask. 2474 */ 2475 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_MFO_MASK (0x00180000UL) 2476 /*! 2477 * @brief Vlan Filter Table Config Data MFO. 2478 */ 2479 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_MFO(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_MFO_SHIFT)) & NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_MFO_MASK) 2480 2481 /*! 2482 * @brief Vlan Filter Table Config Data MLO field. 2483 */ 2484 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_MLO_SHIFT (16U) 2485 /*! 2486 * @brief Vlan Filter Table Config Data MLO field mask. 2487 */ 2488 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_MLO_MASK (0x00070000UL) 2489 /*! 2490 * @brief Vlan Filter Table Config Data MLO. 2491 */ 2492 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_MLO(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_MLO_SHIFT)) & NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_MLO_MASK) 2493 2494 /*! 2495 * @brief Vlan Filter Table Config Data FID field. 2496 */ 2497 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_FID_SHIFT (0U) 2498 /*! 2499 * @brief Vlan Filter Table Config Data FID field mask. 2500 */ 2501 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_FID_MASK (0x00000FFFUL) 2502 /*! 2503 * @brief Vlan Filter Table Config Data FID. 2504 */ 2505 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_FID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_FID_SHIFT)) & NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_FID_MASK) 2506 2507 /*! 2508 * @brief Vlan Filter Table Config Data ETA port bitmap field. 2509 */ 2510 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_ETA_PORT_BITMAP_SHIFT (0U) 2511 /*! 2512 * @brief Vlan Filter Table Config Data ETA port bitmap field mask. 2513 */ 2514 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_ETA_PORT_BITMAP_MASK (0x00FFFFFFUL) 2515 /*! 2516 * @brief Vlan Filter Table Config Data ETA port bitmap. 2517 */ 2518 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_ETA_PORT_BITMAP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_ETA_PORT_BITMAP_SHIFT)) & NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_ETA_PORT_BITMAP_MASK) 2519 2520 /*! 2521 * @brief Vlan Filter Table Config Data base ET_EID field. 2522 */ 2523 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_BASE_ET_EID_SHIFT (0U) 2524 /*! 2525 * @brief Vlan Filter Table Config Data base ET_EID field mask. 2526 */ 2527 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_BASE_ET_EID_MASK (0xFFFFFFFFUL) 2528 /*! 2529 * @brief Vlan Filter Table Config Data base ET_EID. 2530 */ 2531 #define NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_BASE_ET_EID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_BASE_ET_EID_SHIFT)) & NETC_ETHSWT_IP_VLANFILTERTABLE_CFGEDATA_BASE_ET_EID_MASK) 2532 2533 /*! 2534 * @brief Vlan Filter Table Config Data KEY_DATA bits field. 2535 */ 2536 #define NETC_ETHSWT_IP_VLANFILTERTABLE_KEYEDATA_VID_SHIFT (0U) 2537 /*! 2538 * @brief Vlan Filter Table Config Data KEY_DATA bits field mask. 2539 */ 2540 #define NETC_ETHSWT_IP_VLANFILTERTABLE_KEYEDATA_VID_MASK (0x00000FFFUL) 2541 /*! 2542 * @brief Vlan Filter Table Config Data KEY_DATA bits. 2543 */ 2544 #define NETC_ETHSWT_IP_VLANFILTERTABLE_KEYEDATA_VID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_VLANFILTERTABLE_KEYEDATA_VID_SHIFT)) & NETC_ETHSWT_IP_VLANFILTERTABLE_KEYEDATA_VID_MASK) 2545 2546 /*! 2547 * @brief Vlan Filter Table response data type enumeration. Netc_EthSwt_Ip_VlanFilterTable_ResponsDataIndexType 2548 */ 2549 typedef enum { 2550 NETC_ETHSWT_IP_VLANFILTERTABLE_RSPDATA_STATUS = 0x0U, /*!< Status Field In Vlan Filter Table Response Data Buffer */ 2551 NETC_ETHSWT_VLANFILTERTABL_RSPDATA_ENTRYID, /*!< Entry_ID Field In Vlan Filter Table Response Data Buffer */ 2552 NETC_ETHSWT_VLANFILTERTABL_RSPDATA_VID, /*!< VID field of KEYE DATA In Vlan Filter Table Response Data Buffer */ 2553 NETC_ETHSWT_VLANFILTERTABL_RSPDATA_CFGEDATA0, /*!< The first element of CFGE DATA In Vlan Filter Table Response Data Buffer */ 2554 NETC_ETHSWT_VLANFILTERTABL_RSPDATA_CFGEDATA1, /*!< The second element of CFGE DATA In Vlan Filter Table Response Data Buffer */ 2555 NETC_ETHSWT_VLANFILTERTABL_RSPDATA_CFGEDATA2, /*!< The third element of CFGE DATA In Vlan Filter Table Response Data Buffer */ 2556 NETC_ETHSWT_VLANFILTERTABL_RSPDATA_CFGEDATA3 /*!< The last element of CFGE DATA In Vlan Filter Table Response Data Buffer */ 2557 } Netc_EthSwt_Ip_VlanFilterTable_ResponsDataIndexType; 2558 2559 /*! 2560 * @brief Vlan Filter Table CFGE_DATA format. 2561 */ 2562 typedef struct { 2563 uint32 Cfge_Data[NETC_ETHSWT_IP_TABLE_CFGEDATA_ITEMS]; /*!< Config data for Vlan Filtre Table */ 2564 } Netc_EthSwt_Ip_VlanFilterTableCFGEDataType; 2565 /* ---bits field and structure for Vlan Filter Table Data Buffer Format--- */ 2566 2567 /*! 2568 * @brief VLAN Tag Netc_EthSwt_Ip_VlanTagType_Class 2569 */ 2570 typedef struct 2571 { 2572 uint16 id; /*!< Specifies the VLAN address 0..65535 */ 2573 uint8 pcp; /*!< Priority to be added in the tag 0..7 */ 2574 uint8 dei; /*!< 1 bit field - drop eligible indicator */ 2575 } Netc_EthSwt_Ip_VlanTagType; 2576 2577 /*! 2578 * @brief PHY configuration of a port Netc_EthSwt_Ip_FdbEntryType_Class 2579 */ 2580 typedef struct 2581 { 2582 uint16 ePortMask; /*!< Mask of the egress ports */ 2583 uint8 macAddr[6U]; /*!< Array containing the MAC addresses of the port */ 2584 } Netc_EthSwt_Ip_FdbEntryType; 2585 2586 /*! 2587 * @brief PHY configuration of a port Netc_EthSwt_Ip_VlanFilterEntryType 2588 */ 2589 typedef struct 2590 { 2591 uint16 iPortMask; /*!< Mask of the ingress ports */ 2592 uint16 vlanId; /*!< VLAN ID, VlanMembershipId */ 2593 } Netc_EthSwt_Ip_VlanFilterEntryType; 2594 2595 /*! 2596 * @brief Netc_EthSwt counter structure Netc_EthSwt_Ip_CounterType 2597 */ 2598 typedef struct { 2599 uint64 rxEtherOctetCounter; /*!< Port Receive Ethernet Octets Counter(etherStatsOctetsn) (PM0_REOCTn) */ 2600 uint64 rxOctetCounter; /*!< Supported by pseudo port. Port Receive Octets Counter(iflnOctetsn) (PM0_ROCTn) */ 2601 uint64 rxValidPauseFrmCounter; /*!< Port Receive Valid Pause Frame Counter Register(aPAUSEMACCtrlFramesReceivedn) (PM0_RXPFn) */ 2602 uint64 rxFrmCounter; /*!< Receive Frame Counter Register(aFramesReceivedOKn) (PM0_RFRMn) */ 2603 uint64 rxFrameCheckSequenceErrorCounter; /*!< Port Receive Frame Check Sequence Error Counter Register() (PM0_RFCSn) */ 2604 uint64 rxVlanFrmCounter; /*!< Port Receive VLAN Frame Counter Register(VLANReceivedOKn) (PM0_RVLANn) */ 2605 uint64 rxFrameErrorCounter; /*!< Port Receive Frame Error Counter Register(ifInErrorsn) (PM0_RERRn) */ 2606 uint64 rxUnicastFrmCounter; /*!< Supported by pseudo port. Port Receive Unicast Frame Counter Register(ifInUcastPktsn) (PM0_RUCAn) */ 2607 uint64 rxMulticastFrmCounter; /*!< Supported by pseudo port. Port Receive Multicast Frame Counter Register(ifInMulticastPktsn) (PM0_RMCAn) */ 2608 uint64 rxBroadcastFrmCounter; /*!< Supported by pseudo port. Port Receive Broadcast Frame Counter Register(ifInBroadcastPktsn) (PM0_RBCAn) */ 2609 uint64 rxDroppedPktCounter; /*!< Port Receive Dropped Packets Counter Register(etherStatsDropEventsn) (PM0_RDRPn) */ 2610 uint64 rxPktCounter; /*!< Port Receive Packets Counter Register(etherStatsPktsn) (PM0_RPKTn) */ 2611 uint64 rxUndersizePacketCounter; /*!< Port Receive Undersized Packet Counter Register(etherStatsUndersizePktsn) (PM0_RUNDn) */ 2612 uint64 rx64OctetPktCounter; /*!< Port Receive 64-Octet Packet Counter Register(etherStatsPkts64OctetsN) (PM0_R64n) */ 2613 uint64 rx65to127OctetPktCounter; /*!< Port Receive 65 to 127-Octet Packet Counter Register(etherStatsPkts65to127OctetsN) (PM0_R127n) */ 2614 uint64 rx128to255OctetPktCounter; /*!< Port Receive 128 to 255-Octet Packet Counter Register(etherStatsPkts128to255OctetsN) (PM0_R255n) */ 2615 uint64 rx256to511OctetPktCounter; /*!< Port Receive 256 to 511-Octet Packet Counter Register(etherStatsPkts256to511OctetsN) (PM0_R511n) */ 2616 uint64 rx512to1023OctetPktCounter; /*!< Port Receive 512 to 1023-Octet Packet Counter Register(etherStatsPkts512to1023OctetsN) (PM0_R1023n) */ 2617 uint64 rx1024to1522OctetPktCounter; /*!< Port Receive 1024 to 1522-Octet Packet Counter Register(etherStatsPkts1024to1522OctetsN) (PM0_R1522n) */ 2618 uint64 rx1523toMaxOctetPktCounter; /*!< Port Receive 1523 to Max-Octet Packet Counter Register(etherStatsPkts1523toMaxOctetsN) (PM0_R1523Xn) */ 2619 uint64 rxOversizedPacketsCounter; /*!< Port Receive Oversized Packet Counter Register(etherStatsOversizePktsn) (PM0_ROVRn) */ 2620 uint64 rxJabberPktCounter; /*!< Port Receive Jabber Packet Counter Register(etherStatsJabbersn) (PM0_RJBRn) */ 2621 uint64 rxFragmentPktCounter; /*!< Port Receive Fragment Packet Counter Register(etherStatsFragmentsn (PM0_RFRGn) */ 2622 uint64 rxControlPktCounter; /*!< Port Receive Control Packet Counter Register (PM0_RCNPn) */ 2623 uint64 rxDroppedNTruncatedPktCounter; /*!< Port Receive Dropped Not Truncated Packets Counter Register(etherStatsDropEventsn) (PM0_RDRNTPn) */ 2624 2625 uint64 txEtherOctetCounter; /*!< Transmit Ethernet Octets Counter(etherStatsOctetsn) (PM0_TEOCTn) */ 2626 uint64 txOctetCounter; /*!< Supported by pseudo port. Port Transmit Octets Counter Register(ifOutOctetsn) (PM0_TOCTn) */ 2627 uint64 txValidPauseFrmCounter; /*!< Port Transmit Valid Pause Frame Counter Register(aPAUSEMACCtrlFramesReceivedn) (PM0_TXPFn) */ 2628 uint64 txFrmCounter; /*!< Port Transmit Frame Counter Register(aFramesTransmittedOKn) (PM0_TFRMn) */ 2629 uint64 txFrameCheckSequenceErrorCounter; /*!< Port Transmit Frame Check Sequence Error Counter Register() (PM0_TFCSn) */ 2630 uint64 txVlanFrmCounter; /*!< Port Transmit VLAN Frame Counter Register(VLANTransmittedOKn) (PM0_TVLANn) */ 2631 uint64 txFrameErrorCounter; /*!< Port Transmit Frame Error Counter Register(ifOutErrorsn) (PM0_TERRn) */ 2632 uint64 txUnicastFrmCounter; /*!< Supported by pseudo port. Port Transmit Unicast Frame Counter Register(ifOutUcastPktsn) (PM0_TUCAn) */ 2633 uint64 txMulticastFrmCounter; /*!< Supported by pseudo port. Port Transmit Multicast Frame Counter Register(ifOutMulticastPktsn) (PM0_TMCAn) */ 2634 uint64 txBroadcastFrmCounter; /*!< Supported by pseudo port. Port Transmit Broadcast Frame Counter Register(ifOutBroadcastPktsn) (PM0_TBCAn) */ 2635 uint64 txPktCounter; /*!< Port Transmit Packets Counter Register(etherStatsPktsn) (PM0_TPKTn) */ 2636 uint64 txUndersizePacketCounter; /*!< Port Transmit Undersized Packet Counter Register(etherStatsUndersizePktsn) (PM0_TUNDn) */ 2637 uint64 tx64OctetPktCounter; /*!< Port Transmit 64-Octet Packet Counter Register (etherStatsPkts64OctetsN) (PM0_T64n) */ 2638 uint64 tx65to127OctetPktCounter; /*!< Port Transmit 65 to 127-Octet Packet Counter Register (etherStatsPkts65to127OctetsN) (PM0_T127n) */ 2639 uint64 tx128to255OctetPktCounter; /*!< Port Transmit 128 to 255-Octet Packet Counter Register (etherStatsPkts128to255OctetsN) (PM0_T255n) */ 2640 uint64 tx256to511OctetPktCounter; /*!< Port Transmit 256 to 511-Octet Packet Counter Register (etherStatsPkts256to511OctetsN) (PM0_T511n) */ 2641 uint64 tx512to1023OctetPktCounter; /*!< Port Transmit 512 to 1023-Octet Packet Counter Register (etherStatsPkts512to1023OctetsN) (PM0_T1023n) */ 2642 uint64 tx1024to1522OctetPktCounter; /*!< Port Transmit 1024 to 1522-Octet Packet Counter Register (etherStatsPkts1024to1522OctetsN) (PM0_T1522n) */ 2643 uint64 tx1523toMaxOctetPktCounter; /*!< Port Transmit 1523 to TX_MTU-Octet Packet Counter Register (etherStatsPkts1523toMaxOctetsN) (PM0_T1523Xn) */ 2644 uint64 txControlPktCounter; /*!< Port Transmit Control Packet Counter Register (PM0_TCNPn) */ 2645 uint64 txDeferredPktCounter; /*!< Port Transmit Deferred Packet Counter Register(aFramesWithDeferredXmissions) (PM0_TDFRn) */ 2646 uint64 txMultiCollisionCounter; /*!< Port Transmit Multiple Collisions Counter Register(aMultipleCollisionFrames) (PM0_TMCOLn) */ 2647 uint64 txSingleCollisionCounter; /*!< Port Transmit Single Collision Counter(aSingleCollisionFrames) Register (PM0_TSCOLn) */ 2648 uint64 txLateCollisionCounter; /*!< Port Transmit Late Collision Counter(aLateCollisions) Register (PM0_TLCOLn) */ 2649 uint64 txExcessiveCollisionCounter; /*!< Port Transmit Excessive Collisions Counter Register (PM0_TECOLn) */ 2650 2651 uint32 rxDiscardCounter; /*!< Port Rx discard count register (PRXDCR) */ 2652 uint32 txDiscardCounter; /*!< Port Tx discard count register (PTXDCR) */ 2653 uint32 unIntegrityErrorCounter; /* Uncorrectable non-fatal integrity error count register (UNIECTR) which tracks how many events have been detected. */ 2654 } Netc_EthSwt_Ip_CounterType; 2655 2656 /* Netc_EthSwt_Ip_CounterValueType_typedef */ 2657 typedef uint64 Netc_EthSwt_Ip_CounterValueType; 2658 2659 /*! 2660 * @brief Action to be taken when the rate policy criteria defined for this EthSwtPortPolicer are met. 2661 */ 2662 typedef enum { 2663 NETC_ETHSWT_BLOCK_SOURCE, /*!< Eth Switch rate violation block source. */ 2664 NETC_ETHSWT_DROP_FRAME /*!< Eth Switch rate violation drop frame. */ 2665 } Netc_EthSwt_Ip_RateViolationActionType; 2666 2667 /*! 2668 * @brief How the message with a specific VLAN Id shall be handled. 2669 */ 2670 typedef enum { 2671 NETC_ETHSWT_NOT_SENT, /*!< Eth Switch vlan frame not sent. */ 2672 NETC_ETHSWT_SENT_TAGGED, /*!< Eth Switch vlan frame sent tagged. */ 2673 NETC_ETHSWT_SENT_UNTAGGED /*!< Eth Switch vlan frame sent untagged. */ 2674 } Netc_EthSwt_Ip_VlanHandlingType; 2675 2676 /*! 2677 * @brief Message priority the incoming message will be tagged with. 2678 */ 2679 typedef struct { 2680 uint8 EthSwtPriorityRegenerationIngressPriority; /*!< Message priority of the incoming message. */ 2681 uint8 EthSwtPriorityRegenerationRegeneratedPriority; /*!< Message priority the incoming message will be tagged with. */ 2682 } Netc_EthSwt_Ip_PriorityRegenerationType; 2683 2684 /*! 2685 * @brief Priority based traffic class assignment. 2686 */ 2687 typedef struct { 2688 uint8 EthSwtPriorityTrafficClassAssignmentTrafficClass[8U]; /*!< Traffic Class value. */ 2689 } Netc_EthSwt_Ip_PriorityTrafficClassAssignmentType; 2690 2691 /*! 2692 * @brief Rate Policing parameters. 2693 */ 2694 typedef struct { 2695 Netc_EthSwt_Ip_PriorityRegenerationType priorityRegeneration[8U]; /*!< Message priority the incoming message will be tagged with. */ 2696 uint8 EthSwtPortRatePolicedPriority; /*!< The priority which this rate policy shall be limited on. */ 2697 Netc_EthSwt_Ip_RateViolationActionType EthSwtPortRateViolationAction; /*!< Action to be taken when the rate policy criteria defined for this EthSwtPortPolicer are met. */ 2698 uint32 EthSwtPriorityTrafficClassAssignmentType[8U]; /*!< Message priority. */ 2699 } Netc_EthSwt_Ip_PortPolicerType; 2700 2701 /*! 2702 * @brief Port ingress description 2703 */ 2704 typedef struct { 2705 uint8 EthSwtPortIngressDefaultPriority; /*!< Default priority for ingress. */ 2706 uint16 EthSwtPortIngressDefaultVlan; /*!< Default VLAN for ingress. */ 2707 boolean SentUntaggedFrames; /* EthSwtPortVlanForwardingType for the default VLAN */ 2708 boolean portIngressAllowCutThroughFrames; /*!< Allow cut through frames */ 2709 boolean EthSwtPortIngressDropUntagged; /*!< Defines the ingress behavior for untagged frames. */ 2710 boolean EthSwtDropDoubleTagged; /*!< if a switch shall drop double tagged frames. */ 2711 boolean EthSwtPortIngressDropSingleTagged; /*!< if a switch shall drop single tagged frames. */ 2712 boolean EthSwtPortIngressDropPriorityTagged; /*!< if a switch shall drop priority tagged frames. */ 2713 uint16 EthSwtPortIngressVlanModification; /*!< Tagged all frames with this VLAN Id. */ 2714 uint8 EthSwtPortTrafficClassAssignment; /*!< Priority based traffic class assignment. */ 2715 Netc_EthSwt_Ip_PortPolicerType *policer; /*!< Rate Policing parameters. */ 2716 Netc_EthSwt_Ip_PriorityRegenerationType (*priorityRegeneration)[8U]; /*!< Priority of the incoming message. */ 2717 Netc_EthSwt_Ip_PriorityTrafficClassAssignmentType PriorityTrafficClassAssignment[8U]; /*!< Priority based traffic class assignment. */ 2718 boolean vlanEnable; /*!< Use the IVP and DR from the frame or use port default */ 2719 uint8 vlanDefaultIpv; /*!< Default for untaged frames or when vlan is disable */ 2720 uint8 vlanDefaultDr; /*!< Default for untaged frames or when vlan is disable */ 2721 uint8 vlanMappingProfile; /*!< Select the VLANIPV profile 0/1 using the PCP and DEI */ 2722 boolean vlanEnableIngressPcpToPcpMapping; /*!< If there is frame modification enable the PCP change */ 2723 uint8 vlanIngressPcpToPcpProfile; /*!< If there is frame modification and enable use this profile */ 2724 } Netc_EthSwt_Ip_PortIngressType; 2725 2726 2727 /*! 2728 * @brief Port Egress Class Scheduler table CFGE_DATA config field. 2729 */ 2730 /* CQ_ASSG field */ 2731 #define NETC_ETHSWT_IP_SCHTABLE_CFGE_DATA_CQ_ASSG_SHIFT (0U) 2732 #define NETC_ETHSWT_IP_SCHTABLE_CFGE_DATA_CQ_ASSG_MASK (0x0000000FUL) 2733 #define NETC_ETHSWT_IP_SCHTABLE_CFGE_DATA_CQ_ASSG(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SCHTABLE_CFGE_DATA_CQ_ASSG_SHIFT)) & NETC_ETHSWT_IP_SCHTABLE_CFGE_DATA_CQ_ASSG_MASK) 2734 2735 /* OAL field */ 2736 #define NETC_ETHSWT_IP_SCHTABLE_CFGE_DATA_OAL_SHIFT (16U) 2737 #define NETC_ETHSWT_IP_SCHTABLE_CFGE_DATA_OAL_MASK (0x7FF0000UL) 2738 #define NETC_ETHSWT_IP_SCHTABLE_CFGE_DATA_OAL(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SCHTABLE_CFGE_DATA_OAL_SHIFT)) & NETC_ETHSWT_IP_SCHTABLE_CFGE_DATA_OAL_MASK) 2739 2740 /* WBFS_WEIGHT_0 field */ 2741 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_0_SHIFT (0U) 2742 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_0_MASK (0x000000FFUL) 2743 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_0(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_0_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_0_MASK) 2744 2745 /* WBFS_WEIGHT_1 field */ 2746 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_1_SHIFT (8U) 2747 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_1_MASK (0x0000FF00UL) 2748 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_1(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_1_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_1_MASK) 2749 2750 /* WBFS_WEIGHT_2 field */ 2751 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_2_SHIFT (16U) 2752 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_2_MASK (0x00FF0000UL) 2753 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_2(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_2_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_2_MASK) 2754 2755 /* WBFS_WEIGHT_3 field */ 2756 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_3_SHIFT (24U) 2757 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_3_MASK (0xFF000000UL) 2758 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_3(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_3_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_3_MASK) 2759 2760 /* WBFS_WEIGHT_4 field */ 2761 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_4_SHIFT (0U) 2762 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_4_MASK (0x000000FFUL) 2763 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_4(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_4_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_4_MASK) 2764 2765 /* WBFS_WEIGHT_5 field */ 2766 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_5_SHIFT (8U) 2767 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_5_MASK (0x0000FF00UL) 2768 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_5(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_5_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_5_MASK) 2769 2770 /* WBFS_WEIGHT_6 field */ 2771 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_6_SHIFT (16U) 2772 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_6_MASK (0x00FF0000UL) 2773 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_6(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_6_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_6_MASK) 2774 2775 /* WBFS_WEIGHT_7 field */ 2776 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_7_SHIFT (24U) 2777 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_7_MASK (0xFF000000UL) 2778 #define NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_7(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_7_SHIFT)) & NETC_ETHSWT_IP_SGCLTABLE_CFGE_DATA_WBFS_WEIGHT_7_MASK) 2779 2780 /*! 2781 * @brief Defines the port egress class scheduler. 2782 * @implements Netc_EthSwt_Ip_PortSchedulerType_struct 2783 */ 2784 typedef struct { 2785 uint8 numberOfWBFSQueues; /* Number of queues using the weighted fair share algorithm */ 2786 uint16 overheadAccountingLength; /* Added to the actual length of each frame when performing class scheduler WBFS calculations */ 2787 uint8 portEgressSchedulerWeightList[NETC_ETHSWT_WBFS_QUEUES_NB]; /* Array holding the queue weights for WBFS (weighted fair share) scheduler inputs */ 2788 } Netc_EthSwt_Ip_PortSchedulerType; 2789 2790 /*! 2791 * @brief Represents a Shaper in the egress port. 2792 */ 2793 typedef struct { 2794 /* To improve the speed of the init of the drivers, Bandwidth and hiCredit are calculated in the upper layes */ 2795 boolean EthSwtPortEgressCBShaperEnable; /*!< Enable the Credit-Based Shaper. */ 2796 uint32 EthSwtPortEgressCBShaperBandwidth; /*!< Bandwidth of the Credit-Based Shaper. Bandwidth = (idleSlope/portTxRate) * 100, Note: total CBS bandwidth on a port should be less the 75% */ 2797 uint32 EthSwtPortEgressHiCredit; /*!< HiCredit if the Credit-Based Shaper. (hiCredit on credit) = maxSizedFrame * Bandwidth * (enetClockFrequency / portTxRate) */ 2798 uint32 EthSwtPortMaxSizedFrame; /*!< Max Frame Size, should be less the 2000 bytes */ 2799 } Netc_EthSwt_Ip_PortShaperType; 2800 2801 /*! 2802 * @brief Port egress description 2803 */ 2804 typedef struct { 2805 Netc_EthSwt_Ip_PortSchedulerType *portScheduler; /*!< Defines the scheduler algorithm. */ 2806 Netc_EthSwt_Ip_PortShaperType (*portShaper)[8U]; /*!< Represents a Shaper in the egress port. */ 2807 boolean portEgressAllowCutThroughFrames; /*!< Allow cut through frames */ 2808 boolean enablePreemption; /*!< Enable egress frame preemption */ 2809 uint8 preemptionTCprofiles; /*!< Mark trafic classes as preemptable or express */ 2810 boolean updateEgressDr; /*!< If there is frame modification and enable DEI change */ 2811 uint8 (*vlanDrToDei)[NETC_ETHSWT_IP_NUMBER_OF_DR]; /*!< If there is frame modification and enable map DR to DEI */ 2812 uint8 vlanMappingProfile; /*!< Select the VLANIPV profile 0/1 using the PCP and DEI */ 2813 boolean vlanEnableEgressPcpToPcpMapping; /*!< If there is frame modification enable the PCP change */ 2814 uint8 vlanEgressPcpToPcpProfile; /*!< If there is frame modification and enable use this profile */ 2815 uint8 portPPDUByteCountOverhead; /* PPDU Byte count overhead which includes IPG, SFD and Preamble. */ 2816 uint8 portMACSecByteCountOverhead; /* Number of bytes of overhead due to MACSec encapsulation */ 2817 uint32 portTimeGateSchedulingAdvanceTimeOffsetReg; /* This is the port time gate scheduling advance time offset register */ 2818 boolean portTimeAwareShaperEnable; /*!< If the data for time gate scheduling talbe is configured */ 2819 uint64 portEgressAdminBaseTime; /*!< Administrative Base Time */ 2820 uint32 portEgressAdminCycleTime; /*!< Administrative Cycle Time */ 2821 uint32 portEgressAdminCycleTimeExt; /*!< Administrative Cycle Time Extension */ 2822 #if (NETC_ETHSWT_MAX_NUMBER_OF_GATECONTROLLIST_ENTRIES > 0U) 2823 uint8 numberOfGateControlListEntries; /*!< Number of entries in Administrative Gate Control list. */ 2824 Netc_EthSwt_Ip_GateEntryAdminControlListDataType (*TimeGateControlListEntries)[NETC_ETHSWT_MAX_NUMBER_OF_GATECONTROLLIST_ENTRIES]; /*!< Pointer to an array containing the gate control list for port. */ 2825 #endif 2826 } Netc_EthSwt_Ip_PortEgressType; 2827 2828 /*! 2829 * @brief Port description for initalisation 2830 */ 2831 typedef struct { 2832 boolean EthSwtPortMacLayerPortEnable; /*!< enable/disable port mac layer */ 2833 Netc_EthSwt_Ip_PortEgressType *ePort; /*!< Configuration of one Ethernet Switch Port Egress behavior. */ 2834 Netc_EthSwt_Ip_PortIngressType *iPort; /*!< Configuration of one Ethernet Switch Port Ingress behavior. */ 2835 EthTrcv_BaudRateType EthSwtPortMacLayerSpeed; /**< Defines the baud rate of the MAC layer. */ 2836 Netc_EthSwt_Ip_PortDuplexType EthSwtPortMacLayerDuplexMode; /*!< Defines the duplex mode of switch mac layer duplex mode*/ 2837 Netc_EthSwt_Ip_XmiiModeType EthSwtPortPhysicalLayerType; /*!< Defines the physical layer type of this EthSwtPort. */ 2838 uint8 EthSwtPortMacAddresses[6U]; /*!< Default MAC address. */ 2839 uint16 EthSwtPortMaxDynamicEntries; /*!< Specifies for a given port, the maximium number of dynamic entries in the FDB table.*/ 2840 boolean EthSwtPortEnableMagicPacketDetection; /*!< Enable/Disable packet magic detection*/ 2841 boolean EthSwtPortTimeStampSupport; /*!< Activates egress time stamping. */ 2842 boolean EthSwtPortPruningEnable; /*!< A received frame is not allowed to be transmitted on same port it was recceived. */ 2843 boolean EthSwtPortLoopbackEnable; /*!< Enable loopback mode for current port */ 2844 boolean EthSwtPortDisallowMacStationMove; /*!< MAC station move disallowed.*/ 2845 } Netc_EthSwt_Ip_PortType; 2846 2847 /*! 2848 * @brief Key Construction Rule 2849 * @implements : Netc_EthSwt_Ip_KeyConstructionRuleType_struct 2850 */ 2851 typedef struct 2852 { 2853 uint32 EthSwtKeyConstructionRegValue; /**< Value to be added in the Key Construction Register*/ 2854 uint32 EthSwtPayloadField0RegValue; /**< Value to be added in the Payload Field 0 Register*/ 2855 uint32 EthSwtPayloadField1RegValue; /**< Value to be added in the Payload Field 0 Register*/ 2856 } Netc_EthSwt_Ip_KeyConstructionRuleType; 2857 2858 /*! 2859 * @brief Configuration of one Ethernet Switch for initalisation 2860 */ 2861 typedef struct { 2862 Netc_EthSwt_Ip_MacLearningOptionType MacLearningOption; /*!< specifies the Mac learning mode */ 2863 Netc_EthSwt_Ip_MacForwardingOptionType MacForwardingOption; /*!< specifies the Mac forwarding option */ 2864 uint16 EthSwtMaxDynamicEntries; /*!< This field specifies the maximum number of dynamic entries allowed in the FDB table for the entire switch. A value of 0 implies no global switch limit imposed for dynamic entries.*/ 2865 uint16 EthSwtArlTableEntryTimeout; /*!< specifies the timeout in seconds for removing unused entries. */ 2866 boolean EthSwtEnableSharedLearning; /*!< Used to determine the FID when doing a lookup in the FDB table. 0: Independent VLAN learning: FID is set to to the VID assigned to the frame 1: Shared VLAN learning: Use the FID specified in this register */ 2867 uint16 EthSwtCustomVlanEtherType1; /*!< Custom VLAN */ 2868 uint16 EthSwtCustomVlanEtherType2; /*!< Custom VLAN */ 2869 Netc_EthSwt_Ip_PortType (*port)[NETC_ETHSWT_IP_NUMBER_OF_PORTS]; /*!< Port description. */ 2870 Netc_EthSwt_Ip_KeyConstructionRuleType (*EthSwtKeyConstruction)[4U]; /*!< Represents a Key Construction Rule. */ 2871 #if (NETC_ETHSWT_NUMBER_OF_STREAMIDENTIFICATION_ENTRIES > 0U) 2872 uint8 NumberOfIsiEntries; /*!< Number of Ingress Stream Identification entries. */ 2873 const Netc_EthSwt_Ip_IngrStremIdentificationTableDataType (*IsiEntries)[NETC_ETHSWT_NUMBER_OF_STREAMIDENTIFICATION_ENTRIES]; /*!< Pointer to an array containing the StreamIdentification configuration. */ 2874 #endif 2875 2876 #if (NETC_ETHSWT_NUMBER_OF_SEQTAG_ENTRIES > 0U) 2877 uint8 NumberOfSeqTagEntries; /*!< Number of Sequence tag entries. */ 2878 const Netc_EthSwt_Ip_ISQGTableDataType (*SeqTagEntries)[NETC_ETHSWT_NUMBER_OF_SEQTAG_ENTRIES]; /*!< Pointer to an array containing the SequenceTag configuration. */ 2879 #endif 2880 2881 #if (NETC_ETHSWT_NUMBER_OF_SEQRECOVERY_ENTRIES > 0U) 2882 uint8 NumberOfSeqRecoveryEntries; /*!< Number of Sequence tag entries. */ 2883 const Netc_EthSwt_Ip_EgrSeqRecoveryTableDataType (*SeqRecoveryEntries)[NETC_ETHSWT_NUMBER_OF_SEQRECOVERY_ENTRIES]; /*!< Pointer to an array containing the SequenceRecovery configuration. */ 2884 #endif 2885 #if (NETC_ETHSWT_NUMBER_OF_IPFT_ENTRIES > 0U) 2886 uint8 NumberOfIpftEntries; /*!< Number of Ingress Port Filter entries. */ 2887 const Netc_EthSwt_Ip_IngressPortFilterEntryDataType (*IngressPortFilterEntries)[NETC_ETHSWT_NUMBER_OF_IPFT_ENTRIES]; /*!< Pointer to an array containing the Ingress Port Filter table configuration. */ 2888 #endif 2889 #if (NETC_ETHSWT_NUMBER_OF_RP_ENTRIES > 0U) 2890 uint8 NumberOfRPEntries; /*!< Number of Rate Policer/Flow Meter entries */ 2891 const Netc_EthSwt_Ip_RatePolicerEntryDataType (*EthSwtRatePolicerEntries)[NETC_ETHSWT_NUMBER_OF_RP_ENTRIES]; /*!< Pointer to an array containing entries for the rate policer table. */ 2892 #endif 2893 #if (NETC_ETHSWT_NUMBER_OF_SGCL_ENTRIES > 0U) 2894 uint8 NumberOfSGCLEntries; /*!< Number of Stream Gate Instance entries */ 2895 const Netc_EthSwt_Ip_SGCLTableDataType (*StreamGateControlListEntries)[NETC_ETHSWT_NUMBER_OF_SGCL_ENTRIES]; /*!< Pointer to an array containing configurations for Stream Gate Control Lists. */ 2896 #endif 2897 #if (NETC_ETHSWT_NUMBER_OF_SGI_ENTRIES > 0U) 2898 uint8 NumberOfSGIEntries; /*!< Number of Stream Gate Instance entries */ 2899 const Netc_EthSwt_Ip_StreamGateInstanceEntryDataType (*StreamGateInstanceEntries)[NETC_ETHSWT_NUMBER_OF_SGI_ENTRIES]; /*!< Pointer to an array containing configurations for Stream Gate Instances. */ 2900 #endif 2901 #if (NETC_ETHSWT_NUMBER_OF_FRAMEMODIFICATION_ENTRIES > 0U) 2902 uint8 NumberOfFrmModifEntries; /*!< Number of Frame Modification entries */ 2903 const Netc_EthSwt_Ip_FrmModificationEntryDataType (*FrameModificationEntries)[NETC_ETHSWT_NUMBER_OF_FRAMEMODIFICATION_ENTRIES]; /*!< Pointer to an array containing configurations for Frame Modification. */ 2904 #endif 2905 #if (NETC_ETHSWT_NUMBER_OF_EGRESSTREATMENT_ENTRIES > 0U) 2906 uint8 NumberOfEgrTreatmentEntries; /*!< Number of Egress Treatment entries */ 2907 const Netc_EthSwt_Ip_EgressTreatmentEntryDataType (*EgressTreatmentEntries)[NETC_ETHSWT_NUMBER_OF_EGRESSTREATMENT_ENTRIES]; /*!< Pointer to an array containing configurations for Egress Treatment. */ 2908 #endif 2909 #if (NETC_ETHSWT_NUMBER_OF_INGRESSSTREAM_ENTRIES > 0U) 2910 uint8 NumberOfIngrStreamEntries; /*!< Number of Ingress Stream entries */ 2911 const Netc_EthSwt_Ip_IngressStreamEntryDataType (*IngressStreamEntries)[NETC_ETHSWT_NUMBER_OF_INGRESSSTREAM_ENTRIES]; /*!< Pointer to an array containing configurations for Ingress Stream. */ 2912 #endif 2913 #if (NETC_ETHSWT_NUMBER_OF_STREAMFILTER_ENTRIES > 0U) 2914 uint8 NumberOfIngrStreamFilterEntries; /*!< Number of Ingress Stream Filter entries */ 2915 const Netc_EthSwt_Ip_IngressStreamFilterEntryDataType (*IngressStreamFilterEntries)[NETC_ETHSWT_NUMBER_OF_STREAMFILTER_ENTRIES]; /*!< Pointer to an array containing configurations for Ingress Stream Filter. */ 2916 #endif 2917 #if (NETC_ETHSWT_NUMBER_OF_STREAMCOUNT_ENTRIES > 0U) 2918 uint8 NumberOfIngrStreamCountEntries; /*!< Number of Ingress Stream Count entries */ 2919 #endif 2920 #if (NETC_ETHSWT_NUMBER_OF_FDB_ENTRIES > 0U) 2921 uint8 NumberOfFdbEntries; /*!< Number of FDB entries. */ 2922 const Netc_EthSwt_Ip_FdbEntryType (*FdbEntries)[NETC_ETHSWT_NUMBER_OF_FDB_ENTRIES]; /*!< Pointer to an array containing the FDB configuration. */ 2923 #endif 2924 #if (NETC_ETHSWT_NUMBER_OF_VLANFILTER_ENTRIES > 0U) 2925 uint8 NumberOfVlanFilterEntries; /*!< Number of Vlan Filter entries. */ 2926 const Netc_EthSwt_Ip_VlanFilterEntryType (*VlanFilterEntries)[NETC_ETHSWT_NUMBER_OF_VLANFILTER_ENTRIES]; /*!< Pointer to an array containing the Vlan configuration. */ 2927 #endif 2928 uint8 (*vlanPcpDei2IpvProfile)[NETC_ETHSWT_IP_NUMBER_OF_PROFILES][NETC_ETHSWT_IP_NUMBER_OF_PCP_DEI]; /*!< Profiles for PCP_DEI to IPV ingress mapping. */ 2929 uint8 (*vlanPcpDei2DrProfile)[NETC_ETHSWT_IP_NUMBER_OF_PROFILES][NETC_ETHSWT_IP_NUMBER_OF_PCP_DEI]; /*!< Profiles for PCP_DEI to DR ingress mapping. */ 2930 uint8 (*vlanPcp2PcpProfile)[NETC_ETHSWT_IP_NUMBER_OF_PROFILES][NETC_ETHSWT_IP_NUMBER_OF_PCP]; /*!< Profiles for PCP to PCP frame modification. */ 2931 uint8 (*vlanIpvDr2PcpProfile)[NETC_ETHSWT_IP_NUMBER_OF_PROFILES][NETC_ETHSWT_IP_NUMBER_OF_IPV][NETC_ETHSWT_IP_NUMBER_OF_DR]; /*!< Profiles for egress IPV/DR to PCP frame modification. */ 2932 uint32 netcClockFrequency; /*!< Netc system clock */ 2933 uint32 netcExternalClockFrequency; /*!< extern reference clock */ 2934 Netc_EthSwt_Ip_1588ClockSourceOptionType Timer1588ClkSrc; /*!< reference clock source for 1588 timer */ 2935 } Netc_EthSwt_Ip_ConfigType; 2936 2937 /** 2938 * @brief Type to request or obtain the mirroring state (enable/disable) for a particular Ethernet switch. 2939 * @implements Netc_EthSwt_Ip_SwitchMirrorStateType_enum 2940 */ 2941 typedef enum 2942 { 2943 NETC_ETHSWT_MIRROR_DISABLED = 0x0U, /*!< @brief switch mirroring disabled. */ 2944 NETC_ETHSWT_MIRROR_ENABLED = 0x1U /*!< @brief switch mirroring enabled. */ 2945 } Netc_EthSwt_Ip_SwitchMirrorStateType; 2946 2947 /** 2948 * @brief Switch Mirroring Mode Type 2949 */ 2950 typedef enum 2951 { 2952 NETC_ETHSWT_NO_VLAN_RETAGGING = 0x0U, /*!< @brief No VLAN retagging. */ 2953 NETC_ETHSWT_VLAN_RETAGGING = 0x1U, /*!< @brief VLAN retagging. */ 2954 NETC_ETHSWT_VLAN_DOUBLE_TAGGING = 0x2U /*!< @brief VLAN Double tagging. */ 2955 } Netc_EthSwt_Ip_SwitchMirroringModeType; 2956 2957 /** @brief The Netc_EthSwt_Ip_SwitchMirrorCfgType specify the mirror configuration which is set up per Ethernet switch. 2958 * @implements Netc_EthSwt_Ip_SwitchMirrorCfgType_struct 2959 * */ 2960 typedef struct 2961 { 2962 uint8 SrcMacAddrFilter[6U]; /*!< @brief Specifies the source MAC address [0..255,0..255,0..255,0..255,0..255,0..255] that should be mirrored. If set to 0,0,0,0,0,0, no source MAC address filtering shall take place. */ 2963 uint8 DstMacAddrFilter[6U]; /*!< @brief Specifies the destination MAC address [0..255,0..255,0..255,0..255,0..255,0..255] that should be mirrored. If set to 0,0,0,0,0,0, no destination MAC address filtering shall take place. */ 2964 uint16 VlanIdFilter; /*!< @brief Specifies the VLAN address 0..4094 that should be mirrored. If set to 65535, no VLAN filtering shall take place. */ 2965 uint32 TrafficDirectionIngressBitMask; /*!< @brief Specifies the bit mask of Ethernet switch ingress port traffic direction to be mirrored. The bit mask is calculated depending of the values of EthSwtPortIdx. (e.g. set EthSwtPortIdx == 2 => TrafficDirectionIngressBitMask = 0b0000 0000 0000 0000 0000 0000 0000 0100). 2966 0b0 == disable ingress port mirroring 0b1 == enable ingress port mirroring Example: TrafficDirectionIngressBitMask = 0b0000 0000 0000 0000 0000 0000 0000 0100 => Ingress traffic mirroring is enabled of Ethernet switch port with EthSwtPortIdx=2 */ 2967 uint8 CapturePortIdx; /*!< @brief Specifies the Ethernet switch port which capture the mirrored traffic */ 2968 uint16 VlanId; /*!< @brief Specifies the VLAN address 0..4094 which shall be used for re-tagging or double-tagging if MirroringMode is set to 0x01 (VLAN re-tagging) or 0x02 (VLAN double tagging). 2969 If the value is set to 65535, the value shall be ignored */ 2970 Netc_EthSwt_Ip_SwitchMirroringModeType MirroringMode; /*!< @brief specifies the mode how the mirrored traffic should be tagged : 0x00 == No VLAN retagging; 0x01 == VLAN retagging; 0x03 == VLAN Double tagging */ 2971 } Netc_EthSwt_Ip_SwitchMirrorCfgType; 2972 2973 /*! 2974 * @brief PTP time 2975 * @implements Netc_EthSwt_Ip_PtpTimeType_struct 2976 */ 2977 typedef struct 2978 { 2979 uint32 nanoseconds; /**< Nanoseconds */ 2980 uint32 seconds; /**< Lower 32-bit of seconds */ 2981 uint16 secondsHi; /**< Upper 16-bit of seconds */ 2982 } Netc_EthSwt_Ip_PtpTimeType; 2983 2984 /*================================================================================================== 2985 * GLOBAL VARIABLE DECLARATIONS 2986 ==================================================================================================*/ 2987 2988 /*================================================================================================== 2989 * FUNCTION PROTOTYPES 2990 ==================================================================================================*/ 2991 2992 #ifdef __cplusplus 2993 } 2994 #endif 2995 2996 /** @} */ 2997 2998 #endif /* NETC_ETHSWT_IP_TYPES_H */ 2999
