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/hal_nxp-latest/mcux/mcux-sdk/components/video/display/it6161/
Dhdmi_tx.h148 #define HDMI_TX_GENERAL_REG05_REGINTPOL(N) ((N) << HDMI_TX_GENERAL_REG05_REGINTPOL_SHIFT) argument
151 #define HDMI_TX_GENERAL_REG05_REGINTIOMODE(N) ((N) << HDMI_TX_GENERAL_REG05_REGINTIOMODE_SHIFT) argument
157 #define HDMI_TX_INT_FLAGS_REG06_RInt_HPDStus(N) ((N) << HDMI_TX_INT_FLAGS_REG06_RInt_HPDS… argument
160 #define HDMI_TX_INT_FLAGS_REG06_RInt_DDCBusHang(N) ((N) << HDMI_TX_INT_FLAGS_REG06_RInt_DDCB… argument
163 #define HDMI_TX_INT_FLAGS_REG06_RInt_DDCFIFOErr(N) ((N) << HDMI_TX_INT_FLAGS_REG06_RInt_DDCF… argument
166 #define HDMI_TX_INT_FLAGS_REG06_RInt_AudioOvFlwStus(N) ((N) << HDMI_TX_INT_FLAGS_REG06_RInt_Audi… argument
170 #define HDMI_TX_INT_FLAGS_REG08_RInt_PktAVIStus(N) ((N) << HDMI_TX_INT_FLAGS_REG08_RInt_PktA… argument
173 #define HDMI_TX_INT_FLAGS_REG08_RInt_VidStableStus(N) ((N) << HDMI_TX_INT_FLAGS_REG08_RInt_VidS… argument
179 #define HDMI_TX_INT_MASK_REG09_REG_AudioOvFlw(N) ((N) << HDMI_TX_INT_MASK_REG09_REG_AudioOvFlw_S… argument
182 #define HDMI_TX_INT_MASK_REG09_REG_DDCNoACK(N) ((N) << HDMI_TX_INT_MASK_REG09_REG_DDCNoACK_SHI… argument
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Dmipi_rx.h14 #define MIPI_RX_SOFT_RESET_REG05_RegSoftORst(N) ((N) << MIPI_RX_SOFT_RESET_REG05_RegSoftORst_S… argument
17 #define MIPI_RX_SOFT_RESET_REG05_RegSoftMRst(N) ((N) << MIPI_RX_SOFT_RESET_REG05_RegSoftMRst_S… argument
20 #define MIPI_RX_SOFT_RESET_REG05_RegMPSoftPRst(N) ((N) << MIPI_RX_SOFT_RESET_REG05_RegMPSoftPRst… argument
23 #define MIPI_RX_SOFT_RESET_REG05_RefSoftREFRst(N) ((N) << MIPI_RX_SOFT_RESET_REG05_RefSoftREFRst… argument
51 #define MIPI_RX_SYS_CONF_REG0C_RegLaneNum(N) ((N - 1U) << MIPI_RX_SYS_CONF_REG0C_RegLaneNum_S… argument
54 #define MIPI_RX_SYS_CONF_REG0C_RegEnPNSwap(N) ((N) << MIPI_RX_SYS_CONF_REG0C_RegEnPNSwap_SHIFT) argument
57 #define MIPI_RX_SYS_CONF_REG0C_RegEnLaneSwap(N) ((N) << MIPI_RX_SYS_CONF_REG0C_RegEnLaneSwap_SHI… argument
62 #define MIPI_RX_SYS_CONF_REG0D_REGINTPOL(N) ((N) << MIPI_RX_SYS_CONF_REG0D_REGINTPOL_SHIFT) argument
69 #define MIPI_RX_CLKBUF_CTRL_REG10_RegGateOCLK(N) ((N) << MIPI_RX_CLKBUF_CTRL_REG10_RegGateOCLK_S… argument
72 #define MIPI_RX_CLKBUF_CTRL_REG10_RegGateMCLK(N) ((N) << MIPI_RX_CLKBUF_CTRL_REG10_RegGateMCLK_S… argument
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/hal_nxp-latest/mcux/mcux-sdk/components/lsm6dso/
Dfsl_lsm.h55 #define LSM_EMB_FUNC_EN_A_REG_SIGN_MOTION_EN(N) ((N) << LSM_EMB_FUNC_EN_A_REG_SIGN_MOTION_EN_SHI… argument
58 #define LSM_EMB_FUNC_EN_A_REG_TILT_EN(N) ((N) << LSM_EMB_FUNC_EN_A_REG_TILT_EN_SHIFT) argument
61 #define LSM_EMB_FUNC_EN_A_REG_PEDO_EN(N) ((N) << LSM_EMB_FUNC_EN_A_REG_PEDO_EN_SHIFT) argument
69 #define LSM_EMB_FUNC_INT1_REG_INT1_FSM_LC(N) ((N) << LSM_EMB_FUNC_INT1_REG_INT1_FSM_LC_SH… argument
71 #define LSM_EMB_FUNC_INT1_REG_INT1_SIG_MOT(N) ((N) << LSM_EMB_FUNC_INT1_REG_INT1_SIG_MOT_S… argument
73 #define LSM_EMB_FUNC_INT1_REG_INT1_TILT(N) ((N) << LSM_EMB_FUNC_INT1_REG_INT1_TILT_SHIF… argument
75 #define LSM_EMB_FUNC_INT1_REG_INT1_STEP_DETECTOR(N) ((N) << LSM_EMB_FUNC_INT1_REG_INT1_STEP_DETE… argument
84 #define LSM_PAGE_RW_REG_EMB_FUNC_LIR(N) ((N) << LSM_PAGE_RW_REG_EMB_FUNC_LIR_SHIFT) argument
86 #define LSM_PAGE_RW_REG_PAGE_WRITE(N) ((N) << LSM_PAGE_RW_REG_PAGE_WRITE_SHIFT) argument
88 #define LSM_PAGE_RW_REG_PAGE_READ(N) ((N) << LSM_PAGE_RW_REG_PAGE_READ_SHIFT) argument
[all …]
/hal_nxp-latest/mcux/mcux-sdk/drivers/cau3/
Dfsl_cau3.c2357 static status_t cau3_pkha_clear_regabne(CAU3_Type *base, bool A, bool B, bool N, bool E) in cau3_pkha_clear_regabne()
2513 const uint8_t *N, in cau3_pkha_init_data()
2672 …CAU3_Type *base, const uint8_t *N, size_t sizeN, uint8_t *result, size_t *resultSize, cau3_pkha_f2… in cau3_pkha_modR2()
2703 const uint8_t *N, in cau3_pkha_modmul()
2857 const uint8_t *N, in CAU3_PKHA_NormalToMontgomery()
2952 const uint8_t *N, in CAU3_PKHA_MontgomeryToNormal()
3032 const uint8_t *N, in CAU3_PKHA_ModAdd()
3110 const uint8_t *N, in CAU3_PKHA_ModSub1()
3183 const uint8_t *N, in CAU3_PKHA_ModSub2()
3252 const uint8_t *N, in CAU3_PKHA_ModMul()
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/hal_nxp-latest/mcux/mcux-sdk/drivers/ltc/
Dfsl_ltc.c3823 static status_t ltc_pkha_clear_regabne(LTC_Type *base, bool A, bool B, bool N, bool E) in ltc_pkha_clear_regabne()
3976 const uint8_t *N, in ltc_pkha_init_data()
4135 …LTC_Type *base, const uint8_t *N, uint16_t sizeN, uint8_t *result, uint16_t *resultSize, ltc_pkha_… in ltc_pkha_modR2()
4166 const uint8_t *N, in ltc_pkha_modmul()
4326 const uint8_t *N, in LTC_PKHA_NormalToMontgomery()
4400 const uint8_t *N, in LTC_PKHA_MontgomeryToNormal()
4462 const uint8_t *N, in LTC_PKHA_ModAdd()
4528 const uint8_t *N, in LTC_PKHA_ModSub1()
4589 const uint8_t *N, in LTC_PKHA_ModSub2()
4646 const uint8_t *N, in LTC_PKHA_ModMul()
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/hal_nxp-latest/mcux/mcux-sdk/drivers/caam/
Dfsl_caam.c7645 const uint8_t *N, in caam_pkha_algorithm_operation_command()
7778 const uint8_t *N, in caam_pkha_ecc_algorithm_operation_command()
7980 const uint8_t *N, in CAAM_PKHA_ModAddNonBlocking()
8036 const uint8_t *N, in CAAM_PKHA_ModAdd()
8084 const uint8_t *N, in CAAM_PKHA_ModSub1NonBlocking()
8133 const uint8_t *N, in CAAM_PKHA_ModSub1()
8179 const uint8_t *N, in CAAM_PKHA_ModSub2NonBlocking()
8218 const uint8_t *N, in CAAM_PKHA_ModSub2()
8268 const uint8_t *N, in CAAM_PKHA_ModMulNonBlocking()
8335 const uint8_t *N, in CAAM_PKHA_ModMul()
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/hal_nxp-latest/mcux/mcux-sdk/CMSIS/DSP/Include/dsp/
Dtransform_functions.h454 uint16_t N; /**< length of the DCT4. */ member
500 uint16_t N; /**< length of the DCT4. */ member
546 uint16_t N; /**< length of the DCT4. */ member
Dutils.h45 #define ROUND_UP(N, S) ((((N) + (S) - 1) / (S)) * (S)) argument
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/Include/
Dcore_cm0.h207 uint32_t N:1; /*!< bit: 31 Negative condition code flag */ member
258 uint32_t N:1; /*!< bit: 31 Negative condition code flag */ member
Dcore_cm1.h207 uint32_t N:1; /*!< bit: 31 Negative condition code flag */ member
258 uint32_t N:1; /*!< bit: 31 Negative condition code flag */ member
Dcore_cm0plus.h218 uint32_t N:1; /*!< bit: 31 Negative condition code flag */ member
269 uint32_t N:1; /*!< bit: 31 Negative condition code flag */ member
Dcore_sc000.h213 uint32_t N:1; /*!< bit: 31 Negative condition code flag */ member
264 uint32_t N:1; /*!< bit: 31 Negative condition code flag */ member
Darm_math.h2398 uint16_t N; /**< length of the DCT4. */ member
2444 uint16_t N; /**< length of the DCT4. */ member
2490 uint16_t N; /**< length of the DCT4. */ member
Dcore_armv8mbl.h241 uint32_t N:1; /*!< bit: 31 Negative condition code flag */ member
292 uint32_t N:1; /*!< bit: 31 Negative condition code flag */ member
Dcore_cm23.h241 uint32_t N:1; /*!< bit: 31 Negative condition code flag */ member
292 uint32_t N:1; /*!< bit: 31 Negative condition code flag */ member
Dcore_sc300.h215 uint32_t N:1; /*!< bit: 31 Negative condition code flag */ member
272 uint32_t N:1; /*!< bit: 31 Negative condition code flag */ member
/hal_nxp-latest/mcux/mcux-sdk/drivers/powerquad/
Dfsl_powerquad_cmsis.c326 uint16_t N, in arm_dct4_init_q31()
546 uint16_t N, in arm_dct4_init_q15()
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/Core/Include/
Dcore_cm0plus.h218 uint32_t N:1; /*!< bit: 31 Negative condition code flag */ member
269 uint32_t N:1; /*!< bit: 31 Negative condition code flag */ member
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/DSP/Source/TransformFunctions/
Darm_dct4_init_f32.c64 uint16_t N, in arm_dct4_init_f32()
Darm_dct4_init_q15.c64 uint16_t N, in arm_dct4_init_q15()
Darm_dct4_init_q31.c64 uint16_t N, in arm_dct4_init_q31()
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/Core_AArch64/Include/
Dcmsis_compiler.h86 #define RESERVED(N, T) T RESERVED##N; // placeholder struct members used for "reserved" areas argument
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC51U68/drivers/
Dfsl_clock.c617 static uint32_t pllEncodeN(uint32_t N) in pllEncodeN()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54114/drivers/
Dfsl_clock.c715 static uint32_t pllEncodeN(uint32_t N) in pllEncodeN()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54113/drivers/
Dfsl_clock.c715 static uint32_t pllEncodeN(uint32_t N) in pllEncodeN()

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